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1 | /* | |
2 | * Fence mechanism for dma-buf and to allow for asynchronous dma access | |
3 | * | |
4 | * Copyright (C) 2012 Canonical Ltd | |
5 | * Copyright (C) 2012 Texas Instruments | |
6 | * | |
7 | * Authors: | |
8 | * Rob Clark <robdclark@gmail.com> | |
9 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License version 2 as published by | |
13 | * the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 | * more details. | |
19 | */ | |
20 | ||
21 | #include <linux/slab.h> | |
22 | #include <linux/export.h> | |
23 | #include <linux/atomic.h> | |
24 | #include <linux/dma-fence.h> | |
25 | #include <linux/sched/signal.h> | |
26 | ||
27 | #define CREATE_TRACE_POINTS | |
28 | #include <trace/events/dma_fence.h> | |
29 | ||
30 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit); | |
31 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal); | |
32 | ||
33 | /* | |
34 | * fence context counter: each execution context should have its own | |
35 | * fence context, this allows checking if fences belong to the same | |
36 | * context or not. One device can have multiple separate contexts, | |
37 | * and they're used if some engine can run independently of another. | |
38 | */ | |
39 | static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0); | |
40 | ||
41 | /** | |
42 | * dma_fence_context_alloc - allocate an array of fence contexts | |
43 | * @num: [in] amount of contexts to allocate | |
44 | * | |
45 | * This function will return the first index of the number of fences allocated. | |
46 | * The fence context is used for setting fence->context to a unique number. | |
47 | */ | |
48 | u64 dma_fence_context_alloc(unsigned num) | |
49 | { | |
50 | WARN_ON(!num); | |
51 | return atomic64_add_return(num, &dma_fence_context_counter) - num; | |
52 | } | |
53 | EXPORT_SYMBOL(dma_fence_context_alloc); | |
54 | ||
55 | /** | |
56 | * dma_fence_signal_locked - signal completion of a fence | |
57 | * @fence: the fence to signal | |
58 | * | |
59 | * Signal completion for software callbacks on a fence, this will unblock | |
60 | * dma_fence_wait() calls and run all the callbacks added with | |
61 | * dma_fence_add_callback(). Can be called multiple times, but since a fence | |
62 | * can only go from unsignaled to signaled state, it will only be effective | |
63 | * the first time. | |
64 | * | |
65 | * Unlike dma_fence_signal, this function must be called with fence->lock held. | |
66 | */ | |
67 | int dma_fence_signal_locked(struct dma_fence *fence) | |
68 | { | |
69 | struct dma_fence_cb *cur, *tmp; | |
70 | int ret = 0; | |
71 | ||
72 | lockdep_assert_held(fence->lock); | |
73 | ||
74 | if (WARN_ON(!fence)) | |
75 | return -EINVAL; | |
76 | ||
77 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { | |
78 | ret = -EINVAL; | |
79 | ||
80 | /* | |
81 | * we might have raced with the unlocked dma_fence_signal, | |
82 | * still run through all callbacks | |
83 | */ | |
84 | } else { | |
85 | fence->timestamp = ktime_get(); | |
86 | set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); | |
87 | trace_dma_fence_signaled(fence); | |
88 | } | |
89 | ||
90 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { | |
91 | list_del_init(&cur->node); | |
92 | cur->func(fence, cur); | |
93 | } | |
94 | return ret; | |
95 | } | |
96 | EXPORT_SYMBOL(dma_fence_signal_locked); | |
97 | ||
98 | /** | |
99 | * dma_fence_signal - signal completion of a fence | |
100 | * @fence: the fence to signal | |
101 | * | |
102 | * Signal completion for software callbacks on a fence, this will unblock | |
103 | * dma_fence_wait() calls and run all the callbacks added with | |
104 | * dma_fence_add_callback(). Can be called multiple times, but since a fence | |
105 | * can only go from unsignaled to signaled state, it will only be effective | |
106 | * the first time. | |
107 | */ | |
108 | int dma_fence_signal(struct dma_fence *fence) | |
109 | { | |
110 | unsigned long flags; | |
111 | ||
112 | if (!fence) | |
113 | return -EINVAL; | |
114 | ||
115 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) | |
116 | return -EINVAL; | |
117 | ||
118 | fence->timestamp = ktime_get(); | |
119 | set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags); | |
120 | trace_dma_fence_signaled(fence); | |
121 | ||
122 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) { | |
123 | struct dma_fence_cb *cur, *tmp; | |
124 | ||
125 | spin_lock_irqsave(fence->lock, flags); | |
126 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { | |
127 | list_del_init(&cur->node); | |
128 | cur->func(fence, cur); | |
129 | } | |
130 | spin_unlock_irqrestore(fence->lock, flags); | |
131 | } | |
132 | return 0; | |
133 | } | |
134 | EXPORT_SYMBOL(dma_fence_signal); | |
135 | ||
136 | /** | |
137 | * dma_fence_wait_timeout - sleep until the fence gets signaled | |
138 | * or until timeout elapses | |
139 | * @fence: [in] the fence to wait on | |
140 | * @intr: [in] if true, do an interruptible wait | |
141 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
142 | * | |
143 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the | |
144 | * remaining timeout in jiffies on success. Other error values may be | |
145 | * returned on custom implementations. | |
146 | * | |
147 | * Performs a synchronous wait on this fence. It is assumed the caller | |
148 | * directly or indirectly (buf-mgr between reservation and committing) | |
149 | * holds a reference to the fence, otherwise the fence might be | |
150 | * freed before return, resulting in undefined behavior. | |
151 | */ | |
152 | signed long | |
153 | dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) | |
154 | { | |
155 | signed long ret; | |
156 | ||
157 | if (WARN_ON(timeout < 0)) | |
158 | return -EINVAL; | |
159 | ||
160 | trace_dma_fence_wait_start(fence); | |
161 | ret = fence->ops->wait(fence, intr, timeout); | |
162 | trace_dma_fence_wait_end(fence); | |
163 | return ret; | |
164 | } | |
165 | EXPORT_SYMBOL(dma_fence_wait_timeout); | |
166 | ||
167 | void dma_fence_release(struct kref *kref) | |
168 | { | |
169 | struct dma_fence *fence = | |
170 | container_of(kref, struct dma_fence, refcount); | |
171 | ||
172 | trace_dma_fence_destroy(fence); | |
173 | ||
174 | WARN_ON(!list_empty(&fence->cb_list)); | |
175 | ||
176 | if (fence->ops->release) | |
177 | fence->ops->release(fence); | |
178 | else | |
179 | dma_fence_free(fence); | |
180 | } | |
181 | EXPORT_SYMBOL(dma_fence_release); | |
182 | ||
183 | void dma_fence_free(struct dma_fence *fence) | |
184 | { | |
185 | kfree_rcu(fence, rcu); | |
186 | } | |
187 | EXPORT_SYMBOL(dma_fence_free); | |
188 | ||
189 | /** | |
190 | * dma_fence_enable_sw_signaling - enable signaling on fence | |
191 | * @fence: [in] the fence to enable | |
192 | * | |
193 | * this will request for sw signaling to be enabled, to make the fence | |
194 | * complete as soon as possible | |
195 | */ | |
196 | void dma_fence_enable_sw_signaling(struct dma_fence *fence) | |
197 | { | |
198 | unsigned long flags; | |
199 | ||
200 | if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, | |
201 | &fence->flags) && | |
202 | !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { | |
203 | trace_dma_fence_enable_signal(fence); | |
204 | ||
205 | spin_lock_irqsave(fence->lock, flags); | |
206 | ||
207 | if (!fence->ops->enable_signaling(fence)) | |
208 | dma_fence_signal_locked(fence); | |
209 | ||
210 | spin_unlock_irqrestore(fence->lock, flags); | |
211 | } | |
212 | } | |
213 | EXPORT_SYMBOL(dma_fence_enable_sw_signaling); | |
214 | ||
215 | /** | |
216 | * dma_fence_add_callback - add a callback to be called when the fence | |
217 | * is signaled | |
218 | * @fence: [in] the fence to wait on | |
219 | * @cb: [in] the callback to register | |
220 | * @func: [in] the function to call | |
221 | * | |
222 | * cb will be initialized by dma_fence_add_callback, no initialization | |
223 | * by the caller is required. Any number of callbacks can be registered | |
224 | * to a fence, but a callback can only be registered to one fence at a time. | |
225 | * | |
226 | * Note that the callback can be called from an atomic context. If | |
227 | * fence is already signaled, this function will return -ENOENT (and | |
228 | * *not* call the callback) | |
229 | * | |
230 | * Add a software callback to the fence. Same restrictions apply to | |
231 | * refcount as it does to dma_fence_wait, however the caller doesn't need to | |
232 | * keep a refcount to fence afterwards: when software access is enabled, | |
233 | * the creator of the fence is required to keep the fence alive until | |
234 | * after it signals with dma_fence_signal. The callback itself can be called | |
235 | * from irq context. | |
236 | * | |
237 | * Returns 0 in case of success, -ENOENT if the fence is already signaled | |
238 | * and -EINVAL in case of error. | |
239 | */ | |
240 | int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, | |
241 | dma_fence_func_t func) | |
242 | { | |
243 | unsigned long flags; | |
244 | int ret = 0; | |
245 | bool was_set; | |
246 | ||
247 | if (WARN_ON(!fence || !func)) | |
248 | return -EINVAL; | |
249 | ||
250 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { | |
251 | INIT_LIST_HEAD(&cb->node); | |
252 | return -ENOENT; | |
253 | } | |
254 | ||
255 | spin_lock_irqsave(fence->lock, flags); | |
256 | ||
257 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, | |
258 | &fence->flags); | |
259 | ||
260 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) | |
261 | ret = -ENOENT; | |
262 | else if (!was_set) { | |
263 | trace_dma_fence_enable_signal(fence); | |
264 | ||
265 | if (!fence->ops->enable_signaling(fence)) { | |
266 | dma_fence_signal_locked(fence); | |
267 | ret = -ENOENT; | |
268 | } | |
269 | } | |
270 | ||
271 | if (!ret) { | |
272 | cb->func = func; | |
273 | list_add_tail(&cb->node, &fence->cb_list); | |
274 | } else | |
275 | INIT_LIST_HEAD(&cb->node); | |
276 | spin_unlock_irqrestore(fence->lock, flags); | |
277 | ||
278 | return ret; | |
279 | } | |
280 | EXPORT_SYMBOL(dma_fence_add_callback); | |
281 | ||
282 | /** | |
283 | * dma_fence_get_status - returns the status upon completion | |
284 | * @fence: [in] the dma_fence to query | |
285 | * | |
286 | * This wraps dma_fence_get_status_locked() to return the error status | |
287 | * condition on a signaled fence. See dma_fence_get_status_locked() for more | |
288 | * details. | |
289 | * | |
290 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has | |
291 | * been signaled without an error condition, or a negative error code | |
292 | * if the fence has been completed in err. | |
293 | */ | |
294 | int dma_fence_get_status(struct dma_fence *fence) | |
295 | { | |
296 | unsigned long flags; | |
297 | int status; | |
298 | ||
299 | spin_lock_irqsave(fence->lock, flags); | |
300 | status = dma_fence_get_status_locked(fence); | |
301 | spin_unlock_irqrestore(fence->lock, flags); | |
302 | ||
303 | return status; | |
304 | } | |
305 | EXPORT_SYMBOL(dma_fence_get_status); | |
306 | ||
307 | /** | |
308 | * dma_fence_remove_callback - remove a callback from the signaling list | |
309 | * @fence: [in] the fence to wait on | |
310 | * @cb: [in] the callback to remove | |
311 | * | |
312 | * Remove a previously queued callback from the fence. This function returns | |
313 | * true if the callback is successfully removed, or false if the fence has | |
314 | * already been signaled. | |
315 | * | |
316 | * *WARNING*: | |
317 | * Cancelling a callback should only be done if you really know what you're | |
318 | * doing, since deadlocks and race conditions could occur all too easily. For | |
319 | * this reason, it should only ever be done on hardware lockup recovery, | |
320 | * with a reference held to the fence. | |
321 | */ | |
322 | bool | |
323 | dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb) | |
324 | { | |
325 | unsigned long flags; | |
326 | bool ret; | |
327 | ||
328 | spin_lock_irqsave(fence->lock, flags); | |
329 | ||
330 | ret = !list_empty(&cb->node); | |
331 | if (ret) | |
332 | list_del_init(&cb->node); | |
333 | ||
334 | spin_unlock_irqrestore(fence->lock, flags); | |
335 | ||
336 | return ret; | |
337 | } | |
338 | EXPORT_SYMBOL(dma_fence_remove_callback); | |
339 | ||
340 | struct default_wait_cb { | |
341 | struct dma_fence_cb base; | |
342 | struct task_struct *task; | |
343 | }; | |
344 | ||
345 | static void | |
346 | dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb) | |
347 | { | |
348 | struct default_wait_cb *wait = | |
349 | container_of(cb, struct default_wait_cb, base); | |
350 | ||
351 | wake_up_state(wait->task, TASK_NORMAL); | |
352 | } | |
353 | ||
354 | /** | |
355 | * dma_fence_default_wait - default sleep until the fence gets signaled | |
356 | * or until timeout elapses | |
357 | * @fence: [in] the fence to wait on | |
358 | * @intr: [in] if true, do an interruptible wait | |
359 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
360 | * | |
361 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the | |
362 | * remaining timeout in jiffies on success. If timeout is zero the value one is | |
363 | * returned if the fence is already signaled for consistency with other | |
364 | * functions taking a jiffies timeout. | |
365 | */ | |
366 | signed long | |
367 | dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) | |
368 | { | |
369 | struct default_wait_cb cb; | |
370 | unsigned long flags; | |
371 | signed long ret = timeout ? timeout : 1; | |
372 | bool was_set; | |
373 | ||
374 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) | |
375 | return ret; | |
376 | ||
377 | spin_lock_irqsave(fence->lock, flags); | |
378 | ||
379 | if (intr && signal_pending(current)) { | |
380 | ret = -ERESTARTSYS; | |
381 | goto out; | |
382 | } | |
383 | ||
384 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, | |
385 | &fence->flags); | |
386 | ||
387 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) | |
388 | goto out; | |
389 | ||
390 | if (!was_set) { | |
391 | trace_dma_fence_enable_signal(fence); | |
392 | ||
393 | if (!fence->ops->enable_signaling(fence)) { | |
394 | dma_fence_signal_locked(fence); | |
395 | goto out; | |
396 | } | |
397 | } | |
398 | ||
399 | if (!timeout) { | |
400 | ret = 0; | |
401 | goto out; | |
402 | } | |
403 | ||
404 | cb.base.func = dma_fence_default_wait_cb; | |
405 | cb.task = current; | |
406 | list_add(&cb.base.node, &fence->cb_list); | |
407 | ||
408 | while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) { | |
409 | if (intr) | |
410 | __set_current_state(TASK_INTERRUPTIBLE); | |
411 | else | |
412 | __set_current_state(TASK_UNINTERRUPTIBLE); | |
413 | spin_unlock_irqrestore(fence->lock, flags); | |
414 | ||
415 | ret = schedule_timeout(ret); | |
416 | ||
417 | spin_lock_irqsave(fence->lock, flags); | |
418 | if (ret > 0 && intr && signal_pending(current)) | |
419 | ret = -ERESTARTSYS; | |
420 | } | |
421 | ||
422 | if (!list_empty(&cb.base.node)) | |
423 | list_del(&cb.base.node); | |
424 | __set_current_state(TASK_RUNNING); | |
425 | ||
426 | out: | |
427 | spin_unlock_irqrestore(fence->lock, flags); | |
428 | return ret; | |
429 | } | |
430 | EXPORT_SYMBOL(dma_fence_default_wait); | |
431 | ||
432 | static bool | |
433 | dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count, | |
434 | uint32_t *idx) | |
435 | { | |
436 | int i; | |
437 | ||
438 | for (i = 0; i < count; ++i) { | |
439 | struct dma_fence *fence = fences[i]; | |
440 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { | |
441 | if (idx) | |
442 | *idx = i; | |
443 | return true; | |
444 | } | |
445 | } | |
446 | return false; | |
447 | } | |
448 | ||
449 | /** | |
450 | * dma_fence_wait_any_timeout - sleep until any fence gets signaled | |
451 | * or until timeout elapses | |
452 | * @fences: [in] array of fences to wait on | |
453 | * @count: [in] number of fences to wait on | |
454 | * @intr: [in] if true, do an interruptible wait | |
455 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
456 | * @idx: [out] the first signaled fence index, meaningful only on | |
457 | * positive return | |
458 | * | |
459 | * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if | |
460 | * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies | |
461 | * on success. | |
462 | * | |
463 | * Synchronous waits for the first fence in the array to be signaled. The | |
464 | * caller needs to hold a reference to all fences in the array, otherwise a | |
465 | * fence might be freed before return, resulting in undefined behavior. | |
466 | */ | |
467 | signed long | |
468 | dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, | |
469 | bool intr, signed long timeout, uint32_t *idx) | |
470 | { | |
471 | struct default_wait_cb *cb; | |
472 | signed long ret = timeout; | |
473 | unsigned i; | |
474 | ||
475 | if (WARN_ON(!fences || !count || timeout < 0)) | |
476 | return -EINVAL; | |
477 | ||
478 | if (timeout == 0) { | |
479 | for (i = 0; i < count; ++i) | |
480 | if (dma_fence_is_signaled(fences[i])) { | |
481 | if (idx) | |
482 | *idx = i; | |
483 | return 1; | |
484 | } | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL); | |
490 | if (cb == NULL) { | |
491 | ret = -ENOMEM; | |
492 | goto err_free_cb; | |
493 | } | |
494 | ||
495 | for (i = 0; i < count; ++i) { | |
496 | struct dma_fence *fence = fences[i]; | |
497 | ||
498 | if (fence->ops->wait != dma_fence_default_wait) { | |
499 | ret = -EINVAL; | |
500 | goto fence_rm_cb; | |
501 | } | |
502 | ||
503 | cb[i].task = current; | |
504 | if (dma_fence_add_callback(fence, &cb[i].base, | |
505 | dma_fence_default_wait_cb)) { | |
506 | /* This fence is already signaled */ | |
507 | if (idx) | |
508 | *idx = i; | |
509 | goto fence_rm_cb; | |
510 | } | |
511 | } | |
512 | ||
513 | while (ret > 0) { | |
514 | if (intr) | |
515 | set_current_state(TASK_INTERRUPTIBLE); | |
516 | else | |
517 | set_current_state(TASK_UNINTERRUPTIBLE); | |
518 | ||
519 | if (dma_fence_test_signaled_any(fences, count, idx)) | |
520 | break; | |
521 | ||
522 | ret = schedule_timeout(ret); | |
523 | ||
524 | if (ret > 0 && intr && signal_pending(current)) | |
525 | ret = -ERESTARTSYS; | |
526 | } | |
527 | ||
528 | __set_current_state(TASK_RUNNING); | |
529 | ||
530 | fence_rm_cb: | |
531 | while (i-- > 0) | |
532 | dma_fence_remove_callback(fences[i], &cb[i].base); | |
533 | ||
534 | err_free_cb: | |
535 | kfree(cb); | |
536 | ||
537 | return ret; | |
538 | } | |
539 | EXPORT_SYMBOL(dma_fence_wait_any_timeout); | |
540 | ||
541 | /** | |
542 | * dma_fence_init - Initialize a custom fence. | |
543 | * @fence: [in] the fence to initialize | |
544 | * @ops: [in] the dma_fence_ops for operations on this fence | |
545 | * @lock: [in] the irqsafe spinlock to use for locking this fence | |
546 | * @context: [in] the execution context this fence is run on | |
547 | * @seqno: [in] a linear increasing sequence number for this context | |
548 | * | |
549 | * Initializes an allocated fence, the caller doesn't have to keep its | |
550 | * refcount after committing with this fence, but it will need to hold a | |
551 | * refcount again if dma_fence_ops.enable_signaling gets called. This can | |
552 | * be used for other implementing other types of fence. | |
553 | * | |
554 | * context and seqno are used for easy comparison between fences, allowing | |
555 | * to check which fence is later by simply using dma_fence_later. | |
556 | */ | |
557 | void | |
558 | dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, | |
559 | spinlock_t *lock, u64 context, unsigned seqno) | |
560 | { | |
561 | BUG_ON(!lock); | |
562 | BUG_ON(!ops || !ops->wait || !ops->enable_signaling || | |
563 | !ops->get_driver_name || !ops->get_timeline_name); | |
564 | ||
565 | kref_init(&fence->refcount); | |
566 | fence->ops = ops; | |
567 | INIT_LIST_HEAD(&fence->cb_list); | |
568 | fence->lock = lock; | |
569 | fence->context = context; | |
570 | fence->seqno = seqno; | |
571 | fence->flags = 0UL; | |
572 | fence->error = 0; | |
573 | ||
574 | trace_dma_fence_init(fence); | |
575 | } | |
576 | EXPORT_SYMBOL(dma_fence_init); |