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1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include "drmP.h"
31#include "drm.h"
32#include "drm_crtc.h"
33#include "drm_crtc_helper.h"
34#include "drm_edid.h"
35#include "intel_drv.h"
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
47struct intel_crt {
48 struct intel_encoder base;
49 bool force_hotplug_required;
50 u32 adpa_reg;
51};
52
53static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
54{
55 return container_of(intel_attached_encoder(connector),
56 struct intel_crt, base);
57}
58
59static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
60{
61 return container_of(encoder, struct intel_crt, base);
62}
63
64static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
65{
66 struct drm_device *dev = encoder->dev;
67 struct drm_i915_private *dev_priv = dev->dev_private;
68 u32 temp;
69
70 temp = I915_READ(PCH_ADPA);
71 temp &= ~ADPA_DAC_ENABLE;
72
73 switch (mode) {
74 case DRM_MODE_DPMS_ON:
75 temp |= ADPA_DAC_ENABLE;
76 break;
77 case DRM_MODE_DPMS_STANDBY:
78 case DRM_MODE_DPMS_SUSPEND:
79 case DRM_MODE_DPMS_OFF:
80 /* Just leave port enable cleared */
81 break;
82 }
83
84 I915_WRITE(PCH_ADPA, temp);
85}
86
87static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
88{
89 struct drm_device *dev = encoder->dev;
90 struct drm_i915_private *dev_priv = dev->dev_private;
91 u32 temp;
92
93 temp = I915_READ(ADPA);
94 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
95 temp &= ~ADPA_DAC_ENABLE;
96
97 if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
98 mode = DRM_MODE_DPMS_OFF;
99
100 switch (mode) {
101 case DRM_MODE_DPMS_ON:
102 temp |= ADPA_DAC_ENABLE;
103 break;
104 case DRM_MODE_DPMS_STANDBY:
105 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
106 break;
107 case DRM_MODE_DPMS_SUSPEND:
108 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
109 break;
110 case DRM_MODE_DPMS_OFF:
111 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
112 break;
113 }
114
115 I915_WRITE(ADPA, temp);
116}
117
118static int intel_crt_mode_valid(struct drm_connector *connector,
119 struct drm_display_mode *mode)
120{
121 struct drm_device *dev = connector->dev;
122
123 int max_clock = 0;
124 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
125 return MODE_NO_DBLESCAN;
126
127 if (mode->clock < 25000)
128 return MODE_CLOCK_LOW;
129
130 if (IS_GEN2(dev))
131 max_clock = 350000;
132 else
133 max_clock = 400000;
134 if (mode->clock > max_clock)
135 return MODE_CLOCK_HIGH;
136
137 return MODE_OK;
138}
139
140static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
141 const struct drm_display_mode *mode,
142 struct drm_display_mode *adjusted_mode)
143{
144 return true;
145}
146
147static void intel_crt_mode_set(struct drm_encoder *encoder,
148 struct drm_display_mode *mode,
149 struct drm_display_mode *adjusted_mode)
150{
151
152 struct drm_device *dev = encoder->dev;
153 struct drm_crtc *crtc = encoder->crtc;
154 struct intel_crt *crt =
155 intel_encoder_to_crt(to_intel_encoder(encoder));
156 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
157 struct drm_i915_private *dev_priv = dev->dev_private;
158 int dpll_md_reg;
159 u32 adpa, dpll_md;
160
161 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
162
163 /*
164 * Disable separate mode multiplier used when cloning SDVO to CRT
165 * XXX this needs to be adjusted when we really are cloning
166 */
167 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
168 dpll_md = I915_READ(dpll_md_reg);
169 I915_WRITE(dpll_md_reg,
170 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
171 }
172
173 adpa = ADPA_HOTPLUG_BITS;
174 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
175 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
176 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
177 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
178
179 /* For CPT allow 3 pipe config, for others just use A or B */
180 if (HAS_PCH_CPT(dev))
181 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
182 else if (intel_crtc->pipe == 0)
183 adpa |= ADPA_PIPE_A_SELECT;
184 else
185 adpa |= ADPA_PIPE_B_SELECT;
186
187 if (!HAS_PCH_SPLIT(dev))
188 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
189
190 I915_WRITE(crt->adpa_reg, adpa);
191}
192
193static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
194{
195 struct drm_device *dev = connector->dev;
196 struct intel_crt *crt = intel_attached_crt(connector);
197 struct drm_i915_private *dev_priv = dev->dev_private;
198 u32 adpa;
199 bool ret;
200
201 /* The first time through, trigger an explicit detection cycle */
202 if (crt->force_hotplug_required) {
203 bool turn_off_dac = HAS_PCH_SPLIT(dev);
204 u32 save_adpa;
205
206 crt->force_hotplug_required = 0;
207
208 save_adpa = adpa = I915_READ(PCH_ADPA);
209 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
210
211 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
212 if (turn_off_dac)
213 adpa &= ~ADPA_DAC_ENABLE;
214
215 I915_WRITE(PCH_ADPA, adpa);
216
217 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
218 1000))
219 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
220
221 if (turn_off_dac) {
222 I915_WRITE(PCH_ADPA, save_adpa);
223 POSTING_READ(PCH_ADPA);
224 }
225 }
226
227 /* Check the status to see if both blue and green are on now */
228 adpa = I915_READ(PCH_ADPA);
229 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
230 ret = true;
231 else
232 ret = false;
233 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
234
235 return ret;
236}
237
238static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
239{
240 struct drm_device *dev = connector->dev;
241 struct drm_i915_private *dev_priv = dev->dev_private;
242 u32 adpa;
243 bool ret;
244 u32 save_adpa;
245
246 save_adpa = adpa = I915_READ(ADPA);
247 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
248
249 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
250
251 I915_WRITE(ADPA, adpa);
252
253 if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
254 1000)) {
255 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
256 I915_WRITE(ADPA, save_adpa);
257 }
258
259 /* Check the status to see if both blue and green are on now */
260 adpa = I915_READ(ADPA);
261 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
262 ret = true;
263 else
264 ret = false;
265
266 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
267
268 /* FIXME: debug force function and remove */
269 ret = true;
270
271 return ret;
272}
273
274/**
275 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
276 *
277 * Not for i915G/i915GM
278 *
279 * \return true if CRT is connected.
280 * \return false if CRT is disconnected.
281 */
282static bool intel_crt_detect_hotplug(struct drm_connector *connector)
283{
284 struct drm_device *dev = connector->dev;
285 struct drm_i915_private *dev_priv = dev->dev_private;
286 u32 hotplug_en, orig, stat;
287 bool ret = false;
288 int i, tries = 0;
289
290 if (HAS_PCH_SPLIT(dev))
291 return intel_ironlake_crt_detect_hotplug(connector);
292
293 if (IS_VALLEYVIEW(dev))
294 return valleyview_crt_detect_hotplug(connector);
295
296 /*
297 * On 4 series desktop, CRT detect sequence need to be done twice
298 * to get a reliable result.
299 */
300
301 if (IS_G4X(dev) && !IS_GM45(dev))
302 tries = 2;
303 else
304 tries = 1;
305 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
306 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
307
308 for (i = 0; i < tries ; i++) {
309 /* turn on the FORCE_DETECT */
310 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
311 /* wait for FORCE_DETECT to go off */
312 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
313 CRT_HOTPLUG_FORCE_DETECT) == 0,
314 1000))
315 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
316 }
317
318 stat = I915_READ(PORT_HOTPLUG_STAT);
319 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
320 ret = true;
321
322 /* clear the interrupt we just generated, if any */
323 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
324
325 /* and put the bits back */
326 I915_WRITE(PORT_HOTPLUG_EN, orig);
327
328 return ret;
329}
330
331static bool intel_crt_detect_ddc(struct drm_connector *connector)
332{
333 struct intel_crt *crt = intel_attached_crt(connector);
334 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
335 struct edid *edid;
336 struct i2c_adapter *i2c;
337
338 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
339
340 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
341 edid = drm_get_edid(connector, i2c);
342
343 if (edid) {
344 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
345
346 /*
347 * This may be a DVI-I connector with a shared DDC
348 * link between analog and digital outputs, so we
349 * have to check the EDID input spec of the attached device.
350 */
351 if (!is_digital) {
352 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
353 return true;
354 }
355
356 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
357 } else {
358 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
359 }
360
361 kfree(edid);
362
363 return false;
364}
365
366static enum drm_connector_status
367intel_crt_load_detect(struct intel_crt *crt)
368{
369 struct drm_device *dev = crt->base.base.dev;
370 struct drm_i915_private *dev_priv = dev->dev_private;
371 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
372 uint32_t save_bclrpat;
373 uint32_t save_vtotal;
374 uint32_t vtotal, vactive;
375 uint32_t vsample;
376 uint32_t vblank, vblank_start, vblank_end;
377 uint32_t dsl;
378 uint32_t bclrpat_reg;
379 uint32_t vtotal_reg;
380 uint32_t vblank_reg;
381 uint32_t vsync_reg;
382 uint32_t pipeconf_reg;
383 uint32_t pipe_dsl_reg;
384 uint8_t st00;
385 enum drm_connector_status status;
386
387 DRM_DEBUG_KMS("starting load-detect on CRT\n");
388
389 bclrpat_reg = BCLRPAT(pipe);
390 vtotal_reg = VTOTAL(pipe);
391 vblank_reg = VBLANK(pipe);
392 vsync_reg = VSYNC(pipe);
393 pipeconf_reg = PIPECONF(pipe);
394 pipe_dsl_reg = PIPEDSL(pipe);
395
396 save_bclrpat = I915_READ(bclrpat_reg);
397 save_vtotal = I915_READ(vtotal_reg);
398 vblank = I915_READ(vblank_reg);
399
400 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
401 vactive = (save_vtotal & 0x7ff) + 1;
402
403 vblank_start = (vblank & 0xfff) + 1;
404 vblank_end = ((vblank >> 16) & 0xfff) + 1;
405
406 /* Set the border color to purple. */
407 I915_WRITE(bclrpat_reg, 0x500050);
408
409 if (!IS_GEN2(dev)) {
410 uint32_t pipeconf = I915_READ(pipeconf_reg);
411 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
412 POSTING_READ(pipeconf_reg);
413 /* Wait for next Vblank to substitue
414 * border color for Color info */
415 intel_wait_for_vblank(dev, pipe);
416 st00 = I915_READ8(VGA_MSR_WRITE);
417 status = ((st00 & (1 << 4)) != 0) ?
418 connector_status_connected :
419 connector_status_disconnected;
420
421 I915_WRITE(pipeconf_reg, pipeconf);
422 } else {
423 bool restore_vblank = false;
424 int count, detect;
425
426 /*
427 * If there isn't any border, add some.
428 * Yes, this will flicker
429 */
430 if (vblank_start <= vactive && vblank_end >= vtotal) {
431 uint32_t vsync = I915_READ(vsync_reg);
432 uint32_t vsync_start = (vsync & 0xffff) + 1;
433
434 vblank_start = vsync_start;
435 I915_WRITE(vblank_reg,
436 (vblank_start - 1) |
437 ((vblank_end - 1) << 16));
438 restore_vblank = true;
439 }
440 /* sample in the vertical border, selecting the larger one */
441 if (vblank_start - vactive >= vtotal - vblank_end)
442 vsample = (vblank_start + vactive) >> 1;
443 else
444 vsample = (vtotal + vblank_end) >> 1;
445
446 /*
447 * Wait for the border to be displayed
448 */
449 while (I915_READ(pipe_dsl_reg) >= vactive)
450 ;
451 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
452 ;
453 /*
454 * Watch ST00 for an entire scanline
455 */
456 detect = 0;
457 count = 0;
458 do {
459 count++;
460 /* Read the ST00 VGA status register */
461 st00 = I915_READ8(VGA_MSR_WRITE);
462 if (st00 & (1 << 4))
463 detect++;
464 } while ((I915_READ(pipe_dsl_reg) == dsl));
465
466 /* restore vblank if necessary */
467 if (restore_vblank)
468 I915_WRITE(vblank_reg, vblank);
469 /*
470 * If more than 3/4 of the scanline detected a monitor,
471 * then it is assumed to be present. This works even on i830,
472 * where there isn't any way to force the border color across
473 * the screen
474 */
475 status = detect * 4 > count * 3 ?
476 connector_status_connected :
477 connector_status_disconnected;
478 }
479
480 /* Restore previous settings */
481 I915_WRITE(bclrpat_reg, save_bclrpat);
482
483 return status;
484}
485
486static enum drm_connector_status
487intel_crt_detect(struct drm_connector *connector, bool force)
488{
489 struct drm_device *dev = connector->dev;
490 struct intel_crt *crt = intel_attached_crt(connector);
491 enum drm_connector_status status;
492 struct intel_load_detect_pipe tmp;
493
494 if (I915_HAS_HOTPLUG(dev)) {
495 /* We can not rely on the HPD pin always being correctly wired
496 * up, for example many KVM do not pass it through, and so
497 * only trust an assertion that the monitor is connected.
498 */
499 if (intel_crt_detect_hotplug(connector)) {
500 DRM_DEBUG_KMS("CRT detected via hotplug\n");
501 return connector_status_connected;
502 } else
503 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
504 }
505
506 if (intel_crt_detect_ddc(connector))
507 return connector_status_connected;
508
509 /* Load detection is broken on HPD capable machines. Whoever wants a
510 * broken monitor (without edid) to work behind a broken kvm (that fails
511 * to have the right resistors for HP detection) needs to fix this up.
512 * For now just bail out. */
513 if (I915_HAS_HOTPLUG(dev))
514 return connector_status_disconnected;
515
516 if (!force)
517 return connector->status;
518
519 /* for pre-945g platforms use load detect */
520 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
521 if (intel_crt_detect_ddc(connector))
522 status = connector_status_connected;
523 else
524 status = intel_crt_load_detect(crt);
525 intel_release_load_detect_pipe(connector, &tmp);
526 } else
527 status = connector_status_unknown;
528
529 return status;
530}
531
532static void intel_crt_destroy(struct drm_connector *connector)
533{
534 drm_sysfs_connector_remove(connector);
535 drm_connector_cleanup(connector);
536 kfree(connector);
537}
538
539static int intel_crt_get_modes(struct drm_connector *connector)
540{
541 struct drm_device *dev = connector->dev;
542 struct drm_i915_private *dev_priv = dev->dev_private;
543 int ret;
544 struct i2c_adapter *i2c;
545
546 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
547 ret = intel_ddc_get_modes(connector, i2c);
548 if (ret || !IS_G4X(dev))
549 return ret;
550
551 /* Try to probe digital port for output in DVI-I -> VGA mode. */
552 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
553 return intel_ddc_get_modes(connector, i2c);
554}
555
556static int intel_crt_set_property(struct drm_connector *connector,
557 struct drm_property *property,
558 uint64_t value)
559{
560 return 0;
561}
562
563static void intel_crt_reset(struct drm_connector *connector)
564{
565 struct drm_device *dev = connector->dev;
566 struct intel_crt *crt = intel_attached_crt(connector);
567
568 if (HAS_PCH_SPLIT(dev))
569 crt->force_hotplug_required = 1;
570}
571
572/*
573 * Routines for controlling stuff on the analog port
574 */
575
576static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
577 .mode_fixup = intel_crt_mode_fixup,
578 .prepare = intel_encoder_prepare,
579 .commit = intel_encoder_commit,
580 .mode_set = intel_crt_mode_set,
581 .dpms = pch_crt_dpms,
582};
583
584static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
585 .mode_fixup = intel_crt_mode_fixup,
586 .prepare = intel_encoder_prepare,
587 .commit = intel_encoder_commit,
588 .mode_set = intel_crt_mode_set,
589 .dpms = gmch_crt_dpms,
590};
591
592static const struct drm_connector_funcs intel_crt_connector_funcs = {
593 .reset = intel_crt_reset,
594 .dpms = drm_helper_connector_dpms,
595 .detect = intel_crt_detect,
596 .fill_modes = drm_helper_probe_single_connector_modes,
597 .destroy = intel_crt_destroy,
598 .set_property = intel_crt_set_property,
599};
600
601static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
602 .mode_valid = intel_crt_mode_valid,
603 .get_modes = intel_crt_get_modes,
604 .best_encoder = intel_best_encoder,
605};
606
607static const struct drm_encoder_funcs intel_crt_enc_funcs = {
608 .destroy = intel_encoder_destroy,
609};
610
611static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
612{
613 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
614 return 1;
615}
616
617static const struct dmi_system_id intel_no_crt[] = {
618 {
619 .callback = intel_no_crt_dmi_callback,
620 .ident = "ACER ZGB",
621 .matches = {
622 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
623 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
624 },
625 },
626 { }
627};
628
629void intel_crt_init(struct drm_device *dev)
630{
631 struct drm_connector *connector;
632 struct intel_crt *crt;
633 struct intel_connector *intel_connector;
634 struct drm_i915_private *dev_priv = dev->dev_private;
635 const struct drm_encoder_helper_funcs *encoder_helper_funcs;
636
637 /* Skip machines without VGA that falsely report hotplug events */
638 if (dmi_check_system(intel_no_crt))
639 return;
640
641 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
642 if (!crt)
643 return;
644
645 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
646 if (!intel_connector) {
647 kfree(crt);
648 return;
649 }
650
651 connector = &intel_connector->base;
652 drm_connector_init(dev, &intel_connector->base,
653 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
654
655 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
656 DRM_MODE_ENCODER_DAC);
657
658 intel_connector_attach_encoder(intel_connector, &crt->base);
659
660 crt->base.type = INTEL_OUTPUT_ANALOG;
661 crt->base.cloneable = true;
662 if (IS_HASWELL(dev))
663 crt->base.crtc_mask = (1 << 0);
664 else
665 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
666
667 if (IS_GEN2(dev))
668 connector->interlace_allowed = 0;
669 else
670 connector->interlace_allowed = 1;
671 connector->doublescan_allowed = 0;
672
673 if (HAS_PCH_SPLIT(dev))
674 encoder_helper_funcs = &pch_encoder_funcs;
675 else
676 encoder_helper_funcs = &gmch_encoder_funcs;
677
678 if (HAS_PCH_SPLIT(dev))
679 crt->adpa_reg = PCH_ADPA;
680 else if (IS_VALLEYVIEW(dev))
681 crt->adpa_reg = VLV_ADPA;
682 else
683 crt->adpa_reg = ADPA;
684
685 drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
686 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
687
688 drm_sysfs_connector_add(connector);
689
690 if (I915_HAS_HOTPLUG(dev))
691 connector->polled = DRM_CONNECTOR_POLL_HPD;
692 else
693 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
694
695 /*
696 * Configure the automatic hotplug detection stuff
697 */
698 crt->force_hotplug_required = 0;
699 if (HAS_PCH_SPLIT(dev)) {
700 u32 adpa;
701
702 adpa = I915_READ(PCH_ADPA);
703 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
704 adpa |= ADPA_HOTPLUG_BITS;
705 I915_WRITE(PCH_ADPA, adpa);
706 POSTING_READ(PCH_ADPA);
707
708 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
709 crt->force_hotplug_required = 1;
710 }
711
712 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
713}