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1 | /* | |
2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> | |
3 | * Copyright © 2006-2007 Intel Corporation | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | */ | |
27 | #include <linux/i2c.h> | |
28 | #include <linux/slab.h> | |
29 | #include <drm/drmP.h> | |
30 | #include <drm/drm_crtc.h> | |
31 | #include "intel_drv.h" | |
32 | #include <drm/i915_drm.h> | |
33 | #include "i915_drv.h" | |
34 | #include "dvo.h" | |
35 | ||
36 | #define SIL164_ADDR 0x38 | |
37 | #define CH7xxx_ADDR 0x76 | |
38 | #define TFP410_ADDR 0x38 | |
39 | #define NS2501_ADDR 0x38 | |
40 | ||
41 | static const struct intel_dvo_device intel_dvo_devices[] = { | |
42 | { | |
43 | .type = INTEL_DVO_CHIP_TMDS, | |
44 | .name = "sil164", | |
45 | .dvo_reg = DVOC, | |
46 | .slave_addr = SIL164_ADDR, | |
47 | .dev_ops = &sil164_ops, | |
48 | }, | |
49 | { | |
50 | .type = INTEL_DVO_CHIP_TMDS, | |
51 | .name = "ch7xxx", | |
52 | .dvo_reg = DVOC, | |
53 | .slave_addr = CH7xxx_ADDR, | |
54 | .dev_ops = &ch7xxx_ops, | |
55 | }, | |
56 | { | |
57 | .type = INTEL_DVO_CHIP_TMDS, | |
58 | .name = "ch7xxx", | |
59 | .dvo_reg = DVOC, | |
60 | .slave_addr = 0x75, /* For some ch7010 */ | |
61 | .dev_ops = &ch7xxx_ops, | |
62 | }, | |
63 | { | |
64 | .type = INTEL_DVO_CHIP_LVDS, | |
65 | .name = "ivch", | |
66 | .dvo_reg = DVOA, | |
67 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ | |
68 | .dev_ops = &ivch_ops, | |
69 | }, | |
70 | { | |
71 | .type = INTEL_DVO_CHIP_TMDS, | |
72 | .name = "tfp410", | |
73 | .dvo_reg = DVOC, | |
74 | .slave_addr = TFP410_ADDR, | |
75 | .dev_ops = &tfp410_ops, | |
76 | }, | |
77 | { | |
78 | .type = INTEL_DVO_CHIP_LVDS, | |
79 | .name = "ch7017", | |
80 | .dvo_reg = DVOC, | |
81 | .slave_addr = 0x75, | |
82 | .gpio = GMBUS_PORT_DPB, | |
83 | .dev_ops = &ch7017_ops, | |
84 | }, | |
85 | { | |
86 | .type = INTEL_DVO_CHIP_TMDS, | |
87 | .name = "ns2501", | |
88 | .dvo_reg = DVOC, | |
89 | .slave_addr = NS2501_ADDR, | |
90 | .dev_ops = &ns2501_ops, | |
91 | } | |
92 | }; | |
93 | ||
94 | struct intel_dvo { | |
95 | struct intel_encoder base; | |
96 | ||
97 | struct intel_dvo_device dev; | |
98 | ||
99 | struct drm_display_mode *panel_fixed_mode; | |
100 | bool panel_wants_dither; | |
101 | }; | |
102 | ||
103 | static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) | |
104 | { | |
105 | return container_of(encoder, struct intel_dvo, base); | |
106 | } | |
107 | ||
108 | static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) | |
109 | { | |
110 | return enc_to_dvo(intel_attached_encoder(connector)); | |
111 | } | |
112 | ||
113 | static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) | |
114 | { | |
115 | struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); | |
116 | ||
117 | return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); | |
118 | } | |
119 | ||
120 | static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, | |
121 | enum pipe *pipe) | |
122 | { | |
123 | struct drm_device *dev = encoder->base.dev; | |
124 | struct drm_i915_private *dev_priv = dev->dev_private; | |
125 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
126 | u32 tmp; | |
127 | ||
128 | tmp = I915_READ(intel_dvo->dev.dvo_reg); | |
129 | ||
130 | if (!(tmp & DVO_ENABLE)) | |
131 | return false; | |
132 | ||
133 | *pipe = PORT_TO_PIPE(tmp); | |
134 | ||
135 | return true; | |
136 | } | |
137 | ||
138 | static void intel_dvo_get_config(struct intel_encoder *encoder, | |
139 | struct intel_crtc_config *pipe_config) | |
140 | { | |
141 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | |
142 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
143 | u32 tmp, flags = 0; | |
144 | ||
145 | tmp = I915_READ(intel_dvo->dev.dvo_reg); | |
146 | if (tmp & DVO_HSYNC_ACTIVE_HIGH) | |
147 | flags |= DRM_MODE_FLAG_PHSYNC; | |
148 | else | |
149 | flags |= DRM_MODE_FLAG_NHSYNC; | |
150 | if (tmp & DVO_VSYNC_ACTIVE_HIGH) | |
151 | flags |= DRM_MODE_FLAG_PVSYNC; | |
152 | else | |
153 | flags |= DRM_MODE_FLAG_NVSYNC; | |
154 | ||
155 | pipe_config->adjusted_mode.flags |= flags; | |
156 | ||
157 | pipe_config->adjusted_mode.clock = pipe_config->port_clock; | |
158 | } | |
159 | ||
160 | static void intel_disable_dvo(struct intel_encoder *encoder) | |
161 | { | |
162 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | |
163 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
164 | u32 dvo_reg = intel_dvo->dev.dvo_reg; | |
165 | u32 temp = I915_READ(dvo_reg); | |
166 | ||
167 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); | |
168 | I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); | |
169 | I915_READ(dvo_reg); | |
170 | } | |
171 | ||
172 | static void intel_enable_dvo(struct intel_encoder *encoder) | |
173 | { | |
174 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | |
175 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
176 | u32 dvo_reg = intel_dvo->dev.dvo_reg; | |
177 | u32 temp = I915_READ(dvo_reg); | |
178 | ||
179 | I915_WRITE(dvo_reg, temp | DVO_ENABLE); | |
180 | I915_READ(dvo_reg); | |
181 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); | |
182 | } | |
183 | ||
184 | /* Special dpms function to support cloning between dvo/sdvo/crt. */ | |
185 | static void intel_dvo_dpms(struct drm_connector *connector, int mode) | |
186 | { | |
187 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); | |
188 | struct drm_crtc *crtc; | |
189 | ||
190 | /* dvo supports only 2 dpms states. */ | |
191 | if (mode != DRM_MODE_DPMS_ON) | |
192 | mode = DRM_MODE_DPMS_OFF; | |
193 | ||
194 | if (mode == connector->dpms) | |
195 | return; | |
196 | ||
197 | connector->dpms = mode; | |
198 | ||
199 | /* Only need to change hw state when actually enabled */ | |
200 | crtc = intel_dvo->base.base.crtc; | |
201 | if (!crtc) { | |
202 | intel_dvo->base.connectors_active = false; | |
203 | return; | |
204 | } | |
205 | ||
206 | /* We call connector dpms manually below in case pipe dpms doesn't | |
207 | * change due to cloning. */ | |
208 | if (mode == DRM_MODE_DPMS_ON) { | |
209 | intel_dvo->base.connectors_active = true; | |
210 | ||
211 | intel_crtc_update_dpms(crtc); | |
212 | ||
213 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); | |
214 | } else { | |
215 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); | |
216 | ||
217 | intel_dvo->base.connectors_active = false; | |
218 | ||
219 | intel_crtc_update_dpms(crtc); | |
220 | } | |
221 | ||
222 | intel_modeset_check_state(connector->dev); | |
223 | } | |
224 | ||
225 | static int intel_dvo_mode_valid(struct drm_connector *connector, | |
226 | struct drm_display_mode *mode) | |
227 | { | |
228 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); | |
229 | ||
230 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
231 | return MODE_NO_DBLESCAN; | |
232 | ||
233 | /* XXX: Validate clock range */ | |
234 | ||
235 | if (intel_dvo->panel_fixed_mode) { | |
236 | if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) | |
237 | return MODE_PANEL; | |
238 | if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) | |
239 | return MODE_PANEL; | |
240 | } | |
241 | ||
242 | return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); | |
243 | } | |
244 | ||
245 | static bool intel_dvo_compute_config(struct intel_encoder *encoder, | |
246 | struct intel_crtc_config *pipe_config) | |
247 | { | |
248 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
249 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
250 | ||
251 | /* If we have timings from the BIOS for the panel, put them in | |
252 | * to the adjusted mode. The CRTC will be set up for this mode, | |
253 | * with the panel scaling set up to source from the H/VDisplay | |
254 | * of the original mode. | |
255 | */ | |
256 | if (intel_dvo->panel_fixed_mode != NULL) { | |
257 | #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x | |
258 | C(hdisplay); | |
259 | C(hsync_start); | |
260 | C(hsync_end); | |
261 | C(htotal); | |
262 | C(vdisplay); | |
263 | C(vsync_start); | |
264 | C(vsync_end); | |
265 | C(vtotal); | |
266 | C(clock); | |
267 | #undef C | |
268 | ||
269 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
270 | } | |
271 | ||
272 | return true; | |
273 | } | |
274 | ||
275 | static void intel_dvo_mode_set(struct intel_encoder *encoder) | |
276 | { | |
277 | struct drm_device *dev = encoder->base.dev; | |
278 | struct drm_i915_private *dev_priv = dev->dev_private; | |
279 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
280 | struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; | |
281 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); | |
282 | int pipe = crtc->pipe; | |
283 | u32 dvo_val; | |
284 | u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; | |
285 | ||
286 | switch (dvo_reg) { | |
287 | case DVOA: | |
288 | default: | |
289 | dvo_srcdim_reg = DVOA_SRCDIM; | |
290 | break; | |
291 | case DVOB: | |
292 | dvo_srcdim_reg = DVOB_SRCDIM; | |
293 | break; | |
294 | case DVOC: | |
295 | dvo_srcdim_reg = DVOC_SRCDIM; | |
296 | break; | |
297 | } | |
298 | ||
299 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, | |
300 | &crtc->config.requested_mode, | |
301 | adjusted_mode); | |
302 | ||
303 | /* Save the data order, since I don't know what it should be set to. */ | |
304 | dvo_val = I915_READ(dvo_reg) & | |
305 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); | |
306 | dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | | |
307 | DVO_BLANK_ACTIVE_HIGH; | |
308 | ||
309 | if (pipe == 1) | |
310 | dvo_val |= DVO_PIPE_B_SELECT; | |
311 | dvo_val |= DVO_PIPE_STALL; | |
312 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | |
313 | dvo_val |= DVO_HSYNC_ACTIVE_HIGH; | |
314 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | |
315 | dvo_val |= DVO_VSYNC_ACTIVE_HIGH; | |
316 | ||
317 | /*I915_WRITE(DVOB_SRCDIM, | |
318 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | | |
319 | (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ | |
320 | I915_WRITE(dvo_srcdim_reg, | |
321 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | | |
322 | (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); | |
323 | /*I915_WRITE(DVOB, dvo_val);*/ | |
324 | I915_WRITE(dvo_reg, dvo_val); | |
325 | } | |
326 | ||
327 | /** | |
328 | * Detect the output connection on our DVO device. | |
329 | * | |
330 | * Unimplemented. | |
331 | */ | |
332 | static enum drm_connector_status | |
333 | intel_dvo_detect(struct drm_connector *connector, bool force) | |
334 | { | |
335 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); | |
336 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", | |
337 | connector->base.id, drm_get_connector_name(connector)); | |
338 | return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); | |
339 | } | |
340 | ||
341 | static int intel_dvo_get_modes(struct drm_connector *connector) | |
342 | { | |
343 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); | |
344 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | |
345 | ||
346 | /* We should probably have an i2c driver get_modes function for those | |
347 | * devices which will have a fixed set of modes determined by the chip | |
348 | * (TV-out, for example), but for now with just TMDS and LVDS, | |
349 | * that's not the case. | |
350 | */ | |
351 | intel_ddc_get_modes(connector, | |
352 | intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); | |
353 | if (!list_empty(&connector->probed_modes)) | |
354 | return 1; | |
355 | ||
356 | if (intel_dvo->panel_fixed_mode != NULL) { | |
357 | struct drm_display_mode *mode; | |
358 | mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); | |
359 | if (mode) { | |
360 | drm_mode_probed_add(connector, mode); | |
361 | return 1; | |
362 | } | |
363 | } | |
364 | ||
365 | return 0; | |
366 | } | |
367 | ||
368 | static void intel_dvo_destroy(struct drm_connector *connector) | |
369 | { | |
370 | drm_sysfs_connector_remove(connector); | |
371 | drm_connector_cleanup(connector); | |
372 | kfree(connector); | |
373 | } | |
374 | ||
375 | static const struct drm_connector_funcs intel_dvo_connector_funcs = { | |
376 | .dpms = intel_dvo_dpms, | |
377 | .detect = intel_dvo_detect, | |
378 | .destroy = intel_dvo_destroy, | |
379 | .fill_modes = drm_helper_probe_single_connector_modes, | |
380 | }; | |
381 | ||
382 | static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { | |
383 | .mode_valid = intel_dvo_mode_valid, | |
384 | .get_modes = intel_dvo_get_modes, | |
385 | .best_encoder = intel_best_encoder, | |
386 | }; | |
387 | ||
388 | static void intel_dvo_enc_destroy(struct drm_encoder *encoder) | |
389 | { | |
390 | struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); | |
391 | ||
392 | if (intel_dvo->dev.dev_ops->destroy) | |
393 | intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); | |
394 | ||
395 | kfree(intel_dvo->panel_fixed_mode); | |
396 | ||
397 | intel_encoder_destroy(encoder); | |
398 | } | |
399 | ||
400 | static const struct drm_encoder_funcs intel_dvo_enc_funcs = { | |
401 | .destroy = intel_dvo_enc_destroy, | |
402 | }; | |
403 | ||
404 | /** | |
405 | * Attempts to get a fixed panel timing for LVDS (currently only the i830). | |
406 | * | |
407 | * Other chips with DVO LVDS will need to extend this to deal with the LVDS | |
408 | * chip being on DVOB/C and having multiple pipes. | |
409 | */ | |
410 | static struct drm_display_mode * | |
411 | intel_dvo_get_current_mode(struct drm_connector *connector) | |
412 | { | |
413 | struct drm_device *dev = connector->dev; | |
414 | struct drm_i915_private *dev_priv = dev->dev_private; | |
415 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); | |
416 | uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); | |
417 | struct drm_display_mode *mode = NULL; | |
418 | ||
419 | /* If the DVO port is active, that'll be the LVDS, so we can pull out | |
420 | * its timings to get how the BIOS set up the panel. | |
421 | */ | |
422 | if (dvo_val & DVO_ENABLE) { | |
423 | struct drm_crtc *crtc; | |
424 | int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; | |
425 | ||
426 | crtc = intel_get_crtc_for_pipe(dev, pipe); | |
427 | if (crtc) { | |
428 | mode = intel_crtc_mode_get(dev, crtc); | |
429 | if (mode) { | |
430 | mode->type |= DRM_MODE_TYPE_PREFERRED; | |
431 | if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) | |
432 | mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
433 | if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) | |
434 | mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
435 | } | |
436 | } | |
437 | } | |
438 | ||
439 | return mode; | |
440 | } | |
441 | ||
442 | void intel_dvo_init(struct drm_device *dev) | |
443 | { | |
444 | struct drm_i915_private *dev_priv = dev->dev_private; | |
445 | struct intel_encoder *intel_encoder; | |
446 | struct intel_dvo *intel_dvo; | |
447 | struct intel_connector *intel_connector; | |
448 | int i; | |
449 | int encoder_type = DRM_MODE_ENCODER_NONE; | |
450 | ||
451 | intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); | |
452 | if (!intel_dvo) | |
453 | return; | |
454 | ||
455 | intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); | |
456 | if (!intel_connector) { | |
457 | kfree(intel_dvo); | |
458 | return; | |
459 | } | |
460 | ||
461 | intel_encoder = &intel_dvo->base; | |
462 | drm_encoder_init(dev, &intel_encoder->base, | |
463 | &intel_dvo_enc_funcs, encoder_type); | |
464 | ||
465 | intel_encoder->disable = intel_disable_dvo; | |
466 | intel_encoder->enable = intel_enable_dvo; | |
467 | intel_encoder->get_hw_state = intel_dvo_get_hw_state; | |
468 | intel_encoder->get_config = intel_dvo_get_config; | |
469 | intel_encoder->compute_config = intel_dvo_compute_config; | |
470 | intel_encoder->mode_set = intel_dvo_mode_set; | |
471 | intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; | |
472 | ||
473 | /* Now, try to find a controller */ | |
474 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { | |
475 | struct drm_connector *connector = &intel_connector->base; | |
476 | const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; | |
477 | struct i2c_adapter *i2c; | |
478 | int gpio; | |
479 | bool dvoinit; | |
480 | ||
481 | /* Allow the I2C driver info to specify the GPIO to be used in | |
482 | * special cases, but otherwise default to what's defined | |
483 | * in the spec. | |
484 | */ | |
485 | if (intel_gmbus_is_port_valid(dvo->gpio)) | |
486 | gpio = dvo->gpio; | |
487 | else if (dvo->type == INTEL_DVO_CHIP_LVDS) | |
488 | gpio = GMBUS_PORT_SSC; | |
489 | else | |
490 | gpio = GMBUS_PORT_DPB; | |
491 | ||
492 | /* Set up the I2C bus necessary for the chip we're probing. | |
493 | * It appears that everything is on GPIOE except for panels | |
494 | * on i830 laptops, which are on GPIOB (DVOA). | |
495 | */ | |
496 | i2c = intel_gmbus_get_adapter(dev_priv, gpio); | |
497 | ||
498 | intel_dvo->dev = *dvo; | |
499 | ||
500 | /* GMBUS NAK handling seems to be unstable, hence let the | |
501 | * transmitter detection run in bit banging mode for now. | |
502 | */ | |
503 | intel_gmbus_force_bit(i2c, true); | |
504 | ||
505 | dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); | |
506 | ||
507 | intel_gmbus_force_bit(i2c, false); | |
508 | ||
509 | if (!dvoinit) | |
510 | continue; | |
511 | ||
512 | intel_encoder->type = INTEL_OUTPUT_DVO; | |
513 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); | |
514 | switch (dvo->type) { | |
515 | case INTEL_DVO_CHIP_TMDS: | |
516 | intel_encoder->cloneable = true; | |
517 | drm_connector_init(dev, connector, | |
518 | &intel_dvo_connector_funcs, | |
519 | DRM_MODE_CONNECTOR_DVII); | |
520 | encoder_type = DRM_MODE_ENCODER_TMDS; | |
521 | break; | |
522 | case INTEL_DVO_CHIP_LVDS: | |
523 | intel_encoder->cloneable = false; | |
524 | drm_connector_init(dev, connector, | |
525 | &intel_dvo_connector_funcs, | |
526 | DRM_MODE_CONNECTOR_LVDS); | |
527 | encoder_type = DRM_MODE_ENCODER_LVDS; | |
528 | break; | |
529 | } | |
530 | ||
531 | drm_connector_helper_add(connector, | |
532 | &intel_dvo_connector_helper_funcs); | |
533 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | |
534 | connector->interlace_allowed = false; | |
535 | connector->doublescan_allowed = false; | |
536 | ||
537 | intel_connector_attach_encoder(intel_connector, intel_encoder); | |
538 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { | |
539 | /* For our LVDS chipsets, we should hopefully be able | |
540 | * to dig the fixed panel mode out of the BIOS data. | |
541 | * However, it's in a different format from the BIOS | |
542 | * data on chipsets with integrated LVDS (stored in AIM | |
543 | * headers, likely), so for now, just get the current | |
544 | * mode being output through DVO. | |
545 | */ | |
546 | intel_dvo->panel_fixed_mode = | |
547 | intel_dvo_get_current_mode(connector); | |
548 | intel_dvo->panel_wants_dither = true; | |
549 | } | |
550 | ||
551 | drm_sysfs_connector_add(connector); | |
552 | return; | |
553 | } | |
554 | ||
555 | drm_encoder_cleanup(&intel_encoder->base); | |
556 | kfree(intel_dvo); | |
557 | kfree(intel_connector); | |
558 | } |