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1 | /* | |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
32 | ||
33 | #include <linux/kernel.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/pwm.h> | |
36 | #include "intel_drv.h" | |
37 | ||
38 | #define CRC_PMIC_PWM_PERIOD_NS 21333 | |
39 | ||
40 | void | |
41 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, | |
42 | struct drm_display_mode *adjusted_mode) | |
43 | { | |
44 | drm_mode_copy(adjusted_mode, fixed_mode); | |
45 | ||
46 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
47 | } | |
48 | ||
49 | /** | |
50 | * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID | |
51 | * @dev: drm device | |
52 | * @fixed_mode : panel native mode | |
53 | * @connector: LVDS/eDP connector | |
54 | * | |
55 | * Return downclock_avail | |
56 | * Find the reduced downclock for LVDS/eDP in EDID. | |
57 | */ | |
58 | struct drm_display_mode * | |
59 | intel_find_panel_downclock(struct drm_device *dev, | |
60 | struct drm_display_mode *fixed_mode, | |
61 | struct drm_connector *connector) | |
62 | { | |
63 | struct drm_display_mode *scan, *tmp_mode; | |
64 | int temp_downclock; | |
65 | ||
66 | temp_downclock = fixed_mode->clock; | |
67 | tmp_mode = NULL; | |
68 | ||
69 | list_for_each_entry(scan, &connector->probed_modes, head) { | |
70 | /* | |
71 | * If one mode has the same resolution with the fixed_panel | |
72 | * mode while they have the different refresh rate, it means | |
73 | * that the reduced downclock is found. In such | |
74 | * case we can set the different FPx0/1 to dynamically select | |
75 | * between low and high frequency. | |
76 | */ | |
77 | if (scan->hdisplay == fixed_mode->hdisplay && | |
78 | scan->hsync_start == fixed_mode->hsync_start && | |
79 | scan->hsync_end == fixed_mode->hsync_end && | |
80 | scan->htotal == fixed_mode->htotal && | |
81 | scan->vdisplay == fixed_mode->vdisplay && | |
82 | scan->vsync_start == fixed_mode->vsync_start && | |
83 | scan->vsync_end == fixed_mode->vsync_end && | |
84 | scan->vtotal == fixed_mode->vtotal) { | |
85 | if (scan->clock < temp_downclock) { | |
86 | /* | |
87 | * The downclock is already found. But we | |
88 | * expect to find the lower downclock. | |
89 | */ | |
90 | temp_downclock = scan->clock; | |
91 | tmp_mode = scan; | |
92 | } | |
93 | } | |
94 | } | |
95 | ||
96 | if (temp_downclock < fixed_mode->clock) | |
97 | return drm_mode_duplicate(dev, tmp_mode); | |
98 | else | |
99 | return NULL; | |
100 | } | |
101 | ||
102 | /* adjusted_mode has been preset to be the panel's fixed mode */ | |
103 | void | |
104 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, | |
105 | struct intel_crtc_state *pipe_config, | |
106 | int fitting_mode) | |
107 | { | |
108 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | |
109 | int x = 0, y = 0, width = 0, height = 0; | |
110 | ||
111 | /* Native modes don't need fitting */ | |
112 | if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && | |
113 | adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) | |
114 | goto done; | |
115 | ||
116 | switch (fitting_mode) { | |
117 | case DRM_MODE_SCALE_CENTER: | |
118 | width = pipe_config->pipe_src_w; | |
119 | height = pipe_config->pipe_src_h; | |
120 | x = (adjusted_mode->crtc_hdisplay - width + 1)/2; | |
121 | y = (adjusted_mode->crtc_vdisplay - height + 1)/2; | |
122 | break; | |
123 | ||
124 | case DRM_MODE_SCALE_ASPECT: | |
125 | /* Scale but preserve the aspect ratio */ | |
126 | { | |
127 | u32 scaled_width = adjusted_mode->crtc_hdisplay | |
128 | * pipe_config->pipe_src_h; | |
129 | u32 scaled_height = pipe_config->pipe_src_w | |
130 | * adjusted_mode->crtc_vdisplay; | |
131 | if (scaled_width > scaled_height) { /* pillar */ | |
132 | width = scaled_height / pipe_config->pipe_src_h; | |
133 | if (width & 1) | |
134 | width++; | |
135 | x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; | |
136 | y = 0; | |
137 | height = adjusted_mode->crtc_vdisplay; | |
138 | } else if (scaled_width < scaled_height) { /* letter */ | |
139 | height = scaled_width / pipe_config->pipe_src_w; | |
140 | if (height & 1) | |
141 | height++; | |
142 | y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; | |
143 | x = 0; | |
144 | width = adjusted_mode->crtc_hdisplay; | |
145 | } else { | |
146 | x = y = 0; | |
147 | width = adjusted_mode->crtc_hdisplay; | |
148 | height = adjusted_mode->crtc_vdisplay; | |
149 | } | |
150 | } | |
151 | break; | |
152 | ||
153 | case DRM_MODE_SCALE_FULLSCREEN: | |
154 | x = y = 0; | |
155 | width = adjusted_mode->crtc_hdisplay; | |
156 | height = adjusted_mode->crtc_vdisplay; | |
157 | break; | |
158 | ||
159 | default: | |
160 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
161 | return; | |
162 | } | |
163 | ||
164 | done: | |
165 | pipe_config->pch_pfit.pos = (x << 16) | y; | |
166 | pipe_config->pch_pfit.size = (width << 16) | height; | |
167 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; | |
168 | } | |
169 | ||
170 | static void | |
171 | centre_horizontally(struct drm_display_mode *adjusted_mode, | |
172 | int width) | |
173 | { | |
174 | u32 border, sync_pos, blank_width, sync_width; | |
175 | ||
176 | /* keep the hsync and hblank widths constant */ | |
177 | sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; | |
178 | blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; | |
179 | sync_pos = (blank_width - sync_width + 1) / 2; | |
180 | ||
181 | border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; | |
182 | border += border & 1; /* make the border even */ | |
183 | ||
184 | adjusted_mode->crtc_hdisplay = width; | |
185 | adjusted_mode->crtc_hblank_start = width + border; | |
186 | adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; | |
187 | ||
188 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; | |
189 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; | |
190 | } | |
191 | ||
192 | static void | |
193 | centre_vertically(struct drm_display_mode *adjusted_mode, | |
194 | int height) | |
195 | { | |
196 | u32 border, sync_pos, blank_width, sync_width; | |
197 | ||
198 | /* keep the vsync and vblank widths constant */ | |
199 | sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; | |
200 | blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; | |
201 | sync_pos = (blank_width - sync_width + 1) / 2; | |
202 | ||
203 | border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; | |
204 | ||
205 | adjusted_mode->crtc_vdisplay = height; | |
206 | adjusted_mode->crtc_vblank_start = height + border; | |
207 | adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; | |
208 | ||
209 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; | |
210 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; | |
211 | } | |
212 | ||
213 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
214 | { | |
215 | /* | |
216 | * Floating point operation is not supported. So the FACTOR | |
217 | * is defined, which can avoid the floating point computation | |
218 | * when calculating the panel ratio. | |
219 | */ | |
220 | #define ACCURACY 12 | |
221 | #define FACTOR (1 << ACCURACY) | |
222 | u32 ratio = source * FACTOR / target; | |
223 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
224 | } | |
225 | ||
226 | static void i965_scale_aspect(struct intel_crtc_state *pipe_config, | |
227 | u32 *pfit_control) | |
228 | { | |
229 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | |
230 | u32 scaled_width = adjusted_mode->crtc_hdisplay * | |
231 | pipe_config->pipe_src_h; | |
232 | u32 scaled_height = pipe_config->pipe_src_w * | |
233 | adjusted_mode->crtc_vdisplay; | |
234 | ||
235 | /* 965+ is easy, it does everything in hw */ | |
236 | if (scaled_width > scaled_height) | |
237 | *pfit_control |= PFIT_ENABLE | | |
238 | PFIT_SCALING_PILLAR; | |
239 | else if (scaled_width < scaled_height) | |
240 | *pfit_control |= PFIT_ENABLE | | |
241 | PFIT_SCALING_LETTER; | |
242 | else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) | |
243 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
244 | } | |
245 | ||
246 | static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, | |
247 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
248 | u32 *border) | |
249 | { | |
250 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | |
251 | u32 scaled_width = adjusted_mode->crtc_hdisplay * | |
252 | pipe_config->pipe_src_h; | |
253 | u32 scaled_height = pipe_config->pipe_src_w * | |
254 | adjusted_mode->crtc_vdisplay; | |
255 | u32 bits; | |
256 | ||
257 | /* | |
258 | * For earlier chips we have to calculate the scaling | |
259 | * ratio by hand and program it into the | |
260 | * PFIT_PGM_RATIO register | |
261 | */ | |
262 | if (scaled_width > scaled_height) { /* pillar */ | |
263 | centre_horizontally(adjusted_mode, | |
264 | scaled_height / | |
265 | pipe_config->pipe_src_h); | |
266 | ||
267 | *border = LVDS_BORDER_ENABLE; | |
268 | if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { | |
269 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
270 | adjusted_mode->crtc_vdisplay); | |
271 | ||
272 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
273 | bits << PFIT_VERT_SCALE_SHIFT); | |
274 | *pfit_control |= (PFIT_ENABLE | | |
275 | VERT_INTERP_BILINEAR | | |
276 | HORIZ_INTERP_BILINEAR); | |
277 | } | |
278 | } else if (scaled_width < scaled_height) { /* letter */ | |
279 | centre_vertically(adjusted_mode, | |
280 | scaled_width / | |
281 | pipe_config->pipe_src_w); | |
282 | ||
283 | *border = LVDS_BORDER_ENABLE; | |
284 | if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { | |
285 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
286 | adjusted_mode->crtc_hdisplay); | |
287 | ||
288 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
289 | bits << PFIT_VERT_SCALE_SHIFT); | |
290 | *pfit_control |= (PFIT_ENABLE | | |
291 | VERT_INTERP_BILINEAR | | |
292 | HORIZ_INTERP_BILINEAR); | |
293 | } | |
294 | } else { | |
295 | /* Aspects match, Let hw scale both directions */ | |
296 | *pfit_control |= (PFIT_ENABLE | | |
297 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
298 | VERT_INTERP_BILINEAR | | |
299 | HORIZ_INTERP_BILINEAR); | |
300 | } | |
301 | } | |
302 | ||
303 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, | |
304 | struct intel_crtc_state *pipe_config, | |
305 | int fitting_mode) | |
306 | { | |
307 | struct drm_device *dev = intel_crtc->base.dev; | |
308 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; | |
309 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; | |
310 | ||
311 | /* Native modes don't need fitting */ | |
312 | if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && | |
313 | adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) | |
314 | goto out; | |
315 | ||
316 | switch (fitting_mode) { | |
317 | case DRM_MODE_SCALE_CENTER: | |
318 | /* | |
319 | * For centered modes, we have to calculate border widths & | |
320 | * heights and modify the values programmed into the CRTC. | |
321 | */ | |
322 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); | |
323 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
324 | border = LVDS_BORDER_ENABLE; | |
325 | break; | |
326 | case DRM_MODE_SCALE_ASPECT: | |
327 | /* Scale but preserve the aspect ratio */ | |
328 | if (INTEL_INFO(dev)->gen >= 4) | |
329 | i965_scale_aspect(pipe_config, &pfit_control); | |
330 | else | |
331 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
332 | &pfit_pgm_ratios, &border); | |
333 | break; | |
334 | case DRM_MODE_SCALE_FULLSCREEN: | |
335 | /* | |
336 | * Full scaling, even if it changes the aspect ratio. | |
337 | * Fortunately this is all done for us in hw. | |
338 | */ | |
339 | if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || | |
340 | pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { | |
341 | pfit_control |= PFIT_ENABLE; | |
342 | if (INTEL_INFO(dev)->gen >= 4) | |
343 | pfit_control |= PFIT_SCALING_AUTO; | |
344 | else | |
345 | pfit_control |= (VERT_AUTO_SCALE | | |
346 | VERT_INTERP_BILINEAR | | |
347 | HORIZ_AUTO_SCALE | | |
348 | HORIZ_INTERP_BILINEAR); | |
349 | } | |
350 | break; | |
351 | default: | |
352 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
353 | return; | |
354 | } | |
355 | ||
356 | /* 965+ wants fuzzy fitting */ | |
357 | /* FIXME: handle multiple panels by failing gracefully */ | |
358 | if (INTEL_INFO(dev)->gen >= 4) | |
359 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
360 | PFIT_FILTER_FUZZY); | |
361 | ||
362 | out: | |
363 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
364 | pfit_control = 0; | |
365 | pfit_pgm_ratios = 0; | |
366 | } | |
367 | ||
368 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ | |
369 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
370 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
371 | ||
372 | pipe_config->gmch_pfit.control = pfit_control; | |
373 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
374 | pipe_config->gmch_pfit.lvds_border_bits = border; | |
375 | } | |
376 | ||
377 | enum drm_connector_status | |
378 | intel_panel_detect(struct drm_device *dev) | |
379 | { | |
380 | struct drm_i915_private *dev_priv = dev->dev_private; | |
381 | ||
382 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
383 | if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { | |
384 | return *dev_priv->opregion.lid_state & 0x1 ? | |
385 | connector_status_connected : | |
386 | connector_status_disconnected; | |
387 | } | |
388 | ||
389 | switch (i915.panel_ignore_lid) { | |
390 | case -2: | |
391 | return connector_status_connected; | |
392 | case -1: | |
393 | return connector_status_disconnected; | |
394 | default: | |
395 | return connector_status_unknown; | |
396 | } | |
397 | } | |
398 | ||
399 | /** | |
400 | * scale - scale values from one range to another | |
401 | * | |
402 | * @source_val: value in range [@source_min..@source_max] | |
403 | * | |
404 | * Return @source_val in range [@source_min..@source_max] scaled to range | |
405 | * [@target_min..@target_max]. | |
406 | */ | |
407 | static uint32_t scale(uint32_t source_val, | |
408 | uint32_t source_min, uint32_t source_max, | |
409 | uint32_t target_min, uint32_t target_max) | |
410 | { | |
411 | uint64_t target_val; | |
412 | ||
413 | WARN_ON(source_min > source_max); | |
414 | WARN_ON(target_min > target_max); | |
415 | ||
416 | /* defensive */ | |
417 | source_val = clamp(source_val, source_min, source_max); | |
418 | ||
419 | /* avoid overflows */ | |
420 | target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * | |
421 | (target_max - target_min), source_max - source_min); | |
422 | target_val += target_min; | |
423 | ||
424 | return target_val; | |
425 | } | |
426 | ||
427 | /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ | |
428 | static inline u32 scale_user_to_hw(struct intel_connector *connector, | |
429 | u32 user_level, u32 user_max) | |
430 | { | |
431 | struct intel_panel *panel = &connector->panel; | |
432 | ||
433 | return scale(user_level, 0, user_max, | |
434 | panel->backlight.min, panel->backlight.max); | |
435 | } | |
436 | ||
437 | /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result | |
438 | * to [hw_min..hw_max]. */ | |
439 | static inline u32 clamp_user_to_hw(struct intel_connector *connector, | |
440 | u32 user_level, u32 user_max) | |
441 | { | |
442 | struct intel_panel *panel = &connector->panel; | |
443 | u32 hw_level; | |
444 | ||
445 | hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); | |
446 | hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); | |
447 | ||
448 | return hw_level; | |
449 | } | |
450 | ||
451 | /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ | |
452 | static inline u32 scale_hw_to_user(struct intel_connector *connector, | |
453 | u32 hw_level, u32 user_max) | |
454 | { | |
455 | struct intel_panel *panel = &connector->panel; | |
456 | ||
457 | return scale(hw_level, panel->backlight.min, panel->backlight.max, | |
458 | 0, user_max); | |
459 | } | |
460 | ||
461 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, | |
462 | u32 val) | |
463 | { | |
464 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
465 | struct intel_panel *panel = &connector->panel; | |
466 | ||
467 | WARN_ON(panel->backlight.max == 0); | |
468 | ||
469 | if (i915.invert_brightness < 0) | |
470 | return val; | |
471 | ||
472 | if (i915.invert_brightness > 0 || | |
473 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { | |
474 | return panel->backlight.max - val; | |
475 | } | |
476 | ||
477 | return val; | |
478 | } | |
479 | ||
480 | static u32 lpt_get_backlight(struct intel_connector *connector) | |
481 | { | |
482 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
483 | ||
484 | return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; | |
485 | } | |
486 | ||
487 | static u32 pch_get_backlight(struct intel_connector *connector) | |
488 | { | |
489 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
490 | ||
491 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | |
492 | } | |
493 | ||
494 | static u32 i9xx_get_backlight(struct intel_connector *connector) | |
495 | { | |
496 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
497 | struct intel_panel *panel = &connector->panel; | |
498 | u32 val; | |
499 | ||
500 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; | |
501 | if (INTEL_INFO(dev_priv)->gen < 4) | |
502 | val >>= 1; | |
503 | ||
504 | if (panel->backlight.combination_mode) { | |
505 | u8 lbpc; | |
506 | ||
507 | pci_read_config_byte(dev_priv->dev->pdev, LBPC, &lbpc); | |
508 | val *= lbpc; | |
509 | } | |
510 | ||
511 | return val; | |
512 | } | |
513 | ||
514 | static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe) | |
515 | { | |
516 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) | |
517 | return 0; | |
518 | ||
519 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; | |
520 | } | |
521 | ||
522 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
523 | { | |
524 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
525 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
526 | ||
527 | return _vlv_get_backlight(dev_priv, pipe); | |
528 | } | |
529 | ||
530 | static u32 bxt_get_backlight(struct intel_connector *connector) | |
531 | { | |
532 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
533 | struct intel_panel *panel = &connector->panel; | |
534 | ||
535 | return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller)); | |
536 | } | |
537 | ||
538 | static u32 pwm_get_backlight(struct intel_connector *connector) | |
539 | { | |
540 | struct intel_panel *panel = &connector->panel; | |
541 | int duty_ns; | |
542 | ||
543 | duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); | |
544 | return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); | |
545 | } | |
546 | ||
547 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
548 | { | |
549 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
550 | struct intel_panel *panel = &connector->panel; | |
551 | u32 val = 0; | |
552 | ||
553 | mutex_lock(&dev_priv->backlight_lock); | |
554 | ||
555 | if (panel->backlight.enabled) { | |
556 | val = panel->backlight.get(connector); | |
557 | val = intel_panel_compute_brightness(connector, val); | |
558 | } | |
559 | ||
560 | mutex_unlock(&dev_priv->backlight_lock); | |
561 | ||
562 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); | |
563 | return val; | |
564 | } | |
565 | ||
566 | static void lpt_set_backlight(struct intel_connector *connector, u32 level) | |
567 | { | |
568 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
569 | u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
570 | I915_WRITE(BLC_PWM_PCH_CTL2, val | level); | |
571 | } | |
572 | ||
573 | static void pch_set_backlight(struct intel_connector *connector, u32 level) | |
574 | { | |
575 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
576 | u32 tmp; | |
577 | ||
578 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
579 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
580 | } | |
581 | ||
582 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) | |
583 | { | |
584 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
585 | struct intel_panel *panel = &connector->panel; | |
586 | u32 tmp, mask; | |
587 | ||
588 | WARN_ON(panel->backlight.max == 0); | |
589 | ||
590 | if (panel->backlight.combination_mode) { | |
591 | u8 lbpc; | |
592 | ||
593 | lbpc = level * 0xfe / panel->backlight.max + 1; | |
594 | level /= lbpc; | |
595 | pci_write_config_byte(dev_priv->dev->pdev, LBPC, lbpc); | |
596 | } | |
597 | ||
598 | if (IS_GEN4(dev_priv)) { | |
599 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
600 | } else { | |
601 | level <<= 1; | |
602 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; | |
603 | } | |
604 | ||
605 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; | |
606 | I915_WRITE(BLC_PWM_CTL, tmp | level); | |
607 | } | |
608 | ||
609 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
610 | { | |
611 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
612 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
613 | u32 tmp; | |
614 | ||
615 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) | |
616 | return; | |
617 | ||
618 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
619 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
620 | } | |
621 | ||
622 | static void bxt_set_backlight(struct intel_connector *connector, u32 level) | |
623 | { | |
624 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
625 | struct intel_panel *panel = &connector->panel; | |
626 | ||
627 | I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level); | |
628 | } | |
629 | ||
630 | static void pwm_set_backlight(struct intel_connector *connector, u32 level) | |
631 | { | |
632 | struct intel_panel *panel = &connector->panel; | |
633 | int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); | |
634 | ||
635 | pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); | |
636 | } | |
637 | ||
638 | static void | |
639 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
640 | { | |
641 | struct intel_panel *panel = &connector->panel; | |
642 | ||
643 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
644 | ||
645 | level = intel_panel_compute_brightness(connector, level); | |
646 | panel->backlight.set(connector, level); | |
647 | } | |
648 | ||
649 | /* set backlight brightness to level in range [0..max], scaling wrt hw min */ | |
650 | static void intel_panel_set_backlight(struct intel_connector *connector, | |
651 | u32 user_level, u32 user_max) | |
652 | { | |
653 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
654 | struct intel_panel *panel = &connector->panel; | |
655 | u32 hw_level; | |
656 | ||
657 | if (!panel->backlight.present) | |
658 | return; | |
659 | ||
660 | mutex_lock(&dev_priv->backlight_lock); | |
661 | ||
662 | WARN_ON(panel->backlight.max == 0); | |
663 | ||
664 | hw_level = scale_user_to_hw(connector, user_level, user_max); | |
665 | panel->backlight.level = hw_level; | |
666 | ||
667 | if (panel->backlight.enabled) | |
668 | intel_panel_actually_set_backlight(connector, hw_level); | |
669 | ||
670 | mutex_unlock(&dev_priv->backlight_lock); | |
671 | } | |
672 | ||
673 | /* set backlight brightness to level in range [0..max], assuming hw min is | |
674 | * respected. | |
675 | */ | |
676 | void intel_panel_set_backlight_acpi(struct intel_connector *connector, | |
677 | u32 user_level, u32 user_max) | |
678 | { | |
679 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
680 | struct intel_panel *panel = &connector->panel; | |
681 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
682 | u32 hw_level; | |
683 | ||
684 | /* | |
685 | * INVALID_PIPE may occur during driver init because | |
686 | * connection_mutex isn't held across the entire backlight | |
687 | * setup + modeset readout, and the BIOS can issue the | |
688 | * requests at any time. | |
689 | */ | |
690 | if (!panel->backlight.present || pipe == INVALID_PIPE) | |
691 | return; | |
692 | ||
693 | mutex_lock(&dev_priv->backlight_lock); | |
694 | ||
695 | WARN_ON(panel->backlight.max == 0); | |
696 | ||
697 | hw_level = clamp_user_to_hw(connector, user_level, user_max); | |
698 | panel->backlight.level = hw_level; | |
699 | ||
700 | if (panel->backlight.device) | |
701 | panel->backlight.device->props.brightness = | |
702 | scale_hw_to_user(connector, | |
703 | panel->backlight.level, | |
704 | panel->backlight.device->props.max_brightness); | |
705 | ||
706 | if (panel->backlight.enabled) | |
707 | intel_panel_actually_set_backlight(connector, hw_level); | |
708 | ||
709 | mutex_unlock(&dev_priv->backlight_lock); | |
710 | } | |
711 | ||
712 | static void lpt_disable_backlight(struct intel_connector *connector) | |
713 | { | |
714 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
715 | u32 tmp; | |
716 | ||
717 | intel_panel_actually_set_backlight(connector, 0); | |
718 | ||
719 | /* | |
720 | * Although we don't support or enable CPU PWM with LPT/SPT based | |
721 | * systems, it may have been enabled prior to loading the | |
722 | * driver. Disable to avoid warnings on LCPLL disable. | |
723 | * | |
724 | * This needs rework if we need to add support for CPU PWM on PCH split | |
725 | * platforms. | |
726 | */ | |
727 | tmp = I915_READ(BLC_PWM_CPU_CTL2); | |
728 | if (tmp & BLM_PWM_ENABLE) { | |
729 | DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); | |
730 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
731 | } | |
732 | ||
733 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
734 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
735 | } | |
736 | ||
737 | static void pch_disable_backlight(struct intel_connector *connector) | |
738 | { | |
739 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
740 | u32 tmp; | |
741 | ||
742 | intel_panel_actually_set_backlight(connector, 0); | |
743 | ||
744 | tmp = I915_READ(BLC_PWM_CPU_CTL2); | |
745 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
746 | ||
747 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
748 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
749 | } | |
750 | ||
751 | static void i9xx_disable_backlight(struct intel_connector *connector) | |
752 | { | |
753 | intel_panel_actually_set_backlight(connector, 0); | |
754 | } | |
755 | ||
756 | static void i965_disable_backlight(struct intel_connector *connector) | |
757 | { | |
758 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
759 | u32 tmp; | |
760 | ||
761 | intel_panel_actually_set_backlight(connector, 0); | |
762 | ||
763 | tmp = I915_READ(BLC_PWM_CTL2); | |
764 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
765 | } | |
766 | ||
767 | static void vlv_disable_backlight(struct intel_connector *connector) | |
768 | { | |
769 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
770 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
771 | u32 tmp; | |
772 | ||
773 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) | |
774 | return; | |
775 | ||
776 | intel_panel_actually_set_backlight(connector, 0); | |
777 | ||
778 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
779 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
780 | } | |
781 | ||
782 | static void bxt_disable_backlight(struct intel_connector *connector) | |
783 | { | |
784 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
785 | struct intel_panel *panel = &connector->panel; | |
786 | u32 tmp, val; | |
787 | ||
788 | intel_panel_actually_set_backlight(connector, 0); | |
789 | ||
790 | tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); | |
791 | I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), | |
792 | tmp & ~BXT_BLC_PWM_ENABLE); | |
793 | ||
794 | if (panel->backlight.controller == 1) { | |
795 | val = I915_READ(UTIL_PIN_CTL); | |
796 | val &= ~UTIL_PIN_ENABLE; | |
797 | I915_WRITE(UTIL_PIN_CTL, val); | |
798 | } | |
799 | } | |
800 | ||
801 | static void pwm_disable_backlight(struct intel_connector *connector) | |
802 | { | |
803 | struct intel_panel *panel = &connector->panel; | |
804 | ||
805 | /* Disable the backlight */ | |
806 | pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS); | |
807 | usleep_range(2000, 3000); | |
808 | pwm_disable(panel->backlight.pwm); | |
809 | } | |
810 | ||
811 | void intel_panel_disable_backlight(struct intel_connector *connector) | |
812 | { | |
813 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
814 | struct intel_panel *panel = &connector->panel; | |
815 | ||
816 | if (!panel->backlight.present) | |
817 | return; | |
818 | ||
819 | /* | |
820 | * Do not disable backlight on the vga_switcheroo path. When switching | |
821 | * away from i915, the other client may depend on i915 to handle the | |
822 | * backlight. This will leave the backlight on unnecessarily when | |
823 | * another client is not activated. | |
824 | */ | |
825 | if (dev_priv->dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
826 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
827 | return; | |
828 | } | |
829 | ||
830 | mutex_lock(&dev_priv->backlight_lock); | |
831 | ||
832 | if (panel->backlight.device) | |
833 | panel->backlight.device->props.power = FB_BLANK_POWERDOWN; | |
834 | panel->backlight.enabled = false; | |
835 | panel->backlight.disable(connector); | |
836 | ||
837 | mutex_unlock(&dev_priv->backlight_lock); | |
838 | } | |
839 | ||
840 | static void lpt_enable_backlight(struct intel_connector *connector) | |
841 | { | |
842 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
843 | struct intel_panel *panel = &connector->panel; | |
844 | u32 pch_ctl1, pch_ctl2; | |
845 | ||
846 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
847 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
848 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
849 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
850 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
851 | } | |
852 | ||
853 | pch_ctl2 = panel->backlight.max << 16; | |
854 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
855 | ||
856 | pch_ctl1 = 0; | |
857 | if (panel->backlight.active_low_pwm) | |
858 | pch_ctl1 |= BLM_PCH_POLARITY; | |
859 | ||
860 | /* After LPT, override is the default. */ | |
861 | if (HAS_PCH_LPT(dev_priv)) | |
862 | pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; | |
863 | ||
864 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
865 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
866 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
867 | ||
868 | /* This won't stick until the above enable. */ | |
869 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
870 | } | |
871 | ||
872 | static void pch_enable_backlight(struct intel_connector *connector) | |
873 | { | |
874 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
875 | struct intel_panel *panel = &connector->panel; | |
876 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
877 | enum transcoder cpu_transcoder = | |
878 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
879 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; | |
880 | ||
881 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); | |
882 | if (cpu_ctl2 & BLM_PWM_ENABLE) { | |
883 | DRM_DEBUG_KMS("cpu backlight already enabled\n"); | |
884 | cpu_ctl2 &= ~BLM_PWM_ENABLE; | |
885 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
886 | } | |
887 | ||
888 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
889 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
890 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
891 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
892 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
893 | } | |
894 | ||
895 | if (cpu_transcoder == TRANSCODER_EDP) | |
896 | cpu_ctl2 = BLM_TRANSCODER_EDP; | |
897 | else | |
898 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); | |
899 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
900 | POSTING_READ(BLC_PWM_CPU_CTL2); | |
901 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); | |
902 | ||
903 | /* This won't stick until the above enable. */ | |
904 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
905 | ||
906 | pch_ctl2 = panel->backlight.max << 16; | |
907 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
908 | ||
909 | pch_ctl1 = 0; | |
910 | if (panel->backlight.active_low_pwm) | |
911 | pch_ctl1 |= BLM_PCH_POLARITY; | |
912 | ||
913 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
914 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
915 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
916 | } | |
917 | ||
918 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
919 | { | |
920 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
921 | struct intel_panel *panel = &connector->panel; | |
922 | u32 ctl, freq; | |
923 | ||
924 | ctl = I915_READ(BLC_PWM_CTL); | |
925 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { | |
926 | DRM_DEBUG_KMS("backlight already enabled\n"); | |
927 | I915_WRITE(BLC_PWM_CTL, 0); | |
928 | } | |
929 | ||
930 | freq = panel->backlight.max; | |
931 | if (panel->backlight.combination_mode) | |
932 | freq /= 0xff; | |
933 | ||
934 | ctl = freq << 17; | |
935 | if (panel->backlight.combination_mode) | |
936 | ctl |= BLM_LEGACY_MODE; | |
937 | if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) | |
938 | ctl |= BLM_POLARITY_PNV; | |
939 | ||
940 | I915_WRITE(BLC_PWM_CTL, ctl); | |
941 | POSTING_READ(BLC_PWM_CTL); | |
942 | ||
943 | /* XXX: combine this into above write? */ | |
944 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
945 | ||
946 | /* | |
947 | * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is | |
948 | * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 | |
949 | * that has backlight. | |
950 | */ | |
951 | if (IS_GEN2(dev_priv)) | |
952 | I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); | |
953 | } | |
954 | ||
955 | static void i965_enable_backlight(struct intel_connector *connector) | |
956 | { | |
957 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
958 | struct intel_panel *panel = &connector->panel; | |
959 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
960 | u32 ctl, ctl2, freq; | |
961 | ||
962 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
963 | if (ctl2 & BLM_PWM_ENABLE) { | |
964 | DRM_DEBUG_KMS("backlight already enabled\n"); | |
965 | ctl2 &= ~BLM_PWM_ENABLE; | |
966 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
967 | } | |
968 | ||
969 | freq = panel->backlight.max; | |
970 | if (panel->backlight.combination_mode) | |
971 | freq /= 0xff; | |
972 | ||
973 | ctl = freq << 16; | |
974 | I915_WRITE(BLC_PWM_CTL, ctl); | |
975 | ||
976 | ctl2 = BLM_PIPE(pipe); | |
977 | if (panel->backlight.combination_mode) | |
978 | ctl2 |= BLM_COMBINATION_MODE; | |
979 | if (panel->backlight.active_low_pwm) | |
980 | ctl2 |= BLM_POLARITY_I965; | |
981 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
982 | POSTING_READ(BLC_PWM_CTL2); | |
983 | I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); | |
984 | ||
985 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
986 | } | |
987 | ||
988 | static void vlv_enable_backlight(struct intel_connector *connector) | |
989 | { | |
990 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
991 | struct intel_panel *panel = &connector->panel; | |
992 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
993 | u32 ctl, ctl2; | |
994 | ||
995 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) | |
996 | return; | |
997 | ||
998 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
999 | if (ctl2 & BLM_PWM_ENABLE) { | |
1000 | DRM_DEBUG_KMS("backlight already enabled\n"); | |
1001 | ctl2 &= ~BLM_PWM_ENABLE; | |
1002 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
1003 | } | |
1004 | ||
1005 | ctl = panel->backlight.max << 16; | |
1006 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); | |
1007 | ||
1008 | /* XXX: combine this into above write? */ | |
1009 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
1010 | ||
1011 | ctl2 = 0; | |
1012 | if (panel->backlight.active_low_pwm) | |
1013 | ctl2 |= BLM_POLARITY_I965; | |
1014 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
1015 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); | |
1016 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); | |
1017 | } | |
1018 | ||
1019 | static void bxt_enable_backlight(struct intel_connector *connector) | |
1020 | { | |
1021 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1022 | struct intel_panel *panel = &connector->panel; | |
1023 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
1024 | u32 pwm_ctl, val; | |
1025 | ||
1026 | /* To use 2nd set of backlight registers, utility pin has to be | |
1027 | * enabled with PWM mode. | |
1028 | * The field should only be changed when the utility pin is disabled | |
1029 | */ | |
1030 | if (panel->backlight.controller == 1) { | |
1031 | val = I915_READ(UTIL_PIN_CTL); | |
1032 | if (val & UTIL_PIN_ENABLE) { | |
1033 | DRM_DEBUG_KMS("util pin already enabled\n"); | |
1034 | val &= ~UTIL_PIN_ENABLE; | |
1035 | I915_WRITE(UTIL_PIN_CTL, val); | |
1036 | } | |
1037 | ||
1038 | val = 0; | |
1039 | if (panel->backlight.util_pin_active_low) | |
1040 | val |= UTIL_PIN_POLARITY; | |
1041 | I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) | | |
1042 | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); | |
1043 | } | |
1044 | ||
1045 | pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); | |
1046 | if (pwm_ctl & BXT_BLC_PWM_ENABLE) { | |
1047 | DRM_DEBUG_KMS("backlight already enabled\n"); | |
1048 | pwm_ctl &= ~BXT_BLC_PWM_ENABLE; | |
1049 | I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), | |
1050 | pwm_ctl); | |
1051 | } | |
1052 | ||
1053 | I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), | |
1054 | panel->backlight.max); | |
1055 | ||
1056 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
1057 | ||
1058 | pwm_ctl = 0; | |
1059 | if (panel->backlight.active_low_pwm) | |
1060 | pwm_ctl |= BXT_BLC_PWM_POLARITY; | |
1061 | ||
1062 | I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); | |
1063 | POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); | |
1064 | I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), | |
1065 | pwm_ctl | BXT_BLC_PWM_ENABLE); | |
1066 | } | |
1067 | ||
1068 | static void pwm_enable_backlight(struct intel_connector *connector) | |
1069 | { | |
1070 | struct intel_panel *panel = &connector->panel; | |
1071 | ||
1072 | pwm_enable(panel->backlight.pwm); | |
1073 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
1074 | } | |
1075 | ||
1076 | void intel_panel_enable_backlight(struct intel_connector *connector) | |
1077 | { | |
1078 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1079 | struct intel_panel *panel = &connector->panel; | |
1080 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
1081 | ||
1082 | if (!panel->backlight.present) | |
1083 | return; | |
1084 | ||
1085 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); | |
1086 | ||
1087 | mutex_lock(&dev_priv->backlight_lock); | |
1088 | ||
1089 | WARN_ON(panel->backlight.max == 0); | |
1090 | ||
1091 | if (panel->backlight.level <= panel->backlight.min) { | |
1092 | panel->backlight.level = panel->backlight.max; | |
1093 | if (panel->backlight.device) | |
1094 | panel->backlight.device->props.brightness = | |
1095 | scale_hw_to_user(connector, | |
1096 | panel->backlight.level, | |
1097 | panel->backlight.device->props.max_brightness); | |
1098 | } | |
1099 | ||
1100 | panel->backlight.enable(connector); | |
1101 | panel->backlight.enabled = true; | |
1102 | if (panel->backlight.device) | |
1103 | panel->backlight.device->props.power = FB_BLANK_UNBLANK; | |
1104 | ||
1105 | mutex_unlock(&dev_priv->backlight_lock); | |
1106 | } | |
1107 | ||
1108 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) | |
1109 | static int intel_backlight_device_update_status(struct backlight_device *bd) | |
1110 | { | |
1111 | struct intel_connector *connector = bl_get_data(bd); | |
1112 | struct intel_panel *panel = &connector->panel; | |
1113 | struct drm_device *dev = connector->base.dev; | |
1114 | ||
1115 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); | |
1116 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", | |
1117 | bd->props.brightness, bd->props.max_brightness); | |
1118 | intel_panel_set_backlight(connector, bd->props.brightness, | |
1119 | bd->props.max_brightness); | |
1120 | ||
1121 | /* | |
1122 | * Allow flipping bl_power as a sub-state of enabled. Sadly the | |
1123 | * backlight class device does not make it easy to to differentiate | |
1124 | * between callbacks for brightness and bl_power, so our backlight_power | |
1125 | * callback needs to take this into account. | |
1126 | */ | |
1127 | if (panel->backlight.enabled) { | |
1128 | if (panel->backlight.power) { | |
1129 | bool enable = bd->props.power == FB_BLANK_UNBLANK && | |
1130 | bd->props.brightness != 0; | |
1131 | panel->backlight.power(connector, enable); | |
1132 | } | |
1133 | } else { | |
1134 | bd->props.power = FB_BLANK_POWERDOWN; | |
1135 | } | |
1136 | ||
1137 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | |
1138 | return 0; | |
1139 | } | |
1140 | ||
1141 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) | |
1142 | { | |
1143 | struct intel_connector *connector = bl_get_data(bd); | |
1144 | struct drm_device *dev = connector->base.dev; | |
1145 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1146 | u32 hw_level; | |
1147 | int ret; | |
1148 | ||
1149 | intel_runtime_pm_get(dev_priv); | |
1150 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); | |
1151 | ||
1152 | hw_level = intel_panel_get_backlight(connector); | |
1153 | ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); | |
1154 | ||
1155 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | |
1156 | intel_runtime_pm_put(dev_priv); | |
1157 | ||
1158 | return ret; | |
1159 | } | |
1160 | ||
1161 | static const struct backlight_ops intel_backlight_device_ops = { | |
1162 | .update_status = intel_backlight_device_update_status, | |
1163 | .get_brightness = intel_backlight_device_get_brightness, | |
1164 | }; | |
1165 | ||
1166 | static int intel_backlight_device_register(struct intel_connector *connector) | |
1167 | { | |
1168 | struct intel_panel *panel = &connector->panel; | |
1169 | struct backlight_properties props; | |
1170 | ||
1171 | if (WARN_ON(panel->backlight.device)) | |
1172 | return -ENODEV; | |
1173 | ||
1174 | if (!panel->backlight.present) | |
1175 | return 0; | |
1176 | ||
1177 | WARN_ON(panel->backlight.max == 0); | |
1178 | ||
1179 | memset(&props, 0, sizeof(props)); | |
1180 | props.type = BACKLIGHT_RAW; | |
1181 | ||
1182 | /* | |
1183 | * Note: Everything should work even if the backlight device max | |
1184 | * presented to the userspace is arbitrarily chosen. | |
1185 | */ | |
1186 | props.max_brightness = panel->backlight.max; | |
1187 | props.brightness = scale_hw_to_user(connector, | |
1188 | panel->backlight.level, | |
1189 | props.max_brightness); | |
1190 | ||
1191 | if (panel->backlight.enabled) | |
1192 | props.power = FB_BLANK_UNBLANK; | |
1193 | else | |
1194 | props.power = FB_BLANK_POWERDOWN; | |
1195 | ||
1196 | /* | |
1197 | * Note: using the same name independent of the connector prevents | |
1198 | * registration of multiple backlight devices in the driver. | |
1199 | */ | |
1200 | panel->backlight.device = | |
1201 | backlight_device_register("intel_backlight", | |
1202 | connector->base.kdev, | |
1203 | connector, | |
1204 | &intel_backlight_device_ops, &props); | |
1205 | ||
1206 | if (IS_ERR(panel->backlight.device)) { | |
1207 | DRM_ERROR("Failed to register backlight: %ld\n", | |
1208 | PTR_ERR(panel->backlight.device)); | |
1209 | panel->backlight.device = NULL; | |
1210 | return -ENODEV; | |
1211 | } | |
1212 | ||
1213 | DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", | |
1214 | connector->base.name); | |
1215 | ||
1216 | return 0; | |
1217 | } | |
1218 | ||
1219 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
1220 | { | |
1221 | struct intel_panel *panel = &connector->panel; | |
1222 | ||
1223 | if (panel->backlight.device) { | |
1224 | backlight_device_unregister(panel->backlight.device); | |
1225 | panel->backlight.device = NULL; | |
1226 | } | |
1227 | } | |
1228 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
1229 | static int intel_backlight_device_register(struct intel_connector *connector) | |
1230 | { | |
1231 | return 0; | |
1232 | } | |
1233 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
1234 | { | |
1235 | } | |
1236 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
1237 | ||
1238 | /* | |
1239 | * BXT: PWM clock frequency = 19.2 MHz. | |
1240 | */ | |
1241 | static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1242 | { | |
1243 | return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); | |
1244 | } | |
1245 | ||
1246 | /* | |
1247 | * SPT: This value represents the period of the PWM stream in clock periods | |
1248 | * multiplied by 16 (default increment) or 128 (alternate increment selected in | |
1249 | * SCHICKEN_1 bit 0). PWM clock is 24 MHz. | |
1250 | */ | |
1251 | static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1252 | { | |
1253 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1254 | u32 mul; | |
1255 | ||
1256 | if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY) | |
1257 | mul = 128; | |
1258 | else | |
1259 | mul = 16; | |
1260 | ||
1261 | return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); | |
1262 | } | |
1263 | ||
1264 | /* | |
1265 | * LPT: This value represents the period of the PWM stream in clock periods | |
1266 | * multiplied by 128 (default increment) or 16 (alternate increment, selected in | |
1267 | * LPT SOUTH_CHICKEN2 register bit 5). | |
1268 | */ | |
1269 | static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1270 | { | |
1271 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1272 | u32 mul, clock; | |
1273 | ||
1274 | if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY) | |
1275 | mul = 16; | |
1276 | else | |
1277 | mul = 128; | |
1278 | ||
1279 | if (HAS_PCH_LPT_H(dev_priv)) | |
1280 | clock = MHz(135); /* LPT:H */ | |
1281 | else | |
1282 | clock = MHz(24); /* LPT:LP */ | |
1283 | ||
1284 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); | |
1285 | } | |
1286 | ||
1287 | /* | |
1288 | * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH | |
1289 | * display raw clocks multiplied by 128. | |
1290 | */ | |
1291 | static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1292 | { | |
1293 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1294 | ||
1295 | return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128); | |
1296 | } | |
1297 | ||
1298 | /* | |
1299 | * Gen2: This field determines the number of time base events (display core | |
1300 | * clock frequency/32) in total for a complete cycle of modulated backlight | |
1301 | * control. | |
1302 | * | |
1303 | * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) | |
1304 | * divided by 32. | |
1305 | */ | |
1306 | static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1307 | { | |
1308 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1309 | int clock; | |
1310 | ||
1311 | if (IS_PINEVIEW(dev_priv)) | |
1312 | clock = KHz(dev_priv->rawclk_freq); | |
1313 | else | |
1314 | clock = KHz(dev_priv->cdclk_freq); | |
1315 | ||
1316 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); | |
1317 | } | |
1318 | ||
1319 | /* | |
1320 | * Gen4: This value represents the period of the PWM stream in display core | |
1321 | * clocks ([DevCTG] HRAW clocks) multiplied by 128. | |
1322 | * | |
1323 | */ | |
1324 | static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1325 | { | |
1326 | struct drm_device *dev = connector->base.dev; | |
1327 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1328 | int clock; | |
1329 | ||
1330 | if (IS_G4X(dev_priv)) | |
1331 | clock = KHz(dev_priv->rawclk_freq); | |
1332 | else | |
1333 | clock = KHz(dev_priv->cdclk_freq); | |
1334 | ||
1335 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); | |
1336 | } | |
1337 | ||
1338 | /* | |
1339 | * VLV: This value represents the period of the PWM stream in display core | |
1340 | * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks | |
1341 | * multiplied by 16. CHV uses a 19.2MHz S0IX clock. | |
1342 | */ | |
1343 | static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) | |
1344 | { | |
1345 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1346 | int mul, clock; | |
1347 | ||
1348 | if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { | |
1349 | if (IS_CHERRYVIEW(dev_priv)) | |
1350 | clock = KHz(19200); | |
1351 | else | |
1352 | clock = MHz(25); | |
1353 | mul = 16; | |
1354 | } else { | |
1355 | clock = KHz(dev_priv->rawclk_freq); | |
1356 | mul = 128; | |
1357 | } | |
1358 | ||
1359 | return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); | |
1360 | } | |
1361 | ||
1362 | static u32 get_backlight_max_vbt(struct intel_connector *connector) | |
1363 | { | |
1364 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1365 | struct intel_panel *panel = &connector->panel; | |
1366 | u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; | |
1367 | u32 pwm; | |
1368 | ||
1369 | if (!panel->backlight.hz_to_pwm) { | |
1370 | DRM_DEBUG_KMS("backlight frequency conversion not supported\n"); | |
1371 | return 0; | |
1372 | } | |
1373 | ||
1374 | if (pwm_freq_hz) { | |
1375 | DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", | |
1376 | pwm_freq_hz); | |
1377 | } else { | |
1378 | pwm_freq_hz = 200; | |
1379 | DRM_DEBUG_KMS("default backlight frequency %u Hz\n", | |
1380 | pwm_freq_hz); | |
1381 | } | |
1382 | ||
1383 | pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); | |
1384 | if (!pwm) { | |
1385 | DRM_DEBUG_KMS("backlight frequency conversion failed\n"); | |
1386 | return 0; | |
1387 | } | |
1388 | ||
1389 | return pwm; | |
1390 | } | |
1391 | ||
1392 | /* | |
1393 | * Note: The setup hooks can't assume pipe is set! | |
1394 | */ | |
1395 | static u32 get_backlight_min_vbt(struct intel_connector *connector) | |
1396 | { | |
1397 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1398 | struct intel_panel *panel = &connector->panel; | |
1399 | int min; | |
1400 | ||
1401 | WARN_ON(panel->backlight.max == 0); | |
1402 | ||
1403 | /* | |
1404 | * XXX: If the vbt value is 255, it makes min equal to max, which leads | |
1405 | * to problems. There are such machines out there. Either our | |
1406 | * interpretation is wrong or the vbt has bogus data. Or both. Safeguard | |
1407 | * against this by letting the minimum be at most (arbitrarily chosen) | |
1408 | * 25% of the max. | |
1409 | */ | |
1410 | min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); | |
1411 | if (min != dev_priv->vbt.backlight.min_brightness) { | |
1412 | DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", | |
1413 | dev_priv->vbt.backlight.min_brightness, min); | |
1414 | } | |
1415 | ||
1416 | /* vbt value is a coefficient in range [0..255] */ | |
1417 | return scale(min, 0, 255, 0, panel->backlight.max); | |
1418 | } | |
1419 | ||
1420 | static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) | |
1421 | { | |
1422 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1423 | struct intel_panel *panel = &connector->panel; | |
1424 | u32 pch_ctl1, pch_ctl2, val; | |
1425 | ||
1426 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
1427 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1428 | ||
1429 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1430 | panel->backlight.max = pch_ctl2 >> 16; | |
1431 | ||
1432 | if (!panel->backlight.max) | |
1433 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1434 | ||
1435 | if (!panel->backlight.max) | |
1436 | return -ENODEV; | |
1437 | ||
1438 | panel->backlight.min = get_backlight_min_vbt(connector); | |
1439 | ||
1440 | val = lpt_get_backlight(connector); | |
1441 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1442 | ||
1443 | panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) && | |
1444 | panel->backlight.level != 0; | |
1445 | ||
1446 | return 0; | |
1447 | } | |
1448 | ||
1449 | static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) | |
1450 | { | |
1451 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1452 | struct intel_panel *panel = &connector->panel; | |
1453 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; | |
1454 | ||
1455 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); | |
1456 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
1457 | ||
1458 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
1459 | panel->backlight.max = pch_ctl2 >> 16; | |
1460 | ||
1461 | if (!panel->backlight.max) | |
1462 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1463 | ||
1464 | if (!panel->backlight.max) | |
1465 | return -ENODEV; | |
1466 | ||
1467 | panel->backlight.min = get_backlight_min_vbt(connector); | |
1468 | ||
1469 | val = pch_get_backlight(connector); | |
1470 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1471 | ||
1472 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); | |
1473 | panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && | |
1474 | (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; | |
1475 | ||
1476 | return 0; | |
1477 | } | |
1478 | ||
1479 | static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) | |
1480 | { | |
1481 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1482 | struct intel_panel *panel = &connector->panel; | |
1483 | u32 ctl, val; | |
1484 | ||
1485 | ctl = I915_READ(BLC_PWM_CTL); | |
1486 | ||
1487 | if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) | |
1488 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; | |
1489 | ||
1490 | if (IS_PINEVIEW(dev_priv)) | |
1491 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; | |
1492 | ||
1493 | panel->backlight.max = ctl >> 17; | |
1494 | ||
1495 | if (!panel->backlight.max) { | |
1496 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1497 | panel->backlight.max >>= 1; | |
1498 | } | |
1499 | ||
1500 | if (!panel->backlight.max) | |
1501 | return -ENODEV; | |
1502 | ||
1503 | if (panel->backlight.combination_mode) | |
1504 | panel->backlight.max *= 0xff; | |
1505 | ||
1506 | panel->backlight.min = get_backlight_min_vbt(connector); | |
1507 | ||
1508 | val = i9xx_get_backlight(connector); | |
1509 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1510 | ||
1511 | panel->backlight.enabled = panel->backlight.level != 0; | |
1512 | ||
1513 | return 0; | |
1514 | } | |
1515 | ||
1516 | static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) | |
1517 | { | |
1518 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1519 | struct intel_panel *panel = &connector->panel; | |
1520 | u32 ctl, ctl2, val; | |
1521 | ||
1522 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
1523 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; | |
1524 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1525 | ||
1526 | ctl = I915_READ(BLC_PWM_CTL); | |
1527 | panel->backlight.max = ctl >> 16; | |
1528 | ||
1529 | if (!panel->backlight.max) | |
1530 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1531 | ||
1532 | if (!panel->backlight.max) | |
1533 | return -ENODEV; | |
1534 | ||
1535 | if (panel->backlight.combination_mode) | |
1536 | panel->backlight.max *= 0xff; | |
1537 | ||
1538 | panel->backlight.min = get_backlight_min_vbt(connector); | |
1539 | ||
1540 | val = i9xx_get_backlight(connector); | |
1541 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1542 | ||
1543 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && | |
1544 | panel->backlight.level != 0; | |
1545 | ||
1546 | return 0; | |
1547 | } | |
1548 | ||
1549 | static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) | |
1550 | { | |
1551 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1552 | struct intel_panel *panel = &connector->panel; | |
1553 | u32 ctl, ctl2, val; | |
1554 | ||
1555 | if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) | |
1556 | return -ENODEV; | |
1557 | ||
1558 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
1559 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
1560 | ||
1561 | ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); | |
1562 | panel->backlight.max = ctl >> 16; | |
1563 | ||
1564 | if (!panel->backlight.max) | |
1565 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1566 | ||
1567 | if (!panel->backlight.max) | |
1568 | return -ENODEV; | |
1569 | ||
1570 | panel->backlight.min = get_backlight_min_vbt(connector); | |
1571 | ||
1572 | val = _vlv_get_backlight(dev_priv, pipe); | |
1573 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1574 | ||
1575 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && | |
1576 | panel->backlight.level != 0; | |
1577 | ||
1578 | return 0; | |
1579 | } | |
1580 | ||
1581 | static int | |
1582 | bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) | |
1583 | { | |
1584 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1585 | struct intel_panel *panel = &connector->panel; | |
1586 | u32 pwm_ctl, val; | |
1587 | ||
1588 | /* | |
1589 | * For BXT hard coding the Backlight controller to 0. | |
1590 | * TODO : Read the controller value from VBT and generalize | |
1591 | */ | |
1592 | panel->backlight.controller = 0; | |
1593 | ||
1594 | pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); | |
1595 | ||
1596 | /* Keeping the check if controller 1 is to be programmed. | |
1597 | * This will come into affect once the VBT parsing | |
1598 | * is fixed for controller selection, and controller 1 is used | |
1599 | * for a prticular display configuration. | |
1600 | */ | |
1601 | if (panel->backlight.controller == 1) { | |
1602 | val = I915_READ(UTIL_PIN_CTL); | |
1603 | panel->backlight.util_pin_active_low = | |
1604 | val & UTIL_PIN_POLARITY; | |
1605 | } | |
1606 | ||
1607 | panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; | |
1608 | panel->backlight.max = | |
1609 | I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); | |
1610 | ||
1611 | if (!panel->backlight.max) | |
1612 | panel->backlight.max = get_backlight_max_vbt(connector); | |
1613 | ||
1614 | if (!panel->backlight.max) | |
1615 | return -ENODEV; | |
1616 | ||
1617 | val = bxt_get_backlight(connector); | |
1618 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1619 | ||
1620 | panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) && | |
1621 | panel->backlight.level != 0; | |
1622 | ||
1623 | return 0; | |
1624 | } | |
1625 | ||
1626 | static int pwm_setup_backlight(struct intel_connector *connector, | |
1627 | enum pipe pipe) | |
1628 | { | |
1629 | struct drm_device *dev = connector->base.dev; | |
1630 | struct intel_panel *panel = &connector->panel; | |
1631 | int retval; | |
1632 | ||
1633 | /* Get the PWM chip for backlight control */ | |
1634 | panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight"); | |
1635 | if (IS_ERR(panel->backlight.pwm)) { | |
1636 | DRM_ERROR("Failed to own the pwm chip\n"); | |
1637 | panel->backlight.pwm = NULL; | |
1638 | return -ENODEV; | |
1639 | } | |
1640 | ||
1641 | retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, | |
1642 | CRC_PMIC_PWM_PERIOD_NS); | |
1643 | if (retval < 0) { | |
1644 | DRM_ERROR("Failed to configure the pwm chip\n"); | |
1645 | pwm_put(panel->backlight.pwm); | |
1646 | panel->backlight.pwm = NULL; | |
1647 | return retval; | |
1648 | } | |
1649 | ||
1650 | panel->backlight.min = 0; /* 0% */ | |
1651 | panel->backlight.max = 100; /* 100% */ | |
1652 | panel->backlight.level = DIV_ROUND_UP( | |
1653 | pwm_get_duty_cycle(panel->backlight.pwm) * 100, | |
1654 | CRC_PMIC_PWM_PERIOD_NS); | |
1655 | panel->backlight.enabled = panel->backlight.level != 0; | |
1656 | ||
1657 | return 0; | |
1658 | } | |
1659 | ||
1660 | int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) | |
1661 | { | |
1662 | struct drm_i915_private *dev_priv = to_i915(connector->dev); | |
1663 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
1664 | struct intel_panel *panel = &intel_connector->panel; | |
1665 | int ret; | |
1666 | ||
1667 | if (!dev_priv->vbt.backlight.present) { | |
1668 | if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { | |
1669 | DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); | |
1670 | } else { | |
1671 | DRM_DEBUG_KMS("no backlight present per VBT\n"); | |
1672 | return 0; | |
1673 | } | |
1674 | } | |
1675 | ||
1676 | /* ensure intel_panel has been initialized first */ | |
1677 | if (WARN_ON(!panel->backlight.setup)) | |
1678 | return -ENODEV; | |
1679 | ||
1680 | /* set level and max in panel struct */ | |
1681 | mutex_lock(&dev_priv->backlight_lock); | |
1682 | ret = panel->backlight.setup(intel_connector, pipe); | |
1683 | mutex_unlock(&dev_priv->backlight_lock); | |
1684 | ||
1685 | if (ret) { | |
1686 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
1687 | connector->name); | |
1688 | return ret; | |
1689 | } | |
1690 | ||
1691 | panel->backlight.present = true; | |
1692 | ||
1693 | DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", | |
1694 | connector->name, | |
1695 | panel->backlight.enabled ? "enabled" : "disabled", | |
1696 | panel->backlight.level, panel->backlight.max); | |
1697 | ||
1698 | return 0; | |
1699 | } | |
1700 | ||
1701 | void intel_panel_destroy_backlight(struct drm_connector *connector) | |
1702 | { | |
1703 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
1704 | struct intel_panel *panel = &intel_connector->panel; | |
1705 | ||
1706 | /* dispose of the pwm */ | |
1707 | if (panel->backlight.pwm) | |
1708 | pwm_put(panel->backlight.pwm); | |
1709 | ||
1710 | panel->backlight.present = false; | |
1711 | } | |
1712 | ||
1713 | /* Set up chip specific backlight functions */ | |
1714 | static void | |
1715 | intel_panel_init_backlight_funcs(struct intel_panel *panel) | |
1716 | { | |
1717 | struct intel_connector *connector = | |
1718 | container_of(panel, struct intel_connector, panel); | |
1719 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
1720 | ||
1721 | if (IS_BROXTON(dev_priv)) { | |
1722 | panel->backlight.setup = bxt_setup_backlight; | |
1723 | panel->backlight.enable = bxt_enable_backlight; | |
1724 | panel->backlight.disable = bxt_disable_backlight; | |
1725 | panel->backlight.set = bxt_set_backlight; | |
1726 | panel->backlight.get = bxt_get_backlight; | |
1727 | panel->backlight.hz_to_pwm = bxt_hz_to_pwm; | |
1728 | } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv)) { | |
1729 | panel->backlight.setup = lpt_setup_backlight; | |
1730 | panel->backlight.enable = lpt_enable_backlight; | |
1731 | panel->backlight.disable = lpt_disable_backlight; | |
1732 | panel->backlight.set = lpt_set_backlight; | |
1733 | panel->backlight.get = lpt_get_backlight; | |
1734 | if (HAS_PCH_LPT(dev_priv)) | |
1735 | panel->backlight.hz_to_pwm = lpt_hz_to_pwm; | |
1736 | else | |
1737 | panel->backlight.hz_to_pwm = spt_hz_to_pwm; | |
1738 | } else if (HAS_PCH_SPLIT(dev_priv)) { | |
1739 | panel->backlight.setup = pch_setup_backlight; | |
1740 | panel->backlight.enable = pch_enable_backlight; | |
1741 | panel->backlight.disable = pch_disable_backlight; | |
1742 | panel->backlight.set = pch_set_backlight; | |
1743 | panel->backlight.get = pch_get_backlight; | |
1744 | panel->backlight.hz_to_pwm = pch_hz_to_pwm; | |
1745 | } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { | |
1746 | if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { | |
1747 | panel->backlight.setup = pwm_setup_backlight; | |
1748 | panel->backlight.enable = pwm_enable_backlight; | |
1749 | panel->backlight.disable = pwm_disable_backlight; | |
1750 | panel->backlight.set = pwm_set_backlight; | |
1751 | panel->backlight.get = pwm_get_backlight; | |
1752 | } else { | |
1753 | panel->backlight.setup = vlv_setup_backlight; | |
1754 | panel->backlight.enable = vlv_enable_backlight; | |
1755 | panel->backlight.disable = vlv_disable_backlight; | |
1756 | panel->backlight.set = vlv_set_backlight; | |
1757 | panel->backlight.get = vlv_get_backlight; | |
1758 | panel->backlight.hz_to_pwm = vlv_hz_to_pwm; | |
1759 | } | |
1760 | } else if (IS_GEN4(dev_priv)) { | |
1761 | panel->backlight.setup = i965_setup_backlight; | |
1762 | panel->backlight.enable = i965_enable_backlight; | |
1763 | panel->backlight.disable = i965_disable_backlight; | |
1764 | panel->backlight.set = i9xx_set_backlight; | |
1765 | panel->backlight.get = i9xx_get_backlight; | |
1766 | panel->backlight.hz_to_pwm = i965_hz_to_pwm; | |
1767 | } else { | |
1768 | panel->backlight.setup = i9xx_setup_backlight; | |
1769 | panel->backlight.enable = i9xx_enable_backlight; | |
1770 | panel->backlight.disable = i9xx_disable_backlight; | |
1771 | panel->backlight.set = i9xx_set_backlight; | |
1772 | panel->backlight.get = i9xx_get_backlight; | |
1773 | panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; | |
1774 | } | |
1775 | } | |
1776 | ||
1777 | int intel_panel_init(struct intel_panel *panel, | |
1778 | struct drm_display_mode *fixed_mode, | |
1779 | struct drm_display_mode *downclock_mode) | |
1780 | { | |
1781 | intel_panel_init_backlight_funcs(panel); | |
1782 | ||
1783 | panel->fixed_mode = fixed_mode; | |
1784 | panel->downclock_mode = downclock_mode; | |
1785 | ||
1786 | return 0; | |
1787 | } | |
1788 | ||
1789 | void intel_panel_fini(struct intel_panel *panel) | |
1790 | { | |
1791 | struct intel_connector *intel_connector = | |
1792 | container_of(panel, struct intel_connector, panel); | |
1793 | ||
1794 | if (panel->fixed_mode) | |
1795 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
1796 | ||
1797 | if (panel->downclock_mode) | |
1798 | drm_mode_destroy(intel_connector->base.dev, | |
1799 | panel->downclock_mode); | |
1800 | } | |
1801 | ||
1802 | void intel_backlight_register(struct drm_device *dev) | |
1803 | { | |
1804 | struct intel_connector *connector; | |
1805 | ||
1806 | for_each_intel_connector(dev, connector) | |
1807 | intel_backlight_device_register(connector); | |
1808 | } | |
1809 | ||
1810 | void intel_backlight_unregister(struct drm_device *dev) | |
1811 | { | |
1812 | struct intel_connector *connector; | |
1813 | ||
1814 | for_each_intel_connector(dev, connector) | |
1815 | intel_backlight_device_unregister(connector); | |
1816 | } |