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hwmon: (w83781d) Refactor beep enable handling
[mirror_ubuntu-zesty-kernel.git] / drivers / hwmon / w83781d.c
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1/*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33
34*/
35
36#include <linux/module.h>
37#include <linux/init.h>
38#include <linux/slab.h>
39#include <linux/jiffies.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
42#include <linux/ioport.h>
43#include <linux/hwmon.h>
44#include <linux/hwmon-vid.h>
45#include <linux/hwmon-sysfs.h>
46#include <linux/sysfs.h>
47#include <linux/err.h>
48#include <linux/mutex.h>
49#include <asm/io.h>
50#include "lm75.h"
51
52/* ISA device, if found */
53static struct platform_device *pdev;
54
55/* Addresses to scan */
56static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
57 0x2e, 0x2f, I2C_CLIENT_END };
58static unsigned short isa_address = 0x290;
59
60/* Insmod parameters */
61I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f);
62I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
63 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
64
65static int reset;
66module_param(reset, bool, 0);
67MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
68
69static int init = 1;
70module_param(init, bool, 0);
71MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
72
73/* Constants specified below */
74
75/* Length of ISA address segment */
76#define W83781D_EXTENT 8
77
78/* Where are the ISA address/data registers relative to the base address */
79#define W83781D_ADDR_REG_OFFSET 5
80#define W83781D_DATA_REG_OFFSET 6
81
82/* The device registers */
83/* in nr from 0 to 8 */
84#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
85 (0x554 + (((nr) - 7) * 2)))
86#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
87 (0x555 + (((nr) - 7) * 2)))
88#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
89 (0x550 + (nr) - 7))
90
91/* fan nr from 0 to 2 */
92#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
93#define W83781D_REG_FAN(nr) (0x28 + (nr))
94
95#define W83781D_REG_BANK 0x4E
96#define W83781D_REG_TEMP2_CONFIG 0x152
97#define W83781D_REG_TEMP3_CONFIG 0x252
98/* temp nr from 1 to 3 */
99#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
100 ((nr == 2) ? (0x0150) : \
101 (0x27)))
102#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
103 ((nr == 2) ? (0x153) : \
104 (0x3A)))
105#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
106 ((nr == 2) ? (0x155) : \
107 (0x39)))
108
109#define W83781D_REG_CONFIG 0x40
110
111/* Interrupt status (W83781D, AS99127F) */
112#define W83781D_REG_ALARM1 0x41
113#define W83781D_REG_ALARM2 0x42
114
115/* Real-time status (W83782D, W83783S) */
116#define W83782D_REG_ALARM1 0x459
117#define W83782D_REG_ALARM2 0x45A
118#define W83782D_REG_ALARM3 0x45B
119
120#define W83781D_REG_BEEP_CONFIG 0x4D
121#define W83781D_REG_BEEP_INTS1 0x56
122#define W83781D_REG_BEEP_INTS2 0x57
123#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
124
125#define W83781D_REG_VID_FANDIV 0x47
126
127#define W83781D_REG_CHIPID 0x49
128#define W83781D_REG_WCHIPID 0x58
129#define W83781D_REG_CHIPMAN 0x4F
130#define W83781D_REG_PIN 0x4B
131
132/* 782D/783S only */
133#define W83781D_REG_VBAT 0x5D
134
135/* PWM 782D (1-4) and 783S (1-2) only */
136static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
137#define W83781D_REG_PWMCLK12 0x5C
138#define W83781D_REG_PWMCLK34 0x45C
139
140#define W83781D_REG_I2C_ADDR 0x48
141#define W83781D_REG_I2C_SUBADDR 0x4A
142
143/* The following are undocumented in the data sheets however we
144 received the information in an email from Winbond tech support */
145/* Sensor selection - not on 781d */
146#define W83781D_REG_SCFG1 0x5D
147static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
148
149#define W83781D_REG_SCFG2 0x59
150static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
151
152#define W83781D_DEFAULT_BETA 3435
153
154/* Conversions */
155#define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
156#define IN_FROM_REG(val) ((val) * 16)
157
158static inline u8
159FAN_TO_REG(long rpm, int div)
160{
161 if (rpm == 0)
162 return 255;
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
165}
166
167static inline long
168FAN_FROM_REG(u8 val, int div)
169{
170 if (val == 0)
171 return -1;
172 if (val == 255)
173 return 0;
174 return 1350000 / (val * div);
175}
176
177#define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
178#define TEMP_FROM_REG(val) ((val) * 1000)
179
180#define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
181 (~(val)) & 0x7fff : (val) & 0xff7fff)
182#define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
183 (~(val)) & 0x7fff : (val) & 0xff7fff)
184
185#define DIV_FROM_REG(val) (1 << (val))
186
187static inline u8
188DIV_TO_REG(long val, enum chips type)
189{
190 int i;
191 val = SENSORS_LIMIT(val, 1,
192 ((type == w83781d
193 || type == as99127f) ? 8 : 128)) >> 1;
194 for (i = 0; i < 7; i++) {
195 if (val == 0)
196 break;
197 val >>= 1;
198 }
199 return i;
200}
201
202/* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
211 for this yet. */
212
213/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
214 the driver field to differentiate between I2C and ISA chips. */
215struct w83781d_data {
216 struct i2c_client client;
217 struct device *hwmon_dev;
218 struct mutex lock;
219 enum chips type;
220
221 struct mutex update_lock;
222 char valid; /* !=0 if following fields are valid */
223 unsigned long last_updated; /* In jiffies */
224
225 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
226 /* array of 2 pointers to subclients */
227
228 u8 in[9]; /* Register value - 8 & 9 for 782D only */
229 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
230 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
231 u8 fan[3]; /* Register value */
232 u8 fan_min[3]; /* Register value */
233 s8 temp; /* Register value */
234 s8 temp_max; /* Register value */
235 s8 temp_max_hyst; /* Register value */
236 u16 temp_add[2]; /* Register value */
237 u16 temp_max_add[2]; /* Register value */
238 u16 temp_max_hyst_add[2]; /* Register value */
239 u8 fan_div[3]; /* Register encoding, shifted right */
240 u8 vid; /* Register encoding, combined */
241 u32 alarms; /* Register encoding, combined */
242 u32 beep_mask; /* Register encoding, combined */
243 u8 pwm[4]; /* Register value */
244 u8 pwm2_enable; /* Boolean */
245 u16 sens[3]; /* 782D/783S only.
246 1 = pentium diode; 2 = 3904 diode;
247 4 = thermistor */
248 u8 vrm;
249};
250
251static int w83781d_attach_adapter(struct i2c_adapter *adapter);
252static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
253static int w83781d_detach_client(struct i2c_client *client);
254
255static int __devinit w83781d_isa_probe(struct platform_device *pdev);
256static int __devexit w83781d_isa_remove(struct platform_device *pdev);
257
258static int w83781d_read_value(struct w83781d_data *data, u16 reg);
259static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
260static struct w83781d_data *w83781d_update_device(struct device *dev);
261static void w83781d_init_device(struct device *dev);
262
263static struct i2c_driver w83781d_driver = {
264 .driver = {
265 .name = "w83781d",
266 },
267 .attach_adapter = w83781d_attach_adapter,
268 .detach_client = w83781d_detach_client,
269};
270
271static struct platform_driver w83781d_isa_driver = {
272 .driver = {
273 .owner = THIS_MODULE,
274 .name = "w83781d",
275 },
276 .probe = w83781d_isa_probe,
277 .remove = w83781d_isa_remove,
278};
279
280
281/* following are the sysfs callback functions */
282#define show_in_reg(reg) \
283static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
284 char *buf) \
285{ \
286 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
287 struct w83781d_data *data = w83781d_update_device(dev); \
288 return sprintf(buf, "%ld\n", \
289 (long)IN_FROM_REG(data->reg[attr->index])); \
290}
291show_in_reg(in);
292show_in_reg(in_min);
293show_in_reg(in_max);
294
295#define store_in_reg(REG, reg) \
296static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
297 *da, const char *buf, size_t count) \
298{ \
299 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
300 struct w83781d_data *data = dev_get_drvdata(dev); \
301 int nr = attr->index; \
302 u32 val; \
303 \
304 val = simple_strtoul(buf, NULL, 10); \
305 \
306 mutex_lock(&data->update_lock); \
307 data->in_##reg[nr] = IN_TO_REG(val); \
308 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
309 \
310 mutex_unlock(&data->update_lock); \
311 return count; \
312}
313store_in_reg(MIN, min);
314store_in_reg(MAX, max);
315
316#define sysfs_in_offsets(offset) \
317static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
318 show_in, NULL, offset); \
319static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
320 show_in_min, store_in_min, offset); \
321static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
322 show_in_max, store_in_max, offset)
323
324sysfs_in_offsets(0);
325sysfs_in_offsets(1);
326sysfs_in_offsets(2);
327sysfs_in_offsets(3);
328sysfs_in_offsets(4);
329sysfs_in_offsets(5);
330sysfs_in_offsets(6);
331sysfs_in_offsets(7);
332sysfs_in_offsets(8);
333
334#define show_fan_reg(reg) \
335static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
336 char *buf) \
337{ \
338 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
339 struct w83781d_data *data = w83781d_update_device(dev); \
340 return sprintf(buf,"%ld\n", \
341 FAN_FROM_REG(data->reg[attr->index], \
342 DIV_FROM_REG(data->fan_div[attr->index]))); \
343}
344show_fan_reg(fan);
345show_fan_reg(fan_min);
346
347static ssize_t
348store_fan_min(struct device *dev, struct device_attribute *da,
349 const char *buf, size_t count)
350{
351 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
352 struct w83781d_data *data = dev_get_drvdata(dev);
353 int nr = attr->index;
354 u32 val;
355
356 val = simple_strtoul(buf, NULL, 10);
357
358 mutex_lock(&data->update_lock);
359 data->fan_min[nr] =
360 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
361 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
362 data->fan_min[nr]);
363
364 mutex_unlock(&data->update_lock);
365 return count;
366}
367
368static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
369static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
370 show_fan_min, store_fan_min, 0);
371static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
372static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
373 show_fan_min, store_fan_min, 1);
374static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
375static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
376 show_fan_min, store_fan_min, 2);
377
378#define show_temp_reg(reg) \
379static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
380 char *buf) \
381{ \
382 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
383 struct w83781d_data *data = w83781d_update_device(dev); \
384 int nr = attr->index; \
385 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
386 return sprintf(buf,"%d\n", \
387 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
388 } else { /* TEMP1 */ \
389 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
390 } \
391}
392show_temp_reg(temp);
393show_temp_reg(temp_max);
394show_temp_reg(temp_max_hyst);
395
396#define store_temp_reg(REG, reg) \
397static ssize_t store_temp_##reg (struct device *dev, \
398 struct device_attribute *da, const char *buf, size_t count) \
399{ \
400 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
401 struct w83781d_data *data = dev_get_drvdata(dev); \
402 int nr = attr->index; \
403 long val; \
404 \
405 val = simple_strtol(buf, NULL, 10); \
406 \
407 mutex_lock(&data->update_lock); \
408 \
409 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
410 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
411 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
412 data->temp_##reg##_add[nr-2]); \
413 } else { /* TEMP1 */ \
414 data->temp_##reg = TEMP_TO_REG(val); \
415 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
416 data->temp_##reg); \
417 } \
418 \
419 mutex_unlock(&data->update_lock); \
420 return count; \
421}
422store_temp_reg(OVER, max);
423store_temp_reg(HYST, max_hyst);
424
425#define sysfs_temp_offsets(offset) \
426static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
427 show_temp, NULL, offset); \
428static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
429 show_temp_max, store_temp_max, offset); \
430static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
431 show_temp_max_hyst, store_temp_max_hyst, offset);
432
433sysfs_temp_offsets(1);
434sysfs_temp_offsets(2);
435sysfs_temp_offsets(3);
436
437static ssize_t
438show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
439{
440 struct w83781d_data *data = w83781d_update_device(dev);
441 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
442}
443
444static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
445
446static ssize_t
447show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
448{
449 struct w83781d_data *data = dev_get_drvdata(dev);
450 return sprintf(buf, "%ld\n", (long) data->vrm);
451}
452
453static ssize_t
454store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
455{
456 struct w83781d_data *data = dev_get_drvdata(dev);
457 u32 val;
458
459 val = simple_strtoul(buf, NULL, 10);
460 data->vrm = val;
461
462 return count;
463}
464
465static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
466
467static ssize_t
468show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
469{
470 struct w83781d_data *data = w83781d_update_device(dev);
471 return sprintf(buf, "%u\n", data->alarms);
472}
473
474static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
475
476static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
477 char *buf)
478{
479 struct w83781d_data *data = w83781d_update_device(dev);
480 int bitnr = to_sensor_dev_attr(attr)->index;
481 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
482}
483
484/* The W83781D has a single alarm bit for temp2 and temp3 */
485static ssize_t show_temp3_alarm(struct device *dev,
486 struct device_attribute *attr, char *buf)
487{
488 struct w83781d_data *data = w83781d_update_device(dev);
489 int bitnr = (data->type == w83781d) ? 5 : 13;
490 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
491}
492
493static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
494static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
495static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
496static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
497static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
498static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
499static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
500static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
501static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
502static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
503static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
504static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
505static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
506static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
507static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
508
509static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
510{
511 struct w83781d_data *data = w83781d_update_device(dev);
512 return sprintf(buf, "%ld\n",
513 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
514}
515
516static ssize_t
517store_beep_mask(struct device *dev, struct device_attribute *attr,
518 const char *buf, size_t count)
519{
520 struct w83781d_data *data = dev_get_drvdata(dev);
521 u32 val;
522
523 val = simple_strtoul(buf, NULL, 10);
524
525 mutex_lock(&data->update_lock);
526 data->beep_mask &= 0x8000; /* preserve beep enable */
527 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
528 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
529 data->beep_mask & 0xff);
530 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
531 (data->beep_mask >> 8) & 0xff);
532 if (data->type != w83781d && data->type != as99127f) {
533 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
534 ((data->beep_mask) >> 16) & 0xff);
535 }
536 mutex_unlock(&data->update_lock);
537
538 return count;
539}
540
541static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
542 show_beep_mask, store_beep_mask);
543
544static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
545 char *buf)
546{
547 struct w83781d_data *data = w83781d_update_device(dev);
548 int bitnr = to_sensor_dev_attr(attr)->index;
549 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
550}
551
552static ssize_t
553store_beep(struct device *dev, struct device_attribute *attr,
554 const char *buf, size_t count)
555{
556 struct w83781d_data *data = dev_get_drvdata(dev);
557 int bitnr = to_sensor_dev_attr(attr)->index;
558 unsigned long bit;
559 u8 reg;
560
561 bit = simple_strtoul(buf, NULL, 10);
562 if (bit & ~1)
563 return -EINVAL;
564
565 mutex_lock(&data->update_lock);
566 if (bit)
567 data->beep_mask |= (1 << bitnr);
568 else
569 data->beep_mask &= ~(1 << bitnr);
570
571 if (bitnr < 8) {
572 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
573 if (bit)
574 reg |= (1 << bitnr);
575 else
576 reg &= ~(1 << bitnr);
577 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
578 } else if (bitnr < 16) {
579 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
580 if (bit)
581 reg |= (1 << (bitnr - 8));
582 else
583 reg &= ~(1 << (bitnr - 8));
584 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
585 } else {
586 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
587 if (bit)
588 reg |= (1 << (bitnr - 16));
589 else
590 reg &= ~(1 << (bitnr - 16));
591 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
592 }
593 mutex_unlock(&data->update_lock);
594
595 return count;
596}
597
598/* The W83781D has a single beep bit for temp2 and temp3 */
599static ssize_t show_temp3_beep(struct device *dev,
600 struct device_attribute *attr, char *buf)
601{
602 struct w83781d_data *data = w83781d_update_device(dev);
603 int bitnr = (data->type == w83781d) ? 5 : 13;
604 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
605}
606
607static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
608 show_beep, store_beep, 0);
609static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
610 show_beep, store_beep, 1);
611static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
612 show_beep, store_beep, 2);
613static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
614 show_beep, store_beep, 3);
615static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
616 show_beep, store_beep, 8);
617static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
618 show_beep, store_beep, 9);
619static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
620 show_beep, store_beep, 10);
621static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
622 show_beep, store_beep, 16);
623static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
624 show_beep, store_beep, 17);
625static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
626 show_beep, store_beep, 6);
627static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
628 show_beep, store_beep, 7);
629static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
630 show_beep, store_beep, 11);
631static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
632 show_beep, store_beep, 4);
633static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
634 show_beep, store_beep, 5);
635static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
636 show_temp3_beep, store_beep, 13);
637static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
638 show_beep, store_beep, 15);
639
640static ssize_t
641show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
642{
643 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
644 struct w83781d_data *data = w83781d_update_device(dev);
645 return sprintf(buf, "%ld\n",
646 (long) DIV_FROM_REG(data->fan_div[attr->index]));
647}
648
649/* Note: we save and restore the fan minimum here, because its value is
650 determined in part by the fan divisor. This follows the principle of
651 least surprise; the user doesn't expect the fan minimum to change just
652 because the divisor changed. */
653static ssize_t
654store_fan_div(struct device *dev, struct device_attribute *da,
655 const char *buf, size_t count)
656{
657 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
658 struct w83781d_data *data = dev_get_drvdata(dev);
659 unsigned long min;
660 int nr = attr->index;
661 u8 reg;
662 unsigned long val = simple_strtoul(buf, NULL, 10);
663
664 mutex_lock(&data->update_lock);
665
666 /* Save fan_min */
667 min = FAN_FROM_REG(data->fan_min[nr],
668 DIV_FROM_REG(data->fan_div[nr]));
669
670 data->fan_div[nr] = DIV_TO_REG(val, data->type);
671
672 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
673 & (nr==0 ? 0xcf : 0x3f))
674 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
675 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
676
677 /* w83781d and as99127f don't have extended divisor bits */
678 if (data->type != w83781d && data->type != as99127f) {
679 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
680 & ~(1 << (5 + nr)))
681 | ((data->fan_div[nr] & 0x04) << (3 + nr));
682 w83781d_write_value(data, W83781D_REG_VBAT, reg);
683 }
684
685 /* Restore fan_min */
686 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
687 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
688
689 mutex_unlock(&data->update_lock);
690 return count;
691}
692
693static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
694 show_fan_div, store_fan_div, 0);
695static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
696 show_fan_div, store_fan_div, 1);
697static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
698 show_fan_div, store_fan_div, 2);
699
700static ssize_t
701show_pwm(struct device *dev, struct device_attribute *da, char *buf)
702{
703 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
704 struct w83781d_data *data = w83781d_update_device(dev);
705 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
706}
707
708static ssize_t
709show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
710{
711 struct w83781d_data *data = w83781d_update_device(dev);
712 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
713}
714
715static ssize_t
716store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
717 size_t count)
718{
719 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
720 struct w83781d_data *data = dev_get_drvdata(dev);
721 int nr = attr->index;
722 u32 val;
723
724 val = simple_strtoul(buf, NULL, 10);
725
726 mutex_lock(&data->update_lock);
727 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
728 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
729 mutex_unlock(&data->update_lock);
730 return count;
731}
732
733static ssize_t
734store_pwm2_enable(struct device *dev, struct device_attribute *da,
735 const char *buf, size_t count)
736{
737 struct w83781d_data *data = dev_get_drvdata(dev);
738 u32 val, reg;
739
740 val = simple_strtoul(buf, NULL, 10);
741
742 mutex_lock(&data->update_lock);
743
744 switch (val) {
745 case 0:
746 case 1:
747 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
748 w83781d_write_value(data, W83781D_REG_PWMCLK12,
749 (reg & 0xf7) | (val << 3));
750
751 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
752 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
753 (reg & 0xef) | (!val << 4));
754
755 data->pwm2_enable = val;
756 break;
757
758 default:
759 mutex_unlock(&data->update_lock);
760 return -EINVAL;
761 }
762
763 mutex_unlock(&data->update_lock);
764 return count;
765}
766
767static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
768static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
769static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
770static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
771/* only PWM2 can be enabled/disabled */
772static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
773 show_pwm2_enable, store_pwm2_enable);
774
775static ssize_t
776show_sensor(struct device *dev, struct device_attribute *da, char *buf)
777{
778 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
779 struct w83781d_data *data = w83781d_update_device(dev);
780 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
781}
782
783static ssize_t
784store_sensor(struct device *dev, struct device_attribute *da,
785 const char *buf, size_t count)
786{
787 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
788 struct w83781d_data *data = dev_get_drvdata(dev);
789 int nr = attr->index;
790 u32 val, tmp;
791
792 val = simple_strtoul(buf, NULL, 10);
793
794 mutex_lock(&data->update_lock);
795
796 switch (val) {
797 case 1: /* PII/Celeron diode */
798 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
799 w83781d_write_value(data, W83781D_REG_SCFG1,
800 tmp | BIT_SCFG1[nr]);
801 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
802 w83781d_write_value(data, W83781D_REG_SCFG2,
803 tmp | BIT_SCFG2[nr]);
804 data->sens[nr] = val;
805 break;
806 case 2: /* 3904 */
807 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
808 w83781d_write_value(data, W83781D_REG_SCFG1,
809 tmp | BIT_SCFG1[nr]);
810 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
811 w83781d_write_value(data, W83781D_REG_SCFG2,
812 tmp & ~BIT_SCFG2[nr]);
813 data->sens[nr] = val;
814 break;
815 case W83781D_DEFAULT_BETA:
816 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
817 "instead\n", W83781D_DEFAULT_BETA);
818 /* fall through */
819 case 4: /* thermistor */
820 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
821 w83781d_write_value(data, W83781D_REG_SCFG1,
822 tmp & ~BIT_SCFG1[nr]);
823 data->sens[nr] = val;
824 break;
825 default:
826 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
827 (long) val);
828 break;
829 }
830
831 mutex_unlock(&data->update_lock);
832 return count;
833}
834
835static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
836 show_sensor, store_sensor, 0);
837static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
838 show_sensor, store_sensor, 1);
839static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
840 show_sensor, store_sensor, 2);
841
842/* I2C devices get this name attribute automatically, but for ISA devices
843 we must create it by ourselves. */
844static ssize_t
845show_name(struct device *dev, struct device_attribute *devattr, char *buf)
846{
847 struct w83781d_data *data = dev_get_drvdata(dev);
848 return sprintf(buf, "%s\n", data->client.name);
849}
850static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
851
852/* This function is called when:
853 * w83781d_driver is inserted (when this module is loaded), for each
854 available adapter
855 * when a new adapter is inserted (and w83781d_driver is still present) */
856static int
857w83781d_attach_adapter(struct i2c_adapter *adapter)
858{
859 if (!(adapter->class & I2C_CLASS_HWMON))
860 return 0;
861 return i2c_probe(adapter, &addr_data, w83781d_detect);
862}
863
864/* Assumes that adapter is of I2C, not ISA variety.
865 * OTHERWISE DON'T CALL THIS
866 */
867static int
868w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
869 struct i2c_client *new_client)
870{
871 int i, val1 = 0, id;
872 int err;
873 const char *client_name = "";
874 struct w83781d_data *data = i2c_get_clientdata(new_client);
875
876 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
877 if (!(data->lm75[0])) {
878 err = -ENOMEM;
879 goto ERROR_SC_0;
880 }
881
882 id = i2c_adapter_id(adapter);
883
884 if (force_subclients[0] == id && force_subclients[1] == address) {
885 for (i = 2; i <= 3; i++) {
886 if (force_subclients[i] < 0x48 ||
887 force_subclients[i] > 0x4f) {
888 dev_err(&new_client->dev, "Invalid subclient "
889 "address %d; must be 0x48-0x4f\n",
890 force_subclients[i]);
891 err = -EINVAL;
892 goto ERROR_SC_1;
893 }
894 }
895 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
896 (force_subclients[2] & 0x07) |
897 ((force_subclients[3] & 0x07) << 4));
898 data->lm75[0]->addr = force_subclients[2];
899 } else {
900 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
901 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
902 }
903
904 if (kind != w83783s) {
905 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
906 if (!(data->lm75[1])) {
907 err = -ENOMEM;
908 goto ERROR_SC_1;
909 }
910
911 if (force_subclients[0] == id &&
912 force_subclients[1] == address) {
913 data->lm75[1]->addr = force_subclients[3];
914 } else {
915 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
916 }
917 if (data->lm75[0]->addr == data->lm75[1]->addr) {
918 dev_err(&new_client->dev,
919 "Duplicate addresses 0x%x for subclients.\n",
920 data->lm75[0]->addr);
921 err = -EBUSY;
922 goto ERROR_SC_2;
923 }
924 }
925
926 if (kind == w83781d)
927 client_name = "w83781d subclient";
928 else if (kind == w83782d)
929 client_name = "w83782d subclient";
930 else if (kind == w83783s)
931 client_name = "w83783s subclient";
932 else if (kind == as99127f)
933 client_name = "as99127f subclient";
934
935 for (i = 0; i <= 1; i++) {
936 /* store all data in w83781d */
937 i2c_set_clientdata(data->lm75[i], NULL);
938 data->lm75[i]->adapter = adapter;
939 data->lm75[i]->driver = &w83781d_driver;
940 data->lm75[i]->flags = 0;
941 strlcpy(data->lm75[i]->name, client_name,
942 I2C_NAME_SIZE);
943 if ((err = i2c_attach_client(data->lm75[i]))) {
944 dev_err(&new_client->dev, "Subclient %d "
945 "registration at address 0x%x "
946 "failed.\n", i, data->lm75[i]->addr);
947 if (i == 1)
948 goto ERROR_SC_3;
949 goto ERROR_SC_2;
950 }
951 if (kind == w83783s)
952 break;
953 }
954
955 return 0;
956
957/* Undo inits in case of errors */
958ERROR_SC_3:
959 i2c_detach_client(data->lm75[0]);
960ERROR_SC_2:
961 kfree(data->lm75[1]);
962ERROR_SC_1:
963 kfree(data->lm75[0]);
964ERROR_SC_0:
965 return err;
966}
967
968#define IN_UNIT_ATTRS(X) \
969 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
970 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
971 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
972 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
973 &sensor_dev_attr_in##X##_beep.dev_attr.attr
974
975#define FAN_UNIT_ATTRS(X) \
976 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
977 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
978 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
979 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
980 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
981
982#define TEMP_UNIT_ATTRS(X) \
983 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
984 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
985 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
986 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
987 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
988
989static struct attribute* w83781d_attributes[] = {
990 IN_UNIT_ATTRS(0),
991 IN_UNIT_ATTRS(2),
992 IN_UNIT_ATTRS(3),
993 IN_UNIT_ATTRS(4),
994 IN_UNIT_ATTRS(5),
995 IN_UNIT_ATTRS(6),
996 FAN_UNIT_ATTRS(1),
997 FAN_UNIT_ATTRS(2),
998 FAN_UNIT_ATTRS(3),
999 TEMP_UNIT_ATTRS(1),
1000 TEMP_UNIT_ATTRS(2),
1001 &dev_attr_cpu0_vid.attr,
1002 &dev_attr_vrm.attr,
1003 &dev_attr_alarms.attr,
1004 &dev_attr_beep_mask.attr,
1005 &sensor_dev_attr_beep_enable.dev_attr.attr,
1006 NULL
1007};
1008static const struct attribute_group w83781d_group = {
1009 .attrs = w83781d_attributes,
1010};
1011
1012static struct attribute *w83781d_attributes_opt[] = {
1013 IN_UNIT_ATTRS(1),
1014 IN_UNIT_ATTRS(7),
1015 IN_UNIT_ATTRS(8),
1016 TEMP_UNIT_ATTRS(3),
1017 &sensor_dev_attr_pwm1.dev_attr.attr,
1018 &sensor_dev_attr_pwm2.dev_attr.attr,
1019 &sensor_dev_attr_pwm3.dev_attr.attr,
1020 &sensor_dev_attr_pwm4.dev_attr.attr,
1021 &dev_attr_pwm2_enable.attr,
1022 &sensor_dev_attr_temp1_type.dev_attr.attr,
1023 &sensor_dev_attr_temp2_type.dev_attr.attr,
1024 &sensor_dev_attr_temp3_type.dev_attr.attr,
1025 NULL
1026};
1027static const struct attribute_group w83781d_group_opt = {
1028 .attrs = w83781d_attributes_opt,
1029};
1030
1031/* No clean up is done on error, it's up to the caller */
1032static int
1033w83781d_create_files(struct device *dev, int kind, int is_isa)
1034{
1035 int err;
1036
1037 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1038 return err;
1039
1040 if (kind != w83783s) {
1041 if ((err = device_create_file(dev,
1042 &sensor_dev_attr_in1_input.dev_attr))
1043 || (err = device_create_file(dev,
1044 &sensor_dev_attr_in1_min.dev_attr))
1045 || (err = device_create_file(dev,
1046 &sensor_dev_attr_in1_max.dev_attr))
1047 || (err = device_create_file(dev,
1048 &sensor_dev_attr_in1_alarm.dev_attr))
1049 || (err = device_create_file(dev,
1050 &sensor_dev_attr_in1_beep.dev_attr)))
1051 return err;
1052 }
1053 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1054 if ((err = device_create_file(dev,
1055 &sensor_dev_attr_in7_input.dev_attr))
1056 || (err = device_create_file(dev,
1057 &sensor_dev_attr_in7_min.dev_attr))
1058 || (err = device_create_file(dev,
1059 &sensor_dev_attr_in7_max.dev_attr))
1060 || (err = device_create_file(dev,
1061 &sensor_dev_attr_in7_alarm.dev_attr))
1062 || (err = device_create_file(dev,
1063 &sensor_dev_attr_in7_beep.dev_attr))
1064 || (err = device_create_file(dev,
1065 &sensor_dev_attr_in8_input.dev_attr))
1066 || (err = device_create_file(dev,
1067 &sensor_dev_attr_in8_min.dev_attr))
1068 || (err = device_create_file(dev,
1069 &sensor_dev_attr_in8_max.dev_attr))
1070 || (err = device_create_file(dev,
1071 &sensor_dev_attr_in8_alarm.dev_attr))
1072 || (err = device_create_file(dev,
1073 &sensor_dev_attr_in8_beep.dev_attr)))
1074 return err;
1075 }
1076 if (kind != w83783s) {
1077 if ((err = device_create_file(dev,
1078 &sensor_dev_attr_temp3_input.dev_attr))
1079 || (err = device_create_file(dev,
1080 &sensor_dev_attr_temp3_max.dev_attr))
1081 || (err = device_create_file(dev,
1082 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1083 || (err = device_create_file(dev,
1084 &sensor_dev_attr_temp3_alarm.dev_attr))
1085 || (err = device_create_file(dev,
1086 &sensor_dev_attr_temp3_beep.dev_attr)))
1087 return err;
1088
1089 if (kind != w83781d) {
1090 err = sysfs_chmod_file(&dev->kobj,
1091 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1092 S_IRUGO | S_IWUSR);
1093 if (err)
1094 return err;
1095 }
1096 }
1097
1098 if (kind != w83781d && kind != as99127f) {
1099 if ((err = device_create_file(dev,
1100 &sensor_dev_attr_pwm1.dev_attr))
1101 || (err = device_create_file(dev,
1102 &sensor_dev_attr_pwm2.dev_attr))
1103 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1104 return err;
1105 }
1106 if (kind == w83782d && !is_isa) {
1107 if ((err = device_create_file(dev,
1108 &sensor_dev_attr_pwm3.dev_attr))
1109 || (err = device_create_file(dev,
1110 &sensor_dev_attr_pwm4.dev_attr)))
1111 return err;
1112 }
1113
1114 if (kind != as99127f && kind != w83781d) {
1115 if ((err = device_create_file(dev,
1116 &sensor_dev_attr_temp1_type.dev_attr))
1117 || (err = device_create_file(dev,
1118 &sensor_dev_attr_temp2_type.dev_attr)))
1119 return err;
1120 if (kind != w83783s) {
1121 if ((err = device_create_file(dev,
1122 &sensor_dev_attr_temp3_type.dev_attr)))
1123 return err;
1124 }
1125 }
1126
1127 if (is_isa) {
1128 err = device_create_file(&pdev->dev, &dev_attr_name);
1129 if (err)
1130 return err;
1131 }
1132
1133 return 0;
1134}
1135
1136static int
1137w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1138{
1139 int val1 = 0, val2;
1140 struct i2c_client *client;
1141 struct device *dev;
1142 struct w83781d_data *data;
1143 int err;
1144 const char *client_name = "";
1145 enum vendor { winbond, asus } vendid;
1146
1147 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1148 err = -EINVAL;
1149 goto ERROR1;
1150 }
1151
1152 /* OK. For now, we presume we have a valid client. We now create the
1153 client structure, even though we cannot fill it completely yet.
1154 But it allows us to access w83781d_{read,write}_value. */
1155
1156 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1157 err = -ENOMEM;
1158 goto ERROR1;
1159 }
1160
1161 client = &data->client;
1162 i2c_set_clientdata(client, data);
1163 client->addr = address;
1164 mutex_init(&data->lock);
1165 client->adapter = adapter;
1166 client->driver = &w83781d_driver;
1167 dev = &client->dev;
1168
1169 /* Now, we do the remaining detection. */
1170
1171 /* The w8378?d may be stuck in some other bank than bank 0. This may
1172 make reading other information impossible. Specify a force=... or
1173 force_*=... parameter, and the Winbond will be reset to the right
1174 bank. */
1175 if (kind < 0) {
1176 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
1177 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1178 "failed at step 3\n");
1179 err = -ENODEV;
1180 goto ERROR2;
1181 }
1182 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1183 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1184 /* Check for Winbond or Asus ID if in bank 0 */
1185 if ((!(val1 & 0x07)) &&
1186 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1187 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1188 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1189 "failed at step 4\n");
1190 err = -ENODEV;
1191 goto ERROR2;
1192 }
1193 /* If Winbond SMBus, check address at 0x48.
1194 Asus doesn't support, except for as99127f rev.2 */
1195 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1196 ((val1 & 0x80) && (val2 == 0x5c))) {
1197 if (w83781d_read_value
1198 (data, W83781D_REG_I2C_ADDR) != address) {
1199 dev_dbg(&adapter->dev, "Detection of w83781d "
1200 "chip failed at step 5\n");
1201 err = -ENODEV;
1202 goto ERROR2;
1203 }
1204 }
1205 }
1206
1207 /* We have either had a force parameter, or we have already detected the
1208 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1209 w83781d_write_value(data, W83781D_REG_BANK,
1210 (w83781d_read_value(data, W83781D_REG_BANK)
1211 & 0x78) | 0x80);
1212
1213 /* Determine the chip type. */
1214 if (kind <= 0) {
1215 /* get vendor ID */
1216 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1217 if (val2 == 0x5c)
1218 vendid = winbond;
1219 else if (val2 == 0x12)
1220 vendid = asus;
1221 else {
1222 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1223 "neither Winbond nor Asus\n");
1224 err = -ENODEV;
1225 goto ERROR2;
1226 }
1227
1228 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1229 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1230 kind = w83781d;
1231 else if (val1 == 0x30 && vendid == winbond)
1232 kind = w83782d;
1233 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1234 kind = w83783s;
1235 else if (val1 == 0x31)
1236 kind = as99127f;
1237 else {
1238 if (kind == 0)
1239 dev_warn(&adapter->dev, "Ignoring 'force' "
1240 "parameter for unknown chip at "
1241 "address 0x%02x\n", address);
1242 err = -EINVAL;
1243 goto ERROR2;
1244 }
1245 }
1246
1247 if (kind == w83781d) {
1248 client_name = "w83781d";
1249 } else if (kind == w83782d) {
1250 client_name = "w83782d";
1251 } else if (kind == w83783s) {
1252 client_name = "w83783s";
1253 } else if (kind == as99127f) {
1254 client_name = "as99127f";
1255 }
1256
1257 /* Fill in the remaining client fields and put into the global list */
1258 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1259 data->type = kind;
1260
1261 /* Tell the I2C layer a new client has arrived */
1262 if ((err = i2c_attach_client(client)))
1263 goto ERROR2;
1264
1265 /* attach secondary i2c lm75-like clients */
1266 if ((err = w83781d_detect_subclients(adapter, address,
1267 kind, client)))
1268 goto ERROR3;
1269
1270 /* Initialize the chip */
1271 w83781d_init_device(dev);
1272
1273 /* Register sysfs hooks */
1274 err = w83781d_create_files(dev, kind, 0);
1275 if (err)
1276 goto ERROR4;
1277
1278 data->hwmon_dev = hwmon_device_register(dev);
1279 if (IS_ERR(data->hwmon_dev)) {
1280 err = PTR_ERR(data->hwmon_dev);
1281 goto ERROR4;
1282 }
1283
1284 return 0;
1285
1286ERROR4:
1287 sysfs_remove_group(&dev->kobj, &w83781d_group);
1288 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1289
1290 if (data->lm75[1]) {
1291 i2c_detach_client(data->lm75[1]);
1292 kfree(data->lm75[1]);
1293 }
1294 if (data->lm75[0]) {
1295 i2c_detach_client(data->lm75[0]);
1296 kfree(data->lm75[0]);
1297 }
1298ERROR3:
1299 i2c_detach_client(client);
1300ERROR2:
1301 kfree(data);
1302ERROR1:
1303 return err;
1304}
1305
1306static int
1307w83781d_detach_client(struct i2c_client *client)
1308{
1309 struct w83781d_data *data = i2c_get_clientdata(client);
1310 int err;
1311
1312 /* main client */
1313 if (data) {
1314 hwmon_device_unregister(data->hwmon_dev);
1315 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1316 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1317 }
1318
1319 if ((err = i2c_detach_client(client)))
1320 return err;
1321
1322 /* main client */
1323 if (data)
1324 kfree(data);
1325
1326 /* subclient */
1327 else
1328 kfree(client);
1329
1330 return 0;
1331}
1332
1333static int __devinit
1334w83781d_isa_probe(struct platform_device *pdev)
1335{
1336 int err, reg;
1337 struct w83781d_data *data;
1338 struct resource *res;
1339 const char *name;
1340
1341 /* Reserve the ISA region */
1342 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1343 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1344 "w83781d")) {
1345 err = -EBUSY;
1346 goto exit;
1347 }
1348
1349 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1350 err = -ENOMEM;
1351 goto exit_release_region;
1352 }
1353 mutex_init(&data->lock);
1354 data->client.addr = res->start;
1355 i2c_set_clientdata(&data->client, data);
1356 platform_set_drvdata(pdev, data);
1357
1358 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1359 switch (reg) {
1360 case 0x30:
1361 data->type = w83782d;
1362 name = "w83782d";
1363 break;
1364 default:
1365 data->type = w83781d;
1366 name = "w83781d";
1367 }
1368 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1369
1370 /* Initialize the W83781D chip */
1371 w83781d_init_device(&pdev->dev);
1372
1373 /* Register sysfs hooks */
1374 err = w83781d_create_files(&pdev->dev, data->type, 1);
1375 if (err)
1376 goto exit_remove_files;
1377
1378 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1379 if (IS_ERR(data->hwmon_dev)) {
1380 err = PTR_ERR(data->hwmon_dev);
1381 goto exit_remove_files;
1382 }
1383
1384 return 0;
1385
1386 exit_remove_files:
1387 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1388 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1389 device_remove_file(&pdev->dev, &dev_attr_name);
1390 kfree(data);
1391 exit_release_region:
1392 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1393 exit:
1394 return err;
1395}
1396
1397static int __devexit
1398w83781d_isa_remove(struct platform_device *pdev)
1399{
1400 struct w83781d_data *data = platform_get_drvdata(pdev);
1401
1402 hwmon_device_unregister(data->hwmon_dev);
1403 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1404 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1405 device_remove_file(&pdev->dev, &dev_attr_name);
1406 release_region(data->client.addr + W83781D_ADDR_REG_OFFSET, 2);
1407 kfree(data);
1408
1409 return 0;
1410}
1411
1412/* The SMBus locks itself, usually, but nothing may access the Winbond between
1413 bank switches. ISA access must always be locked explicitly!
1414 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1415 would slow down the W83781D access and should not be necessary.
1416 There are some ugly typecasts here, but the good news is - they should
1417 nowhere else be necessary! */
1418static int
1419w83781d_read_value(struct w83781d_data *data, u16 reg)
1420{
1421 struct i2c_client *client = &data->client;
1422 int res, word_sized, bank;
1423 struct i2c_client *cl;
1424
1425 mutex_lock(&data->lock);
1426 if (!client->driver) { /* ISA device */
1427 word_sized = (((reg & 0xff00) == 0x100)
1428 || ((reg & 0xff00) == 0x200))
1429 && (((reg & 0x00ff) == 0x50)
1430 || ((reg & 0x00ff) == 0x53)
1431 || ((reg & 0x00ff) == 0x55));
1432 if (reg & 0xff00) {
1433 outb_p(W83781D_REG_BANK,
1434 client->addr + W83781D_ADDR_REG_OFFSET);
1435 outb_p(reg >> 8,
1436 client->addr + W83781D_DATA_REG_OFFSET);
1437 }
1438 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1439 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1440 if (word_sized) {
1441 outb_p((reg & 0xff) + 1,
1442 client->addr + W83781D_ADDR_REG_OFFSET);
1443 res =
1444 (res << 8) + inb_p(client->addr +
1445 W83781D_DATA_REG_OFFSET);
1446 }
1447 if (reg & 0xff00) {
1448 outb_p(W83781D_REG_BANK,
1449 client->addr + W83781D_ADDR_REG_OFFSET);
1450 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1451 }
1452 } else {
1453 bank = (reg >> 8) & 0x0f;
1454 if (bank > 2)
1455 /* switch banks */
1456 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1457 bank);
1458 if (bank == 0 || bank > 2) {
1459 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1460 } else {
1461 /* switch to subclient */
1462 cl = data->lm75[bank - 1];
1463 /* convert from ISA to LM75 I2C addresses */
1464 switch (reg & 0xff) {
1465 case 0x50: /* TEMP */
1466 res = swab16(i2c_smbus_read_word_data(cl, 0));
1467 break;
1468 case 0x52: /* CONFIG */
1469 res = i2c_smbus_read_byte_data(cl, 1);
1470 break;
1471 case 0x53: /* HYST */
1472 res = swab16(i2c_smbus_read_word_data(cl, 2));
1473 break;
1474 case 0x55: /* OVER */
1475 default:
1476 res = swab16(i2c_smbus_read_word_data(cl, 3));
1477 break;
1478 }
1479 }
1480 if (bank > 2)
1481 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1482 }
1483 mutex_unlock(&data->lock);
1484 return res;
1485}
1486
1487static int
1488w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1489{
1490 struct i2c_client *client = &data->client;
1491 int word_sized, bank;
1492 struct i2c_client *cl;
1493
1494 mutex_lock(&data->lock);
1495 if (!client->driver) { /* ISA device */
1496 word_sized = (((reg & 0xff00) == 0x100)
1497 || ((reg & 0xff00) == 0x200))
1498 && (((reg & 0x00ff) == 0x53)
1499 || ((reg & 0x00ff) == 0x55));
1500 if (reg & 0xff00) {
1501 outb_p(W83781D_REG_BANK,
1502 client->addr + W83781D_ADDR_REG_OFFSET);
1503 outb_p(reg >> 8,
1504 client->addr + W83781D_DATA_REG_OFFSET);
1505 }
1506 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1507 if (word_sized) {
1508 outb_p(value >> 8,
1509 client->addr + W83781D_DATA_REG_OFFSET);
1510 outb_p((reg & 0xff) + 1,
1511 client->addr + W83781D_ADDR_REG_OFFSET);
1512 }
1513 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1514 if (reg & 0xff00) {
1515 outb_p(W83781D_REG_BANK,
1516 client->addr + W83781D_ADDR_REG_OFFSET);
1517 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1518 }
1519 } else {
1520 bank = (reg >> 8) & 0x0f;
1521 if (bank > 2)
1522 /* switch banks */
1523 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1524 bank);
1525 if (bank == 0 || bank > 2) {
1526 i2c_smbus_write_byte_data(client, reg & 0xff,
1527 value & 0xff);
1528 } else {
1529 /* switch to subclient */
1530 cl = data->lm75[bank - 1];
1531 /* convert from ISA to LM75 I2C addresses */
1532 switch (reg & 0xff) {
1533 case 0x52: /* CONFIG */
1534 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1535 break;
1536 case 0x53: /* HYST */
1537 i2c_smbus_write_word_data(cl, 2, swab16(value));
1538 break;
1539 case 0x55: /* OVER */
1540 i2c_smbus_write_word_data(cl, 3, swab16(value));
1541 break;
1542 }
1543 }
1544 if (bank > 2)
1545 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1546 }
1547 mutex_unlock(&data->lock);
1548 return 0;
1549}
1550
1551static void
1552w83781d_init_device(struct device *dev)
1553{
1554 struct w83781d_data *data = dev_get_drvdata(dev);
1555 int i, p;
1556 int type = data->type;
1557 u8 tmp;
1558
1559 if (reset && type != as99127f) { /* this resets registers we don't have
1560 documentation for on the as99127f */
1561 /* Resetting the chip has been the default for a long time,
1562 but it causes the BIOS initializations (fan clock dividers,
1563 thermal sensor types...) to be lost, so it is now optional.
1564 It might even go away if nobody reports it as being useful,
1565 as I see very little reason why this would be needed at
1566 all. */
1567 dev_info(dev, "If reset=1 solved a problem you were "
1568 "having, please report!\n");
1569
1570 /* save these registers */
1571 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1572 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1573 /* Reset all except Watchdog values and last conversion values
1574 This sets fan-divs to 2, among others */
1575 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1576 /* Restore the registers and disable power-on abnormal beep.
1577 This saves FAN 1/2/3 input/output values set by BIOS. */
1578 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1579 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1580 /* Disable master beep-enable (reset turns it on).
1581 Individual beep_mask should be reset to off but for some reason
1582 disabling this bit helps some people not get beeped */
1583 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1584 }
1585
1586 /* Disable power-on abnormal beep, as advised by the datasheet.
1587 Already done if reset=1. */
1588 if (init && !reset && type != as99127f) {
1589 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1590 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1591 }
1592
1593 data->vrm = vid_which_vrm();
1594
1595 if ((type != w83781d) && (type != as99127f)) {
1596 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1597 for (i = 1; i <= 3; i++) {
1598 if (!(tmp & BIT_SCFG1[i - 1])) {
1599 data->sens[i - 1] = 4;
1600 } else {
1601 if (w83781d_read_value
1602 (data,
1603 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1604 data->sens[i - 1] = 1;
1605 else
1606 data->sens[i - 1] = 2;
1607 }
1608 if (type == w83783s && i == 2)
1609 break;
1610 }
1611 }
1612
1613 if (init && type != as99127f) {
1614 /* Enable temp2 */
1615 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1616 if (tmp & 0x01) {
1617 dev_warn(dev, "Enabling temp2, readings "
1618 "might not make sense\n");
1619 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1620 tmp & 0xfe);
1621 }
1622
1623 /* Enable temp3 */
1624 if (type != w83783s) {
1625 tmp = w83781d_read_value(data,
1626 W83781D_REG_TEMP3_CONFIG);
1627 if (tmp & 0x01) {
1628 dev_warn(dev, "Enabling temp3, "
1629 "readings might not make sense\n");
1630 w83781d_write_value(data,
1631 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1632 }
1633 }
1634 }
1635
1636 /* Start monitoring */
1637 w83781d_write_value(data, W83781D_REG_CONFIG,
1638 (w83781d_read_value(data,
1639 W83781D_REG_CONFIG) & 0xf7)
1640 | 0x01);
1641
1642 /* A few vars need to be filled upon startup */
1643 for (i = 0; i < 3; i++) {
1644 data->fan_min[i] = w83781d_read_value(data,
1645 W83781D_REG_FAN_MIN(i));
1646 }
1647
1648 mutex_init(&data->update_lock);
1649}
1650
1651static struct w83781d_data *w83781d_update_device(struct device *dev)
1652{
1653 struct w83781d_data *data = dev_get_drvdata(dev);
1654 struct i2c_client *client = &data->client;
1655 int i;
1656
1657 mutex_lock(&data->update_lock);
1658
1659 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1660 || !data->valid) {
1661 dev_dbg(dev, "Starting device update\n");
1662
1663 for (i = 0; i <= 8; i++) {
1664 if (data->type == w83783s && i == 1)
1665 continue; /* 783S has no in1 */
1666 data->in[i] =
1667 w83781d_read_value(data, W83781D_REG_IN(i));
1668 data->in_min[i] =
1669 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1670 data->in_max[i] =
1671 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1672 if ((data->type != w83782d) && (i == 6))
1673 break;
1674 }
1675 for (i = 0; i < 3; i++) {
1676 data->fan[i] =
1677 w83781d_read_value(data, W83781D_REG_FAN(i));
1678 data->fan_min[i] =
1679 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1680 }
1681 if (data->type != w83781d && data->type != as99127f) {
1682 for (i = 0; i < 4; i++) {
1683 data->pwm[i] =
1684 w83781d_read_value(data,
1685 W83781D_REG_PWM[i]);
1686 if ((data->type != w83782d || !client->driver)
1687 && i == 1)
1688 break;
1689 }
1690 /* Only PWM2 can be disabled */
1691 data->pwm2_enable = (w83781d_read_value(data,
1692 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1693 }
1694
1695 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1696 data->temp_max =
1697 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1698 data->temp_max_hyst =
1699 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1700 data->temp_add[0] =
1701 w83781d_read_value(data, W83781D_REG_TEMP(2));
1702 data->temp_max_add[0] =
1703 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1704 data->temp_max_hyst_add[0] =
1705 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1706 if (data->type != w83783s) {
1707 data->temp_add[1] =
1708 w83781d_read_value(data, W83781D_REG_TEMP(3));
1709 data->temp_max_add[1] =
1710 w83781d_read_value(data,
1711 W83781D_REG_TEMP_OVER(3));
1712 data->temp_max_hyst_add[1] =
1713 w83781d_read_value(data,
1714 W83781D_REG_TEMP_HYST(3));
1715 }
1716 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1717 data->vid = i & 0x0f;
1718 data->vid |= (w83781d_read_value(data,
1719 W83781D_REG_CHIPID) & 0x01) << 4;
1720 data->fan_div[0] = (i >> 4) & 0x03;
1721 data->fan_div[1] = (i >> 6) & 0x03;
1722 data->fan_div[2] = (w83781d_read_value(data,
1723 W83781D_REG_PIN) >> 6) & 0x03;
1724 if ((data->type != w83781d) && (data->type != as99127f)) {
1725 i = w83781d_read_value(data, W83781D_REG_VBAT);
1726 data->fan_div[0] |= (i >> 3) & 0x04;
1727 data->fan_div[1] |= (i >> 4) & 0x04;
1728 data->fan_div[2] |= (i >> 5) & 0x04;
1729 }
1730 if (data->type == w83782d) {
1731 data->alarms = w83781d_read_value(data,
1732 W83782D_REG_ALARM1)
1733 | (w83781d_read_value(data,
1734 W83782D_REG_ALARM2) << 8)
1735 | (w83781d_read_value(data,
1736 W83782D_REG_ALARM3) << 16);
1737 } else if (data->type == w83783s) {
1738 data->alarms = w83781d_read_value(data,
1739 W83782D_REG_ALARM1)
1740 | (w83781d_read_value(data,
1741 W83782D_REG_ALARM2) << 8);
1742 } else {
1743 /* No real-time status registers, fall back to
1744 interrupt status registers */
1745 data->alarms = w83781d_read_value(data,
1746 W83781D_REG_ALARM1)
1747 | (w83781d_read_value(data,
1748 W83781D_REG_ALARM2) << 8);
1749 }
1750 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1751 data->beep_mask = (i << 8) +
1752 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1753 if ((data->type != w83781d) && (data->type != as99127f)) {
1754 data->beep_mask |=
1755 w83781d_read_value(data,
1756 W83781D_REG_BEEP_INTS3) << 16;
1757 }
1758 data->last_updated = jiffies;
1759 data->valid = 1;
1760 }
1761
1762 mutex_unlock(&data->update_lock);
1763
1764 return data;
1765}
1766
1767/* return 1 if a supported chip is found, 0 otherwise */
1768static int __init
1769w83781d_isa_found(unsigned short address)
1770{
1771 int val, save, found = 0;
1772
1773 /* We have to request the region in two parts because some
1774 boards declare base+4 to base+7 as a PNP device */
1775 if (!request_region(address, 4, "w83781d")) {
1776 pr_debug("w83781d: Failed to request low part of region\n");
1777 return 0;
1778 }
1779 if (!request_region(address + 4, 4, "w83781d")) {
1780 pr_debug("w83781d: Failed to request high part of region\n");
1781 release_region(address, 4);
1782 return 0;
1783 }
1784
1785#define REALLY_SLOW_IO
1786 /* We need the timeouts for at least some W83781D-like
1787 chips. But only if we read 'undefined' registers. */
1788 val = inb_p(address + 1);
1789 if (inb_p(address + 2) != val
1790 || inb_p(address + 3) != val
1791 || inb_p(address + 7) != val) {
1792 pr_debug("w83781d: Detection failed at step 1\n");
1793 goto release;
1794 }
1795#undef REALLY_SLOW_IO
1796
1797 /* We should be able to change the 7 LSB of the address port. The
1798 MSB (busy flag) should be clear initially, set after the write. */
1799 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1800 if (save & 0x80) {
1801 pr_debug("w83781d: Detection failed at step 2\n");
1802 goto release;
1803 }
1804 val = ~save & 0x7f;
1805 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1806 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1807 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1808 pr_debug("w83781d: Detection failed at step 3\n");
1809 goto release;
1810 }
1811
1812 /* We found a device, now see if it could be a W83781D */
1813 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1814 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1815 if (val & 0x80) {
1816 pr_debug("w83781d: Detection failed at step 4\n");
1817 goto release;
1818 }
1819 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1820 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1821 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1822 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1823 if ((!(save & 0x80) && (val != 0xa3))
1824 || ((save & 0x80) && (val != 0x5c))) {
1825 pr_debug("w83781d: Detection failed at step 5\n");
1826 goto release;
1827 }
1828 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1829 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1830 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1831 pr_debug("w83781d: Detection failed at step 6\n");
1832 goto release;
1833 }
1834
1835 /* The busy flag should be clear again */
1836 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1837 pr_debug("w83781d: Detection failed at step 7\n");
1838 goto release;
1839 }
1840
1841 /* Determine the chip type */
1842 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1843 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1844 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1845 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1846 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1847 if ((val & 0xfe) == 0x10 /* W83781D */
1848 || val == 0x30) /* W83782D */
1849 found = 1;
1850
1851 if (found)
1852 pr_info("w83781d: Found a %s chip at %#x\n",
1853 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1854
1855 release:
1856 release_region(address + 4, 4);
1857 release_region(address, 4);
1858 return found;
1859}
1860
1861static int __init
1862w83781d_isa_device_add(unsigned short address)
1863{
1864 struct resource res = {
1865 .start = address,
1866 .end = address + W83781D_EXTENT - 1,
1867 .name = "w83781d",
1868 .flags = IORESOURCE_IO,
1869 };
1870 int err;
1871
1872 pdev = platform_device_alloc("w83781d", address);
1873 if (!pdev) {
1874 err = -ENOMEM;
1875 printk(KERN_ERR "w83781d: Device allocation failed\n");
1876 goto exit;
1877 }
1878
1879 err = platform_device_add_resources(pdev, &res, 1);
1880 if (err) {
1881 printk(KERN_ERR "w83781d: Device resource addition failed "
1882 "(%d)\n", err);
1883 goto exit_device_put;
1884 }
1885
1886 err = platform_device_add(pdev);
1887 if (err) {
1888 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1889 err);
1890 goto exit_device_put;
1891 }
1892
1893 return 0;
1894
1895 exit_device_put:
1896 platform_device_put(pdev);
1897 exit:
1898 pdev = NULL;
1899 return err;
1900}
1901
1902static int __init
1903sensors_w83781d_init(void)
1904{
1905 int res;
1906
1907 res = i2c_add_driver(&w83781d_driver);
1908 if (res)
1909 goto exit;
1910
1911 if (w83781d_isa_found(isa_address)) {
1912 res = platform_driver_register(&w83781d_isa_driver);
1913 if (res)
1914 goto exit_unreg_i2c_driver;
1915
1916 /* Sets global pdev as a side effect */
1917 res = w83781d_isa_device_add(isa_address);
1918 if (res)
1919 goto exit_unreg_isa_driver;
1920 }
1921
1922 return 0;
1923
1924 exit_unreg_isa_driver:
1925 platform_driver_unregister(&w83781d_isa_driver);
1926 exit_unreg_i2c_driver:
1927 i2c_del_driver(&w83781d_driver);
1928 exit:
1929 return res;
1930}
1931
1932static void __exit
1933sensors_w83781d_exit(void)
1934{
1935 if (pdev) {
1936 platform_device_unregister(pdev);
1937 platform_driver_unregister(&w83781d_isa_driver);
1938 }
1939 i2c_del_driver(&w83781d_driver);
1940}
1941
1942MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1943 "Philip Edelbrock <phil@netroedge.com>, "
1944 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1945MODULE_DESCRIPTION("W83781D driver");
1946MODULE_LICENSE("GPL");
1947
1948module_init(sensors_w83781d_init);
1949module_exit(sensors_w83781d_exit);
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