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1 | /* | |
2 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> | |
3 | * Copyright (C) 1995-1998 Mark Lord | |
4 | * Copyright (C) 2007-2009 Bartlomiej Zolnierkiewicz | |
5 | * | |
6 | * May be copied or modified under the terms of the GNU General Public License | |
7 | */ | |
8 | ||
9 | #include <linux/types.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/export.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/ide.h> | |
16 | #include <linux/dma-mapping.h> | |
17 | ||
18 | #include <asm/io.h> | |
19 | ||
20 | /** | |
21 | * ide_setup_pci_baseregs - place a PCI IDE controller native | |
22 | * @dev: PCI device of interface to switch native | |
23 | * @name: Name of interface | |
24 | * | |
25 | * We attempt to place the PCI interface into PCI native mode. If | |
26 | * we succeed the BARs are ok and the controller is in PCI mode. | |
27 | * Returns 0 on success or an errno code. | |
28 | * | |
29 | * FIXME: if we program the interface and then fail to set the BARS | |
30 | * we don't switch it back to legacy mode. Do we actually care ?? | |
31 | */ | |
32 | ||
33 | static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name) | |
34 | { | |
35 | u8 progif = 0; | |
36 | ||
37 | /* | |
38 | * Place both IDE interfaces into PCI "native" mode: | |
39 | */ | |
40 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
41 | (progif & 5) != 5) { | |
42 | if ((progif & 0xa) != 0xa) { | |
43 | printk(KERN_INFO "%s %s: device not capable of full " | |
44 | "native PCI mode\n", name, pci_name(dev)); | |
45 | return -EOPNOTSUPP; | |
46 | } | |
47 | printk(KERN_INFO "%s %s: placing both ports into native PCI " | |
48 | "mode\n", name, pci_name(dev)); | |
49 | (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); | |
50 | if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || | |
51 | (progif & 5) != 5) { | |
52 | printk(KERN_ERR "%s %s: rewrite of PROGIF failed, " | |
53 | "wanted 0x%04x, got 0x%04x\n", | |
54 | name, pci_name(dev), progif | 5, progif); | |
55 | return -EOPNOTSUPP; | |
56 | } | |
57 | } | |
58 | return 0; | |
59 | } | |
60 | ||
61 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
62 | static int ide_pci_clear_simplex(unsigned long dma_base, const char *name) | |
63 | { | |
64 | u8 dma_stat = inb(dma_base + 2); | |
65 | ||
66 | outb(dma_stat & 0x60, dma_base + 2); | |
67 | dma_stat = inb(dma_base + 2); | |
68 | ||
69 | return (dma_stat & 0x80) ? 1 : 0; | |
70 | } | |
71 | ||
72 | /** | |
73 | * ide_pci_dma_base - setup BMIBA | |
74 | * @hwif: IDE interface | |
75 | * @d: IDE port info | |
76 | * | |
77 | * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. | |
78 | */ | |
79 | ||
80 | unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d) | |
81 | { | |
82 | struct pci_dev *dev = to_pci_dev(hwif->dev); | |
83 | unsigned long dma_base = 0; | |
84 | ||
85 | if (hwif->host_flags & IDE_HFLAG_MMIO) | |
86 | return hwif->dma_base; | |
87 | ||
88 | if (hwif->mate && hwif->mate->dma_base) { | |
89 | dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); | |
90 | } else { | |
91 | u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; | |
92 | ||
93 | dma_base = pci_resource_start(dev, baridx); | |
94 | ||
95 | if (dma_base == 0) { | |
96 | printk(KERN_ERR "%s %s: DMA base is invalid\n", | |
97 | d->name, pci_name(dev)); | |
98 | return 0; | |
99 | } | |
100 | } | |
101 | ||
102 | if (hwif->channel) | |
103 | dma_base += 8; | |
104 | ||
105 | return dma_base; | |
106 | } | |
107 | EXPORT_SYMBOL_GPL(ide_pci_dma_base); | |
108 | ||
109 | int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d) | |
110 | { | |
111 | struct pci_dev *dev = to_pci_dev(hwif->dev); | |
112 | u8 dma_stat; | |
113 | ||
114 | if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520)) | |
115 | goto out; | |
116 | ||
117 | if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { | |
118 | if (ide_pci_clear_simplex(hwif->dma_base, d->name)) | |
119 | printk(KERN_INFO "%s %s: simplex device: DMA forced\n", | |
120 | d->name, pci_name(dev)); | |
121 | goto out; | |
122 | } | |
123 | ||
124 | /* | |
125 | * If the device claims "simplex" DMA, this means that only one of | |
126 | * the two interfaces can be trusted with DMA at any point in time | |
127 | * (so we should enable DMA only on one of the two interfaces). | |
128 | * | |
129 | * FIXME: At this point we haven't probed the drives so we can't make | |
130 | * the appropriate decision. Really we should defer this problem until | |
131 | * we tune the drive then try to grab DMA ownership if we want to be | |
132 | * the DMA end. This has to be become dynamic to handle hot-plug. | |
133 | */ | |
134 | dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); | |
135 | if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { | |
136 | printk(KERN_INFO "%s %s: simplex device: DMA disabled\n", | |
137 | d->name, pci_name(dev)); | |
138 | return -1; | |
139 | } | |
140 | out: | |
141 | return 0; | |
142 | } | |
143 | EXPORT_SYMBOL_GPL(ide_pci_check_simplex); | |
144 | ||
145 | /* | |
146 | * Set up BM-DMA capability (PnP BIOS should have done this) | |
147 | */ | |
148 | int ide_pci_set_master(struct pci_dev *dev, const char *name) | |
149 | { | |
150 | u16 pcicmd; | |
151 | ||
152 | pci_read_config_word(dev, PCI_COMMAND, &pcicmd); | |
153 | ||
154 | if ((pcicmd & PCI_COMMAND_MASTER) == 0) { | |
155 | pci_set_master(dev); | |
156 | ||
157 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || | |
158 | (pcicmd & PCI_COMMAND_MASTER) == 0) { | |
159 | printk(KERN_ERR "%s %s: error updating PCICMD\n", | |
160 | name, pci_name(dev)); | |
161 | return -EIO; | |
162 | } | |
163 | } | |
164 | ||
165 | return 0; | |
166 | } | |
167 | EXPORT_SYMBOL_GPL(ide_pci_set_master); | |
168 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ | |
169 | ||
170 | void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) | |
171 | { | |
172 | printk(KERN_INFO "%s %s: IDE controller (0x%04x:0x%04x rev 0x%02x)\n", | |
173 | d->name, pci_name(dev), | |
174 | dev->vendor, dev->device, dev->revision); | |
175 | } | |
176 | EXPORT_SYMBOL_GPL(ide_setup_pci_noise); | |
177 | ||
178 | ||
179 | /** | |
180 | * ide_pci_enable - do PCI enables | |
181 | * @dev: PCI device | |
182 | * @d: IDE port info | |
183 | * | |
184 | * Enable the IDE PCI device. We attempt to enable the device in full | |
185 | * but if that fails then we only need IO space. The PCI code should | |
186 | * have setup the proper resources for us already for controllers in | |
187 | * legacy mode. | |
188 | * | |
189 | * Returns zero on success or an error code | |
190 | */ | |
191 | ||
192 | static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) | |
193 | { | |
194 | int ret, bars; | |
195 | ||
196 | if (pci_enable_device(dev)) { | |
197 | ret = pci_enable_device_io(dev); | |
198 | if (ret < 0) { | |
199 | printk(KERN_WARNING "%s %s: couldn't enable device\n", | |
200 | d->name, pci_name(dev)); | |
201 | goto out; | |
202 | } | |
203 | printk(KERN_WARNING "%s %s: BIOS configuration fixed\n", | |
204 | d->name, pci_name(dev)); | |
205 | } | |
206 | ||
207 | /* | |
208 | * assume all devices can do 32-bit DMA for now, we can add | |
209 | * a DMA mask field to the struct ide_port_info if we need it | |
210 | * (or let lower level driver set the DMA mask) | |
211 | */ | |
212 | ret = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); | |
213 | if (ret < 0) { | |
214 | printk(KERN_ERR "%s %s: can't set DMA mask\n", | |
215 | d->name, pci_name(dev)); | |
216 | goto out; | |
217 | } | |
218 | ||
219 | if (d->host_flags & IDE_HFLAG_SINGLE) | |
220 | bars = (1 << 2) - 1; | |
221 | else | |
222 | bars = (1 << 4) - 1; | |
223 | ||
224 | if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) { | |
225 | if (d->host_flags & IDE_HFLAG_CS5520) | |
226 | bars |= (1 << 2); | |
227 | else | |
228 | bars |= (1 << 4); | |
229 | } | |
230 | ||
231 | ret = pci_request_selected_regions(dev, bars, d->name); | |
232 | if (ret < 0) | |
233 | printk(KERN_ERR "%s %s: can't reserve resources\n", | |
234 | d->name, pci_name(dev)); | |
235 | out: | |
236 | return ret; | |
237 | } | |
238 | ||
239 | /** | |
240 | * ide_pci_configure - configure an unconfigured device | |
241 | * @dev: PCI device | |
242 | * @d: IDE port info | |
243 | * | |
244 | * Enable and configure the PCI device we have been passed. | |
245 | * Returns zero on success or an error code. | |
246 | */ | |
247 | ||
248 | static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) | |
249 | { | |
250 | u16 pcicmd = 0; | |
251 | /* | |
252 | * PnP BIOS was *supposed* to have setup this device, but we | |
253 | * can do it ourselves, so long as the BIOS has assigned an IRQ | |
254 | * (or possibly the device is using a "legacy header" for IRQs). | |
255 | * Maybe the user deliberately *disabled* the device, | |
256 | * but we'll eventually ignore it again if no drives respond. | |
257 | */ | |
258 | if (ide_setup_pci_baseregs(dev, d->name) || | |
259 | pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) { | |
260 | printk(KERN_INFO "%s %s: device disabled (BIOS)\n", | |
261 | d->name, pci_name(dev)); | |
262 | return -ENODEV; | |
263 | } | |
264 | if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { | |
265 | printk(KERN_ERR "%s %s: error accessing PCI regs\n", | |
266 | d->name, pci_name(dev)); | |
267 | return -EIO; | |
268 | } | |
269 | if (!(pcicmd & PCI_COMMAND_IO)) { | |
270 | printk(KERN_ERR "%s %s: unable to enable IDE controller\n", | |
271 | d->name, pci_name(dev)); | |
272 | return -ENXIO; | |
273 | } | |
274 | return 0; | |
275 | } | |
276 | ||
277 | /** | |
278 | * ide_pci_check_iomem - check a register is I/O | |
279 | * @dev: PCI device | |
280 | * @d: IDE port info | |
281 | * @bar: BAR number | |
282 | * | |
283 | * Checks if a BAR is configured and points to MMIO space. If so, | |
284 | * return an error code. Otherwise return 0 | |
285 | */ | |
286 | ||
287 | static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, | |
288 | int bar) | |
289 | { | |
290 | ulong flags = pci_resource_flags(dev, bar); | |
291 | ||
292 | /* Unconfigured ? */ | |
293 | if (!flags || pci_resource_len(dev, bar) == 0) | |
294 | return 0; | |
295 | ||
296 | /* I/O space */ | |
297 | if (flags & IORESOURCE_IO) | |
298 | return 0; | |
299 | ||
300 | /* Bad */ | |
301 | return -EINVAL; | |
302 | } | |
303 | ||
304 | /** | |
305 | * ide_hw_configure - configure a struct ide_hw instance | |
306 | * @dev: PCI device holding interface | |
307 | * @d: IDE port info | |
308 | * @port: port number | |
309 | * @hw: struct ide_hw instance corresponding to this port | |
310 | * | |
311 | * Perform the initial set up for the hardware interface structure. This | |
312 | * is done per interface port rather than per PCI device. There may be | |
313 | * more than one port per device. | |
314 | * | |
315 | * Returns zero on success or an error code. | |
316 | */ | |
317 | ||
318 | static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d, | |
319 | unsigned int port, struct ide_hw *hw) | |
320 | { | |
321 | unsigned long ctl = 0, base = 0; | |
322 | ||
323 | if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { | |
324 | if (ide_pci_check_iomem(dev, d, 2 * port) || | |
325 | ide_pci_check_iomem(dev, d, 2 * port + 1)) { | |
326 | printk(KERN_ERR "%s %s: I/O baseregs (BIOS) are " | |
327 | "reported as MEM for port %d!\n", | |
328 | d->name, pci_name(dev), port); | |
329 | return -EINVAL; | |
330 | } | |
331 | ||
332 | ctl = pci_resource_start(dev, 2*port+1); | |
333 | base = pci_resource_start(dev, 2*port); | |
334 | } else { | |
335 | /* Use default values */ | |
336 | ctl = port ? 0x374 : 0x3f4; | |
337 | base = port ? 0x170 : 0x1f0; | |
338 | } | |
339 | ||
340 | if (!base || !ctl) { | |
341 | printk(KERN_ERR "%s %s: bad PCI BARs for port %d, skipping\n", | |
342 | d->name, pci_name(dev), port); | |
343 | return -EINVAL; | |
344 | } | |
345 | ||
346 | memset(hw, 0, sizeof(*hw)); | |
347 | hw->dev = &dev->dev; | |
348 | ide_std_init_ports(hw, base, ctl | 2); | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
353 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI | |
354 | /** | |
355 | * ide_hwif_setup_dma - configure DMA interface | |
356 | * @hwif: IDE interface | |
357 | * @d: IDE port info | |
358 | * | |
359 | * Set up the DMA base for the interface. Enable the master bits as | |
360 | * necessary and attempt to bring the device DMA into a ready to use | |
361 | * state | |
362 | */ | |
363 | ||
364 | int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) | |
365 | { | |
366 | struct pci_dev *dev = to_pci_dev(hwif->dev); | |
367 | ||
368 | if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || | |
369 | ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && | |
370 | (dev->class & 0x80))) { | |
371 | unsigned long base = ide_pci_dma_base(hwif, d); | |
372 | ||
373 | if (base == 0) | |
374 | return -1; | |
375 | ||
376 | hwif->dma_base = base; | |
377 | ||
378 | if (hwif->dma_ops == NULL) | |
379 | hwif->dma_ops = &sff_dma_ops; | |
380 | ||
381 | if (ide_pci_check_simplex(hwif, d) < 0) | |
382 | return -1; | |
383 | ||
384 | if (ide_pci_set_master(dev, d->name) < 0) | |
385 | return -1; | |
386 | ||
387 | if (hwif->host_flags & IDE_HFLAG_MMIO) | |
388 | printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); | |
389 | else | |
390 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
391 | hwif->name, base, base + 7); | |
392 | ||
393 | hwif->extra_base = base + (hwif->channel ? 8 : 16); | |
394 | ||
395 | if (ide_allocate_dma_engine(hwif)) | |
396 | return -1; | |
397 | } | |
398 | ||
399 | return 0; | |
400 | } | |
401 | #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ | |
402 | ||
403 | /** | |
404 | * ide_setup_pci_controller - set up IDE PCI | |
405 | * @dev: PCI device | |
406 | * @d: IDE port info | |
407 | * @noisy: verbose flag | |
408 | * | |
409 | * Set up the PCI and controller side of the IDE interface. This brings | |
410 | * up the PCI side of the device, checks that the device is enabled | |
411 | * and enables it if need be | |
412 | */ | |
413 | ||
414 | static int ide_setup_pci_controller(struct pci_dev *dev, | |
415 | const struct ide_port_info *d, int noisy) | |
416 | { | |
417 | int ret; | |
418 | u16 pcicmd; | |
419 | ||
420 | if (noisy) | |
421 | ide_setup_pci_noise(dev, d); | |
422 | ||
423 | ret = ide_pci_enable(dev, d); | |
424 | if (ret < 0) | |
425 | goto out; | |
426 | ||
427 | ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); | |
428 | if (ret < 0) { | |
429 | printk(KERN_ERR "%s %s: error accessing PCI regs\n", | |
430 | d->name, pci_name(dev)); | |
431 | goto out; | |
432 | } | |
433 | if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ | |
434 | ret = ide_pci_configure(dev, d); | |
435 | if (ret < 0) | |
436 | goto out; | |
437 | printk(KERN_INFO "%s %s: device enabled (Linux)\n", | |
438 | d->name, pci_name(dev)); | |
439 | } | |
440 | ||
441 | out: | |
442 | return ret; | |
443 | } | |
444 | ||
445 | /** | |
446 | * ide_pci_setup_ports - configure ports/devices on PCI IDE | |
447 | * @dev: PCI device | |
448 | * @d: IDE port info | |
449 | * @hw: struct ide_hw instances corresponding to this PCI IDE device | |
450 | * @hws: struct ide_hw pointers table to update | |
451 | * | |
452 | * Scan the interfaces attached to this device and do any | |
453 | * necessary per port setup. Attach the devices and ask the | |
454 | * generic DMA layer to do its work for us. | |
455 | * | |
456 | * Normally called automaticall from do_ide_pci_setup_device, | |
457 | * but is also used directly as a helper function by some controllers | |
458 | * where the chipset setup is not the default PCI IDE one. | |
459 | */ | |
460 | ||
461 | void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, | |
462 | struct ide_hw *hw, struct ide_hw **hws) | |
463 | { | |
464 | int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; | |
465 | u8 tmp; | |
466 | ||
467 | /* | |
468 | * Set up the IDE ports | |
469 | */ | |
470 | ||
471 | for (port = 0; port < channels; ++port) { | |
472 | const struct ide_pci_enablebit *e = &d->enablebits[port]; | |
473 | ||
474 | if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || | |
475 | (tmp & e->mask) != e->val)) { | |
476 | printk(KERN_INFO "%s %s: IDE port disabled\n", | |
477 | d->name, pci_name(dev)); | |
478 | continue; /* port not enabled */ | |
479 | } | |
480 | ||
481 | if (ide_hw_configure(dev, d, port, hw + port)) | |
482 | continue; | |
483 | ||
484 | *(hws + port) = hw + port; | |
485 | } | |
486 | } | |
487 | EXPORT_SYMBOL_GPL(ide_pci_setup_ports); | |
488 | ||
489 | /* | |
490 | * ide_setup_pci_device() looks at the primary/secondary interfaces | |
491 | * on a PCI IDE device and, if they are enabled, prepares the IDE driver | |
492 | * for use with them. This generic code works for most PCI chipsets. | |
493 | * | |
494 | * One thing that is not standardized is the location of the | |
495 | * primary/secondary interface "enable/disable" bits. For chipsets that | |
496 | * we "know" about, this information is in the struct ide_port_info; | |
497 | * for all other chipsets, we just assume both interfaces are enabled. | |
498 | */ | |
499 | static int do_ide_setup_pci_device(struct pci_dev *dev, | |
500 | const struct ide_port_info *d, | |
501 | u8 noisy) | |
502 | { | |
503 | int pciirq, ret; | |
504 | ||
505 | /* | |
506 | * Can we trust the reported IRQ? | |
507 | */ | |
508 | pciirq = dev->irq; | |
509 | ||
510 | /* | |
511 | * This allows offboard ide-pci cards the enable a BIOS, | |
512 | * verify interrupt settings of split-mirror pci-config | |
513 | * space, place chipset into init-mode, and/or preserve | |
514 | * an interrupt if the card is not native ide support. | |
515 | */ | |
516 | ret = d->init_chipset ? d->init_chipset(dev) : 0; | |
517 | if (ret < 0) | |
518 | goto out; | |
519 | ||
520 | if (ide_pci_is_in_compatibility_mode(dev)) { | |
521 | if (noisy) | |
522 | printk(KERN_INFO "%s %s: not 100%% native mode: will " | |
523 | "probe irqs later\n", d->name, pci_name(dev)); | |
524 | pciirq = 0; | |
525 | } else if (!pciirq && noisy) { | |
526 | printk(KERN_WARNING "%s %s: bad irq (%d): will probe later\n", | |
527 | d->name, pci_name(dev), pciirq); | |
528 | } else if (noisy) { | |
529 | printk(KERN_INFO "%s %s: 100%% native mode on irq %d\n", | |
530 | d->name, pci_name(dev), pciirq); | |
531 | } | |
532 | ||
533 | ret = pciirq; | |
534 | out: | |
535 | return ret; | |
536 | } | |
537 | ||
538 | int ide_pci_init_two(struct pci_dev *dev1, struct pci_dev *dev2, | |
539 | const struct ide_port_info *d, void *priv) | |
540 | { | |
541 | struct pci_dev *pdev[] = { dev1, dev2 }; | |
542 | struct ide_host *host; | |
543 | int ret, i, n_ports = dev2 ? 4 : 2; | |
544 | struct ide_hw hw[4], *hws[] = { NULL, NULL, NULL, NULL }; | |
545 | ||
546 | for (i = 0; i < n_ports / 2; i++) { | |
547 | ret = ide_setup_pci_controller(pdev[i], d, !i); | |
548 | if (ret < 0) | |
549 | goto out; | |
550 | ||
551 | ide_pci_setup_ports(pdev[i], d, &hw[i*2], &hws[i*2]); | |
552 | } | |
553 | ||
554 | host = ide_host_alloc(d, hws, n_ports); | |
555 | if (host == NULL) { | |
556 | ret = -ENOMEM; | |
557 | goto out; | |
558 | } | |
559 | ||
560 | host->dev[0] = &dev1->dev; | |
561 | if (dev2) | |
562 | host->dev[1] = &dev2->dev; | |
563 | ||
564 | host->host_priv = priv; | |
565 | host->irq_flags = IRQF_SHARED; | |
566 | ||
567 | pci_set_drvdata(pdev[0], host); | |
568 | if (dev2) | |
569 | pci_set_drvdata(pdev[1], host); | |
570 | ||
571 | for (i = 0; i < n_ports / 2; i++) { | |
572 | ret = do_ide_setup_pci_device(pdev[i], d, !i); | |
573 | ||
574 | /* | |
575 | * FIXME: Mom, mom, they stole me the helper function to undo | |
576 | * do_ide_setup_pci_device() on the first device! | |
577 | */ | |
578 | if (ret < 0) | |
579 | goto out; | |
580 | ||
581 | /* fixup IRQ */ | |
582 | if (ide_pci_is_in_compatibility_mode(pdev[i])) { | |
583 | hw[i*2].irq = pci_get_legacy_ide_irq(pdev[i], 0); | |
584 | hw[i*2 + 1].irq = pci_get_legacy_ide_irq(pdev[i], 1); | |
585 | } else | |
586 | hw[i*2 + 1].irq = hw[i*2].irq = ret; | |
587 | } | |
588 | ||
589 | ret = ide_host_register(host, d, hws); | |
590 | if (ret) | |
591 | ide_host_free(host); | |
592 | out: | |
593 | return ret; | |
594 | } | |
595 | EXPORT_SYMBOL_GPL(ide_pci_init_two); | |
596 | ||
597 | int ide_pci_init_one(struct pci_dev *dev, const struct ide_port_info *d, | |
598 | void *priv) | |
599 | { | |
600 | return ide_pci_init_two(dev, NULL, d, priv); | |
601 | } | |
602 | EXPORT_SYMBOL_GPL(ide_pci_init_one); | |
603 | ||
604 | void ide_pci_remove(struct pci_dev *dev) | |
605 | { | |
606 | struct ide_host *host = pci_get_drvdata(dev); | |
607 | struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL; | |
608 | int bars; | |
609 | ||
610 | if (host->host_flags & IDE_HFLAG_SINGLE) | |
611 | bars = (1 << 2) - 1; | |
612 | else | |
613 | bars = (1 << 4) - 1; | |
614 | ||
615 | if ((host->host_flags & IDE_HFLAG_NO_DMA) == 0) { | |
616 | if (host->host_flags & IDE_HFLAG_CS5520) | |
617 | bars |= (1 << 2); | |
618 | else | |
619 | bars |= (1 << 4); | |
620 | } | |
621 | ||
622 | ide_host_remove(host); | |
623 | ||
624 | if (dev2) | |
625 | pci_release_selected_regions(dev2, bars); | |
626 | pci_release_selected_regions(dev, bars); | |
627 | ||
628 | if (dev2) | |
629 | pci_disable_device(dev2); | |
630 | pci_disable_device(dev); | |
631 | } | |
632 | EXPORT_SYMBOL_GPL(ide_pci_remove); | |
633 | ||
634 | #ifdef CONFIG_PM | |
635 | int ide_pci_suspend(struct pci_dev *dev, pm_message_t state) | |
636 | { | |
637 | pci_save_state(dev); | |
638 | pci_disable_device(dev); | |
639 | pci_set_power_state(dev, pci_choose_state(dev, state)); | |
640 | ||
641 | return 0; | |
642 | } | |
643 | EXPORT_SYMBOL_GPL(ide_pci_suspend); | |
644 | ||
645 | int ide_pci_resume(struct pci_dev *dev) | |
646 | { | |
647 | struct ide_host *host = pci_get_drvdata(dev); | |
648 | int rc; | |
649 | ||
650 | pci_set_power_state(dev, PCI_D0); | |
651 | ||
652 | rc = pci_enable_device(dev); | |
653 | if (rc) | |
654 | return rc; | |
655 | ||
656 | pci_restore_state(dev); | |
657 | pci_set_master(dev); | |
658 | ||
659 | if (host->init_chipset) | |
660 | host->init_chipset(dev); | |
661 | ||
662 | return 0; | |
663 | } | |
664 | EXPORT_SYMBOL_GPL(ide_pci_resume); | |
665 | #endif |