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UBUNTU: Ubuntu-5.11.0-22.23
[mirror_ubuntu-hirsute-kernel.git] / drivers / infiniband / hw / mlx5 / devx.c
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1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2/*
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
4 */
5
6#include <rdma/ib_user_verbs.h>
7#include <rdma/ib_verbs.h>
8#include <rdma/uverbs_types.h>
9#include <rdma/uverbs_ioctl.h>
10#include <rdma/mlx5_user_ioctl_cmds.h>
11#include <rdma/mlx5_user_ioctl_verbs.h>
12#include <rdma/ib_umem.h>
13#include <rdma/uverbs_std_types.h>
14#include <linux/mlx5/driver.h>
15#include <linux/mlx5/fs.h>
16#include "mlx5_ib.h"
17#include "devx.h"
18#include "qp.h"
19#include <linux/xarray.h>
20
21#define UVERBS_MODULE_NAME mlx5_ib
22#include <rdma/uverbs_named_ioctl.h>
23
24static void dispatch_event_fd(struct list_head *fd_list, const void *data);
25
26enum devx_obj_flags {
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
30};
31
32struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
37 u16 cmd_out_len;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
40};
41
42struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
45};
46
47/* first level XA value data structure */
48struct devx_event {
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
51};
52
53/* second level XA value data structure */
54struct devx_obj_event {
55 struct rcu_head rcu;
56 struct list_head obj_sub_list;
57};
58
59struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
62 */
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
65 */
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
69 */
70
71 u8 is_cleaned:1;
72 u32 xa_key_level1;
73 u32 xa_key_level2;
74 struct rcu_head rcu;
75 u64 cookie;
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
78};
79
80struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
84 spinlock_t lock;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
88 u8 omit_data:1;
89 u8 is_overflow_err:1;
90 u8 is_destroyed:1;
91};
92
93struct devx_umem {
94 struct mlx5_core_dev *mdev;
95 struct ib_umem *umem;
96 u32 dinlen;
97 u32 dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
98};
99
100struct devx_umem_reg_cmd {
101 void *in;
102 u32 inlen;
103 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
104};
105
106static struct mlx5_ib_ucontext *
107devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
108{
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
110}
111
112int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
113{
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {0};
115 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
116 void *uctx;
117 int err;
118 u16 uid;
119 u32 cap = 0;
120
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
123 return -EINVAL;
124
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
133
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
136
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
138 if (err)
139 return err;
140
141 uid = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
142 return uid;
143}
144
145void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
146{
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {0};
148 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
149
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
152
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
154}
155
156static bool is_legacy_unaffiliated_event_num(u16 event_num)
157{
158 switch (event_num) {
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
160 return true;
161 default:
162 return false;
163 }
164}
165
166static bool is_legacy_obj_event_num(u16 event_num)
167{
168 switch (event_num) {
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
184 return true;
185 default:
186 return false;
187 }
188}
189
190static u16 get_legacy_obj_type(u16 opcode)
191{
192 switch (opcode) {
193 case MLX5_CMD_OP_CREATE_RQ:
194 return MLX5_EVENT_QUEUE_TYPE_RQ;
195 case MLX5_CMD_OP_CREATE_QP:
196 return MLX5_EVENT_QUEUE_TYPE_QP;
197 case MLX5_CMD_OP_CREATE_SQ:
198 return MLX5_EVENT_QUEUE_TYPE_SQ;
199 case MLX5_CMD_OP_CREATE_DCT:
200 return MLX5_EVENT_QUEUE_TYPE_DCT;
201 default:
202 return 0;
203 }
204}
205
206static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
207{
208 u16 opcode;
209
210 opcode = (obj->obj_id >> 32) & 0xffff;
211
212 if (is_legacy_obj_event_num(event_num))
213 return get_legacy_obj_type(opcode);
214
215 switch (opcode) {
216 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
217 return (obj->obj_id >> 48);
218 case MLX5_CMD_OP_CREATE_RQ:
219 return MLX5_OBJ_TYPE_RQ;
220 case MLX5_CMD_OP_CREATE_QP:
221 return MLX5_OBJ_TYPE_QP;
222 case MLX5_CMD_OP_CREATE_SQ:
223 return MLX5_OBJ_TYPE_SQ;
224 case MLX5_CMD_OP_CREATE_DCT:
225 return MLX5_OBJ_TYPE_DCT;
226 case MLX5_CMD_OP_CREATE_TIR:
227 return MLX5_OBJ_TYPE_TIR;
228 case MLX5_CMD_OP_CREATE_TIS:
229 return MLX5_OBJ_TYPE_TIS;
230 case MLX5_CMD_OP_CREATE_PSV:
231 return MLX5_OBJ_TYPE_PSV;
232 case MLX5_OBJ_TYPE_MKEY:
233 return MLX5_OBJ_TYPE_MKEY;
234 case MLX5_CMD_OP_CREATE_RMP:
235 return MLX5_OBJ_TYPE_RMP;
236 case MLX5_CMD_OP_CREATE_XRC_SRQ:
237 return MLX5_OBJ_TYPE_XRC_SRQ;
238 case MLX5_CMD_OP_CREATE_XRQ:
239 return MLX5_OBJ_TYPE_XRQ;
240 case MLX5_CMD_OP_CREATE_RQT:
241 return MLX5_OBJ_TYPE_RQT;
242 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
243 return MLX5_OBJ_TYPE_FLOW_COUNTER;
244 case MLX5_CMD_OP_CREATE_CQ:
245 return MLX5_OBJ_TYPE_CQ;
246 default:
247 return 0;
248 }
249}
250
251static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
252{
253 switch (event_type) {
254 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
255 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
257 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
258 case MLX5_EVENT_TYPE_PATH_MIG:
259 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
263 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
264 return eqe->data.qp_srq.type;
265 case MLX5_EVENT_TYPE_CQ_ERROR:
266 case MLX5_EVENT_TYPE_XRQ_ERROR:
267 return 0;
268 case MLX5_EVENT_TYPE_DCT_DRAINED:
269 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
270 return MLX5_EVENT_QUEUE_TYPE_DCT;
271 default:
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
273 }
274}
275
276static u32 get_dec_obj_id(u64 obj_id)
277{
278 return (obj_id & 0xffffffff);
279}
280
281/*
282 * As the obj_id in the firmware is not globally unique the object type
283 * must be considered upon checking for a valid object id.
284 * For that the opcode of the creator command is encoded as part of the obj_id.
285 */
286static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
287{
288 return ((u64)opcode << 32) | obj_id;
289}
290
291static u64 devx_get_obj_id(const void *in)
292{
293 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
294 u64 obj_id;
295
296 switch (opcode) {
297 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
298 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
299 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
300 MLX5_GET(general_obj_in_cmd_hdr, in,
301 obj_type) << 16,
302 MLX5_GET(general_obj_in_cmd_hdr, in,
303 obj_id));
304 break;
305 case MLX5_CMD_OP_QUERY_MKEY:
306 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
307 MLX5_GET(query_mkey_in, in,
308 mkey_index));
309 break;
310 case MLX5_CMD_OP_QUERY_CQ:
311 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
312 MLX5_GET(query_cq_in, in, cqn));
313 break;
314 case MLX5_CMD_OP_MODIFY_CQ:
315 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
316 MLX5_GET(modify_cq_in, in, cqn));
317 break;
318 case MLX5_CMD_OP_QUERY_SQ:
319 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
320 MLX5_GET(query_sq_in, in, sqn));
321 break;
322 case MLX5_CMD_OP_MODIFY_SQ:
323 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
324 MLX5_GET(modify_sq_in, in, sqn));
325 break;
326 case MLX5_CMD_OP_QUERY_RQ:
327 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
328 MLX5_GET(query_rq_in, in, rqn));
329 break;
330 case MLX5_CMD_OP_MODIFY_RQ:
331 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
332 MLX5_GET(modify_rq_in, in, rqn));
333 break;
334 case MLX5_CMD_OP_QUERY_RMP:
335 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
336 MLX5_GET(query_rmp_in, in, rmpn));
337 break;
338 case MLX5_CMD_OP_MODIFY_RMP:
339 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
340 MLX5_GET(modify_rmp_in, in, rmpn));
341 break;
342 case MLX5_CMD_OP_QUERY_RQT:
343 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
344 MLX5_GET(query_rqt_in, in, rqtn));
345 break;
346 case MLX5_CMD_OP_MODIFY_RQT:
347 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
348 MLX5_GET(modify_rqt_in, in, rqtn));
349 break;
350 case MLX5_CMD_OP_QUERY_TIR:
351 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
352 MLX5_GET(query_tir_in, in, tirn));
353 break;
354 case MLX5_CMD_OP_MODIFY_TIR:
355 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
356 MLX5_GET(modify_tir_in, in, tirn));
357 break;
358 case MLX5_CMD_OP_QUERY_TIS:
359 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
360 MLX5_GET(query_tis_in, in, tisn));
361 break;
362 case MLX5_CMD_OP_MODIFY_TIS:
363 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
364 MLX5_GET(modify_tis_in, in, tisn));
365 break;
366 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
367 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
368 MLX5_GET(query_flow_table_in, in,
369 table_id));
370 break;
371 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
372 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
373 MLX5_GET(modify_flow_table_in, in,
374 table_id));
375 break;
376 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
377 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
378 MLX5_GET(query_flow_group_in, in,
379 group_id));
380 break;
381 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
382 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
383 MLX5_GET(query_fte_in, in,
384 flow_index));
385 break;
386 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
387 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
388 MLX5_GET(set_fte_in, in, flow_index));
389 break;
390 case MLX5_CMD_OP_QUERY_Q_COUNTER:
391 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
392 MLX5_GET(query_q_counter_in, in,
393 counter_set_id));
394 break;
395 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
396 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
397 MLX5_GET(query_flow_counter_in, in,
398 flow_counter_id));
399 break;
400 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
402 MLX5_GET(general_obj_in_cmd_hdr, in,
403 obj_id));
404 break;
405 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
406 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
407 MLX5_GET(query_scheduling_element_in,
408 in, scheduling_element_id));
409 break;
410 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
411 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
412 MLX5_GET(modify_scheduling_element_in,
413 in, scheduling_element_id));
414 break;
415 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
416 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
417 MLX5_GET(add_vxlan_udp_dport_in, in,
418 vxlan_udp_port));
419 break;
420 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
422 MLX5_GET(query_l2_table_entry_in, in,
423 table_index));
424 break;
425 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
426 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
427 MLX5_GET(set_l2_table_entry_in, in,
428 table_index));
429 break;
430 case MLX5_CMD_OP_QUERY_QP:
431 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
432 MLX5_GET(query_qp_in, in, qpn));
433 break;
434 case MLX5_CMD_OP_RST2INIT_QP:
435 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
436 MLX5_GET(rst2init_qp_in, in, qpn));
437 break;
438 case MLX5_CMD_OP_INIT2INIT_QP:
439 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
440 MLX5_GET(init2init_qp_in, in, qpn));
441 break;
442 case MLX5_CMD_OP_INIT2RTR_QP:
443 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
444 MLX5_GET(init2rtr_qp_in, in, qpn));
445 break;
446 case MLX5_CMD_OP_RTR2RTS_QP:
447 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
448 MLX5_GET(rtr2rts_qp_in, in, qpn));
449 break;
450 case MLX5_CMD_OP_RTS2RTS_QP:
451 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
452 MLX5_GET(rts2rts_qp_in, in, qpn));
453 break;
454 case MLX5_CMD_OP_SQERR2RTS_QP:
455 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
456 MLX5_GET(sqerr2rts_qp_in, in, qpn));
457 break;
458 case MLX5_CMD_OP_2ERR_QP:
459 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
460 MLX5_GET(qp_2err_in, in, qpn));
461 break;
462 case MLX5_CMD_OP_2RST_QP:
463 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
464 MLX5_GET(qp_2rst_in, in, qpn));
465 break;
466 case MLX5_CMD_OP_QUERY_DCT:
467 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
468 MLX5_GET(query_dct_in, in, dctn));
469 break;
470 case MLX5_CMD_OP_QUERY_XRQ:
471 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
472 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
473 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
474 MLX5_GET(query_xrq_in, in, xrqn));
475 break;
476 case MLX5_CMD_OP_QUERY_XRC_SRQ:
477 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
478 MLX5_GET(query_xrc_srq_in, in,
479 xrc_srqn));
480 break;
481 case MLX5_CMD_OP_ARM_XRC_SRQ:
482 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
483 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
484 break;
485 case MLX5_CMD_OP_QUERY_SRQ:
486 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
487 MLX5_GET(query_srq_in, in, srqn));
488 break;
489 case MLX5_CMD_OP_ARM_RQ:
490 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
491 MLX5_GET(arm_rq_in, in, srq_number));
492 break;
493 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
494 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
495 MLX5_GET(drain_dct_in, in, dctn));
496 break;
497 case MLX5_CMD_OP_ARM_XRQ:
498 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
499 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
500 case MLX5_CMD_OP_MODIFY_XRQ:
501 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
502 MLX5_GET(arm_xrq_in, in, xrqn));
503 break;
504 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
505 obj_id = get_enc_obj_id
506 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
507 MLX5_GET(query_packet_reformat_context_in,
508 in, packet_reformat_id));
509 break;
510 default:
511 obj_id = 0;
512 }
513
514 return obj_id;
515}
516
517static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
518 struct ib_uobject *uobj, const void *in)
519{
520 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
521 u64 obj_id = devx_get_obj_id(in);
522
523 if (!obj_id)
524 return false;
525
526 switch (uobj_get_object_id(uobj)) {
527 case UVERBS_OBJECT_CQ:
528 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
529 to_mcq(uobj->object)->mcq.cqn) ==
530 obj_id;
531
532 case UVERBS_OBJECT_SRQ:
533 {
534 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
535 u16 opcode;
536
537 switch (srq->common.res) {
538 case MLX5_RES_XSRQ:
539 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
540 break;
541 case MLX5_RES_XRQ:
542 opcode = MLX5_CMD_OP_CREATE_XRQ;
543 break;
544 default:
545 if (!dev->mdev->issi)
546 opcode = MLX5_CMD_OP_CREATE_SRQ;
547 else
548 opcode = MLX5_CMD_OP_CREATE_RMP;
549 }
550
551 return get_enc_obj_id(opcode,
552 to_msrq(uobj->object)->msrq.srqn) ==
553 obj_id;
554 }
555
556 case UVERBS_OBJECT_QP:
557 {
558 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
559 enum ib_qp_type qp_type = qp->ibqp.qp_type;
560
561 if (qp_type == IB_QPT_RAW_PACKET ||
562 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
563 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
564 &qp->raw_packet_qp;
565 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
566 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
567
568 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
569 rq->base.mqp.qpn) == obj_id ||
570 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
571 sq->base.mqp.qpn) == obj_id ||
572 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
573 rq->tirn) == obj_id ||
574 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
575 sq->tisn) == obj_id);
576 }
577
578 if (qp_type == MLX5_IB_QPT_DCT)
579 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
580 qp->dct.mdct.mqp.qpn) == obj_id;
581
582 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
583 qp->ibqp.qp_num) == obj_id;
584 }
585
586 case UVERBS_OBJECT_WQ:
587 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
588 to_mrwq(uobj->object)->core_qp.qpn) ==
589 obj_id;
590
591 case UVERBS_OBJECT_RWQ_IND_TBL:
592 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
593 to_mrwq_ind_table(uobj->object)->rqtn) ==
594 obj_id;
595
596 case MLX5_IB_OBJECT_DEVX_OBJ:
597 return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
598
599 default:
600 return false;
601 }
602}
603
604static void devx_set_umem_valid(const void *in)
605{
606 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
607
608 switch (opcode) {
609 case MLX5_CMD_OP_CREATE_MKEY:
610 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
611 break;
612 case MLX5_CMD_OP_CREATE_CQ:
613 {
614 void *cqc;
615
616 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
617 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
618 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
619 break;
620 }
621 case MLX5_CMD_OP_CREATE_QP:
622 {
623 void *qpc;
624
625 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
626 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
627 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
628 break;
629 }
630
631 case MLX5_CMD_OP_CREATE_RQ:
632 {
633 void *rqc, *wq;
634
635 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
636 wq = MLX5_ADDR_OF(rqc, rqc, wq);
637 MLX5_SET(wq, wq, dbr_umem_valid, 1);
638 MLX5_SET(wq, wq, wq_umem_valid, 1);
639 break;
640 }
641
642 case MLX5_CMD_OP_CREATE_SQ:
643 {
644 void *sqc, *wq;
645
646 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
647 wq = MLX5_ADDR_OF(sqc, sqc, wq);
648 MLX5_SET(wq, wq, dbr_umem_valid, 1);
649 MLX5_SET(wq, wq, wq_umem_valid, 1);
650 break;
651 }
652
653 case MLX5_CMD_OP_MODIFY_CQ:
654 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
655 break;
656
657 case MLX5_CMD_OP_CREATE_RMP:
658 {
659 void *rmpc, *wq;
660
661 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
662 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
663 MLX5_SET(wq, wq, dbr_umem_valid, 1);
664 MLX5_SET(wq, wq, wq_umem_valid, 1);
665 break;
666 }
667
668 case MLX5_CMD_OP_CREATE_XRQ:
669 {
670 void *xrqc, *wq;
671
672 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
673 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
674 MLX5_SET(wq, wq, dbr_umem_valid, 1);
675 MLX5_SET(wq, wq, wq_umem_valid, 1);
676 break;
677 }
678
679 case MLX5_CMD_OP_CREATE_XRC_SRQ:
680 {
681 void *xrc_srqc;
682
683 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
684 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
685 xrc_srq_context_entry);
686 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
687 break;
688 }
689
690 default:
691 return;
692 }
693}
694
695static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
696{
697 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
698
699 switch (*opcode) {
700 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
701 case MLX5_CMD_OP_CREATE_MKEY:
702 case MLX5_CMD_OP_CREATE_CQ:
703 case MLX5_CMD_OP_ALLOC_PD:
704 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
705 case MLX5_CMD_OP_CREATE_RMP:
706 case MLX5_CMD_OP_CREATE_SQ:
707 case MLX5_CMD_OP_CREATE_RQ:
708 case MLX5_CMD_OP_CREATE_RQT:
709 case MLX5_CMD_OP_CREATE_TIR:
710 case MLX5_CMD_OP_CREATE_TIS:
711 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
712 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
713 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
714 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
715 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
716 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
717 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
718 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
719 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
720 case MLX5_CMD_OP_CREATE_QP:
721 case MLX5_CMD_OP_CREATE_SRQ:
722 case MLX5_CMD_OP_CREATE_XRC_SRQ:
723 case MLX5_CMD_OP_CREATE_DCT:
724 case MLX5_CMD_OP_CREATE_XRQ:
725 case MLX5_CMD_OP_ATTACH_TO_MCG:
726 case MLX5_CMD_OP_ALLOC_XRCD:
727 return true;
728 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
729 {
730 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
731 if (op_mod == 0)
732 return true;
733 return false;
734 }
735 case MLX5_CMD_OP_CREATE_PSV:
736 {
737 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
738
739 if (num_psv == 1)
740 return true;
741 return false;
742 }
743 default:
744 return false;
745 }
746}
747
748static bool devx_is_obj_modify_cmd(const void *in)
749{
750 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
751
752 switch (opcode) {
753 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
754 case MLX5_CMD_OP_MODIFY_CQ:
755 case MLX5_CMD_OP_MODIFY_RMP:
756 case MLX5_CMD_OP_MODIFY_SQ:
757 case MLX5_CMD_OP_MODIFY_RQ:
758 case MLX5_CMD_OP_MODIFY_RQT:
759 case MLX5_CMD_OP_MODIFY_TIR:
760 case MLX5_CMD_OP_MODIFY_TIS:
761 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
762 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
763 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
764 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
765 case MLX5_CMD_OP_RST2INIT_QP:
766 case MLX5_CMD_OP_INIT2RTR_QP:
767 case MLX5_CMD_OP_INIT2INIT_QP:
768 case MLX5_CMD_OP_RTR2RTS_QP:
769 case MLX5_CMD_OP_RTS2RTS_QP:
770 case MLX5_CMD_OP_SQERR2RTS_QP:
771 case MLX5_CMD_OP_2ERR_QP:
772 case MLX5_CMD_OP_2RST_QP:
773 case MLX5_CMD_OP_ARM_XRC_SRQ:
774 case MLX5_CMD_OP_ARM_RQ:
775 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
776 case MLX5_CMD_OP_ARM_XRQ:
777 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
778 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
779 case MLX5_CMD_OP_MODIFY_XRQ:
780 return true;
781 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
782 {
783 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
784
785 if (op_mod == 1)
786 return true;
787 return false;
788 }
789 default:
790 return false;
791 }
792}
793
794static bool devx_is_obj_query_cmd(const void *in)
795{
796 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
797
798 switch (opcode) {
799 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
800 case MLX5_CMD_OP_QUERY_MKEY:
801 case MLX5_CMD_OP_QUERY_CQ:
802 case MLX5_CMD_OP_QUERY_RMP:
803 case MLX5_CMD_OP_QUERY_SQ:
804 case MLX5_CMD_OP_QUERY_RQ:
805 case MLX5_CMD_OP_QUERY_RQT:
806 case MLX5_CMD_OP_QUERY_TIR:
807 case MLX5_CMD_OP_QUERY_TIS:
808 case MLX5_CMD_OP_QUERY_Q_COUNTER:
809 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
810 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
811 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
812 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
813 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
814 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
815 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
816 case MLX5_CMD_OP_QUERY_QP:
817 case MLX5_CMD_OP_QUERY_SRQ:
818 case MLX5_CMD_OP_QUERY_XRC_SRQ:
819 case MLX5_CMD_OP_QUERY_DCT:
820 case MLX5_CMD_OP_QUERY_XRQ:
821 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
822 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
823 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
824 return true;
825 default:
826 return false;
827 }
828}
829
830static bool devx_is_whitelist_cmd(void *in)
831{
832 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
833
834 switch (opcode) {
835 case MLX5_CMD_OP_QUERY_HCA_CAP:
836 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
837 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
838 return true;
839 default:
840 return false;
841 }
842}
843
844static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
845{
846 if (devx_is_whitelist_cmd(cmd_in)) {
847 struct mlx5_ib_dev *dev;
848
849 if (c->devx_uid)
850 return c->devx_uid;
851
852 dev = to_mdev(c->ibucontext.device);
853 if (dev->devx_whitelist_uid)
854 return dev->devx_whitelist_uid;
855
856 return -EOPNOTSUPP;
857 }
858
859 if (!c->devx_uid)
860 return -EINVAL;
861
862 return c->devx_uid;
863}
864
865static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
866{
867 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
868
869 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
870 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
871 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
872 (opcode >= MLX5_CMD_OP_GENERAL_START &&
873 opcode < MLX5_CMD_OP_GENERAL_END))
874 return true;
875
876 switch (opcode) {
877 case MLX5_CMD_OP_QUERY_HCA_CAP:
878 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
879 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
880 case MLX5_CMD_OP_QUERY_VPORT_STATE:
881 case MLX5_CMD_OP_QUERY_ADAPTER:
882 case MLX5_CMD_OP_QUERY_ISSI:
883 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
884 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
885 case MLX5_CMD_OP_QUERY_VNIC_ENV:
886 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
887 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
888 case MLX5_CMD_OP_NOP:
889 case MLX5_CMD_OP_QUERY_CONG_STATUS:
890 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
891 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
892 case MLX5_CMD_OP_QUERY_LAG:
893 return true;
894 default:
895 return false;
896 }
897}
898
899static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
900 struct uverbs_attr_bundle *attrs)
901{
902 struct mlx5_ib_ucontext *c;
903 struct mlx5_ib_dev *dev;
904 int user_vector;
905 int dev_eqn;
906 unsigned int irqn;
907 int err;
908
909 if (uverbs_copy_from(&user_vector, attrs,
910 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
911 return -EFAULT;
912
913 c = devx_ufile2uctx(attrs);
914 if (IS_ERR(c))
915 return PTR_ERR(c);
916 dev = to_mdev(c->ibucontext.device);
917
918 err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
919 if (err < 0)
920 return err;
921
922 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
923 &dev_eqn, sizeof(dev_eqn)))
924 return -EFAULT;
925
926 return 0;
927}
928
929/*
930 *Security note:
931 * The hardware protection mechanism works like this: Each device object that
932 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
933 * the device specification manual) upon its creation. Then upon doorbell,
934 * hardware fetches the object context for which the doorbell was rang, and
935 * validates that the UAR through which the DB was rang matches the UAR ID
936 * of the object.
937 * If no match the doorbell is silently ignored by the hardware. Of course,
938 * the user cannot ring a doorbell on a UAR that was not mapped to it.
939 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
940 * mailboxes (except tagging them with UID), we expose to the user its UAR
941 * ID, so it can embed it in these objects in the expected specification
942 * format. So the only thing the user can do is hurt itself by creating a
943 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
944 * may ring a doorbell on its objects.
945 * The consequence of that will be that another user can schedule a QP/SQ
946 * of the buggy user for execution (just insert it to the hardware schedule
947 * queue or arm its CQ for event generation), no further harm is expected.
948 */
949static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
950 struct uverbs_attr_bundle *attrs)
951{
952 struct mlx5_ib_ucontext *c;
953 struct mlx5_ib_dev *dev;
954 u32 user_idx;
955 s32 dev_idx;
956
957 c = devx_ufile2uctx(attrs);
958 if (IS_ERR(c))
959 return PTR_ERR(c);
960 dev = to_mdev(c->ibucontext.device);
961
962 if (uverbs_copy_from(&user_idx, attrs,
963 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
964 return -EFAULT;
965
966 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
967 if (dev_idx < 0)
968 return dev_idx;
969
970 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
971 &dev_idx, sizeof(dev_idx)))
972 return -EFAULT;
973
974 return 0;
975}
976
977static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
978 struct uverbs_attr_bundle *attrs)
979{
980 struct mlx5_ib_ucontext *c;
981 struct mlx5_ib_dev *dev;
982 void *cmd_in = uverbs_attr_get_alloced_ptr(
983 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
984 int cmd_out_len = uverbs_attr_get_len(attrs,
985 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
986 void *cmd_out;
987 int err;
988 int uid;
989
990 c = devx_ufile2uctx(attrs);
991 if (IS_ERR(c))
992 return PTR_ERR(c);
993 dev = to_mdev(c->ibucontext.device);
994
995 uid = devx_get_uid(c, cmd_in);
996 if (uid < 0)
997 return uid;
998
999 /* Only white list of some general HCA commands are allowed for this method. */
1000 if (!devx_is_general_cmd(cmd_in, dev))
1001 return -EINVAL;
1002
1003 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1004 if (IS_ERR(cmd_out))
1005 return PTR_ERR(cmd_out);
1006
1007 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1008 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1009 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1010 cmd_out, cmd_out_len);
1011 if (err)
1012 return err;
1013
1014 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1015 cmd_out_len);
1016}
1017
1018static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1019 u32 *dinlen,
1020 u32 *obj_id)
1021{
1022 u16 obj_type = MLX5_GET(general_obj_in_cmd_hdr, in, obj_type);
1023 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1024
1025 *obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
1026 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1027
1028 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1029 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1030
1031 switch (MLX5_GET(general_obj_in_cmd_hdr, in, opcode)) {
1032 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1033 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1034 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type, obj_type);
1035 break;
1036
1037 case MLX5_CMD_OP_CREATE_UMEM:
1038 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1039 MLX5_CMD_OP_DESTROY_UMEM);
1040 break;
1041 case MLX5_CMD_OP_CREATE_MKEY:
1042 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_MKEY);
1043 break;
1044 case MLX5_CMD_OP_CREATE_CQ:
1045 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1046 break;
1047 case MLX5_CMD_OP_ALLOC_PD:
1048 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1049 break;
1050 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1051 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1052 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1053 break;
1054 case MLX5_CMD_OP_CREATE_RMP:
1055 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1056 break;
1057 case MLX5_CMD_OP_CREATE_SQ:
1058 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1059 break;
1060 case MLX5_CMD_OP_CREATE_RQ:
1061 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1062 break;
1063 case MLX5_CMD_OP_CREATE_RQT:
1064 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1065 break;
1066 case MLX5_CMD_OP_CREATE_TIR:
1067 *obj_id = MLX5_GET(create_tir_out, out, tirn);
1068 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1069 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1070 break;
1071 case MLX5_CMD_OP_CREATE_TIS:
1072 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1073 break;
1074 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1075 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1076 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1077 break;
1078 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1079 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1080 *obj_id = MLX5_GET(create_flow_table_out, out, table_id);
1081 MLX5_SET(destroy_flow_table_in, din, other_vport,
1082 MLX5_GET(create_flow_table_in, in, other_vport));
1083 MLX5_SET(destroy_flow_table_in, din, vport_number,
1084 MLX5_GET(create_flow_table_in, in, vport_number));
1085 MLX5_SET(destroy_flow_table_in, din, table_type,
1086 MLX5_GET(create_flow_table_in, in, table_type));
1087 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1088 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1089 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1090 break;
1091 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1092 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1093 *obj_id = MLX5_GET(create_flow_group_out, out, group_id);
1094 MLX5_SET(destroy_flow_group_in, din, other_vport,
1095 MLX5_GET(create_flow_group_in, in, other_vport));
1096 MLX5_SET(destroy_flow_group_in, din, vport_number,
1097 MLX5_GET(create_flow_group_in, in, vport_number));
1098 MLX5_SET(destroy_flow_group_in, din, table_type,
1099 MLX5_GET(create_flow_group_in, in, table_type));
1100 MLX5_SET(destroy_flow_group_in, din, table_id,
1101 MLX5_GET(create_flow_group_in, in, table_id));
1102 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1103 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1104 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1105 break;
1106 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1107 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1108 *obj_id = MLX5_GET(set_fte_in, in, flow_index);
1109 MLX5_SET(delete_fte_in, din, other_vport,
1110 MLX5_GET(set_fte_in, in, other_vport));
1111 MLX5_SET(delete_fte_in, din, vport_number,
1112 MLX5_GET(set_fte_in, in, vport_number));
1113 MLX5_SET(delete_fte_in, din, table_type,
1114 MLX5_GET(set_fte_in, in, table_type));
1115 MLX5_SET(delete_fte_in, din, table_id,
1116 MLX5_GET(set_fte_in, in, table_id));
1117 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1118 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1119 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1120 break;
1121 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1122 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1123 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1124 break;
1125 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1126 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1127 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1128 break;
1129 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1130 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1131 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1132 break;
1133 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1134 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1135 *obj_id = MLX5_GET(create_scheduling_element_out, out,
1136 scheduling_element_id);
1137 MLX5_SET(destroy_scheduling_element_in, din,
1138 scheduling_hierarchy,
1139 MLX5_GET(create_scheduling_element_in, in,
1140 scheduling_hierarchy));
1141 MLX5_SET(destroy_scheduling_element_in, din,
1142 scheduling_element_id, *obj_id);
1143 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1144 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1145 break;
1146 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1147 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1148 *obj_id = MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
1149 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1150 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1151 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1152 break;
1153 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1154 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1155 *obj_id = MLX5_GET(set_l2_table_entry_in, in, table_index);
1156 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1157 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1158 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1159 break;
1160 case MLX5_CMD_OP_CREATE_QP:
1161 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1162 break;
1163 case MLX5_CMD_OP_CREATE_SRQ:
1164 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1165 break;
1166 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1167 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1168 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1169 break;
1170 case MLX5_CMD_OP_CREATE_DCT:
1171 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1172 break;
1173 case MLX5_CMD_OP_CREATE_XRQ:
1174 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1175 break;
1176 case MLX5_CMD_OP_ATTACH_TO_MCG:
1177 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1178 MLX5_SET(detach_from_mcg_in, din, qpn,
1179 MLX5_GET(attach_to_mcg_in, in, qpn));
1180 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1181 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1182 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1183 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DETACH_FROM_MCG);
1184 break;
1185 case MLX5_CMD_OP_ALLOC_XRCD:
1186 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
1187 break;
1188 case MLX5_CMD_OP_CREATE_PSV:
1189 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1190 MLX5_CMD_OP_DESTROY_PSV);
1191 MLX5_SET(destroy_psv_in, din, psvn,
1192 MLX5_GET(create_psv_out, out, psv0_index));
1193 break;
1194 default:
1195 /* The entry must match to one of the devx_is_obj_create_cmd */
1196 WARN_ON(true);
1197 break;
1198 }
1199}
1200
1201static int devx_handle_mkey_indirect(struct devx_obj *obj,
1202 struct mlx5_ib_dev *dev,
1203 void *in, void *out)
1204{
1205 struct mlx5_ib_devx_mr *devx_mr = &obj->devx_mr;
1206 struct mlx5_core_mkey *mkey;
1207 void *mkc;
1208 u8 key;
1209
1210 mkey = &devx_mr->mmkey;
1211 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1212 key = MLX5_GET(mkc, mkc, mkey_7_0);
1213 mkey->key = mlx5_idx_to_mkey(
1214 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1215 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1216 mkey->iova = MLX5_GET64(mkc, mkc, start_addr);
1217 mkey->size = MLX5_GET64(mkc, mkc, len);
1218 mkey->pd = MLX5_GET(mkc, mkc, pd);
1219 devx_mr->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1220
1221 return xa_err(xa_store(&dev->odp_mkeys, mlx5_base_mkey(mkey->key), mkey,
1222 GFP_KERNEL));
1223}
1224
1225static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1226 struct devx_obj *obj,
1227 void *in, int in_len)
1228{
1229 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1230 MLX5_FLD_SZ_BYTES(create_mkey_in,
1231 memory_key_mkey_entry);
1232 void *mkc;
1233 u8 access_mode;
1234
1235 if (in_len < min_len)
1236 return -EINVAL;
1237
1238 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1239
1240 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1241 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1242
1243 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1244 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1245 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1246 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1247 return 0;
1248 }
1249
1250 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1251 return 0;
1252}
1253
1254static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1255 struct devx_event_subscription *sub)
1256{
1257 struct devx_event *event;
1258 struct devx_obj_event *xa_val_level2;
1259
1260 if (sub->is_cleaned)
1261 return;
1262
1263 sub->is_cleaned = 1;
1264 list_del_rcu(&sub->xa_list);
1265
1266 if (list_empty(&sub->obj_list))
1267 return;
1268
1269 list_del_rcu(&sub->obj_list);
1270 /* check whether key level 1 for this obj_sub_list is empty */
1271 event = xa_load(&dev->devx_event_table.event_xa,
1272 sub->xa_key_level1);
1273 WARN_ON(!event);
1274
1275 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1276 if (list_empty(&xa_val_level2->obj_sub_list)) {
1277 xa_erase(&event->object_ids,
1278 sub->xa_key_level2);
1279 kfree_rcu(xa_val_level2, rcu);
1280 }
1281}
1282
1283static int devx_obj_cleanup(struct ib_uobject *uobject,
1284 enum rdma_remove_reason why,
1285 struct uverbs_attr_bundle *attrs)
1286{
1287 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1288 struct mlx5_devx_event_table *devx_event_table;
1289 struct devx_obj *obj = uobject->object;
1290 struct devx_event_subscription *sub_entry, *tmp;
1291 struct mlx5_ib_dev *dev;
1292 int ret;
1293
1294 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1295 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1296 /*
1297 * The pagefault_single_data_segment() does commands against
1298 * the mmkey, we must wait for that to stop before freeing the
1299 * mkey, as another allocation could get the same mkey #.
1300 */
1301 xa_erase(&obj->ib_dev->odp_mkeys,
1302 mlx5_base_mkey(obj->devx_mr.mmkey.key));
1303 synchronize_srcu(&dev->odp_srcu);
1304 }
1305
1306 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1307 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1308 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1309 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1310 else
1311 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1312 obj->dinlen, out, sizeof(out));
1313 if (ret)
1314 return ret;
1315
1316 devx_event_table = &dev->devx_event_table;
1317
1318 mutex_lock(&devx_event_table->event_xa_lock);
1319 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1320 devx_cleanup_subscription(dev, sub_entry);
1321 mutex_unlock(&devx_event_table->event_xa_lock);
1322
1323 kfree(obj);
1324 return ret;
1325}
1326
1327static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1328{
1329 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1330 struct mlx5_devx_event_table *table;
1331 struct devx_event *event;
1332 struct devx_obj_event *obj_event;
1333 u32 obj_id = mcq->cqn;
1334
1335 table = &obj->ib_dev->devx_event_table;
1336 rcu_read_lock();
1337 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1338 if (!event)
1339 goto out;
1340
1341 obj_event = xa_load(&event->object_ids, obj_id);
1342 if (!obj_event)
1343 goto out;
1344
1345 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1346out:
1347 rcu_read_unlock();
1348}
1349
1350static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1351 struct uverbs_attr_bundle *attrs)
1352{
1353 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1354 int cmd_out_len = uverbs_attr_get_len(attrs,
1355 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1356 int cmd_in_len = uverbs_attr_get_len(attrs,
1357 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1358 void *cmd_out;
1359 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1360 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1361 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1362 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1363 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1364 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1365 struct devx_obj *obj;
1366 u16 obj_type = 0;
1367 int err;
1368 int uid;
1369 u32 obj_id;
1370 u16 opcode;
1371
1372 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1373 return -EINVAL;
1374
1375 uid = devx_get_uid(c, cmd_in);
1376 if (uid < 0)
1377 return uid;
1378
1379 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1380 return -EINVAL;
1381
1382 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1383 if (IS_ERR(cmd_out))
1384 return PTR_ERR(cmd_out);
1385
1386 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1387 if (!obj)
1388 return -ENOMEM;
1389
1390 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1391 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1392 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1393 if (err)
1394 goto obj_free;
1395 } else {
1396 devx_set_umem_valid(cmd_in);
1397 }
1398
1399 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1400 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1401 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1402 cmd_in_len, cmd_out, cmd_out_len);
1403 } else if (opcode == MLX5_CMD_OP_CREATE_CQ) {
1404 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1405 obj->core_cq.comp = devx_cq_comp;
1406 err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1407 cmd_in, cmd_in_len, cmd_out,
1408 cmd_out_len);
1409 } else {
1410 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1411 cmd_in_len,
1412 cmd_out, cmd_out_len);
1413 }
1414
1415 if (err)
1416 goto obj_free;
1417
1418 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1419 u8 bulk = MLX5_GET(alloc_flow_counter_in,
1420 cmd_in,
1421 flow_counter_bulk);
1422 obj->flow_counter_bulk_size = 128UL * bulk;
1423 }
1424
1425 uobj->object = obj;
1426 INIT_LIST_HEAD(&obj->event_sub);
1427 obj->ib_dev = dev;
1428 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1429 &obj_id);
1430 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1431
1432 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1433 if (err)
1434 goto obj_destroy;
1435
1436 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1437 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1438 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1439
1440 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1441 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1442 if (err)
1443 goto obj_destroy;
1444 }
1445 return 0;
1446
1447obj_destroy:
1448 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1449 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1450 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1451 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1452 else
1453 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1454 sizeof(out));
1455obj_free:
1456 kfree(obj);
1457 return err;
1458}
1459
1460static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1461 struct uverbs_attr_bundle *attrs)
1462{
1463 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1464 int cmd_out_len = uverbs_attr_get_len(attrs,
1465 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1466 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1467 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1468 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1469 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1470 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1471 void *cmd_out;
1472 int err;
1473 int uid;
1474
1475 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1476 return -EINVAL;
1477
1478 uid = devx_get_uid(c, cmd_in);
1479 if (uid < 0)
1480 return uid;
1481
1482 if (!devx_is_obj_modify_cmd(cmd_in))
1483 return -EINVAL;
1484
1485 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1486 return -EINVAL;
1487
1488 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1489 if (IS_ERR(cmd_out))
1490 return PTR_ERR(cmd_out);
1491
1492 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1493 devx_set_umem_valid(cmd_in);
1494
1495 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1496 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1497 cmd_out, cmd_out_len);
1498 if (err)
1499 return err;
1500
1501 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1502 cmd_out, cmd_out_len);
1503}
1504
1505static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1506 struct uverbs_attr_bundle *attrs)
1507{
1508 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1509 int cmd_out_len = uverbs_attr_get_len(attrs,
1510 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1511 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1512 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1513 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1514 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1515 void *cmd_out;
1516 int err;
1517 int uid;
1518 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1519
1520 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1521 return -EINVAL;
1522
1523 uid = devx_get_uid(c, cmd_in);
1524 if (uid < 0)
1525 return uid;
1526
1527 if (!devx_is_obj_query_cmd(cmd_in))
1528 return -EINVAL;
1529
1530 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1531 return -EINVAL;
1532
1533 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1534 if (IS_ERR(cmd_out))
1535 return PTR_ERR(cmd_out);
1536
1537 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1538 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1539 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1540 cmd_out, cmd_out_len);
1541 if (err)
1542 return err;
1543
1544 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1545 cmd_out, cmd_out_len);
1546}
1547
1548struct devx_async_event_queue {
1549 spinlock_t lock;
1550 wait_queue_head_t poll_wait;
1551 struct list_head event_list;
1552 atomic_t bytes_in_use;
1553 u8 is_destroyed:1;
1554};
1555
1556struct devx_async_cmd_event_file {
1557 struct ib_uobject uobj;
1558 struct devx_async_event_queue ev_queue;
1559 struct mlx5_async_ctx async_ctx;
1560};
1561
1562static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1563{
1564 spin_lock_init(&ev_queue->lock);
1565 INIT_LIST_HEAD(&ev_queue->event_list);
1566 init_waitqueue_head(&ev_queue->poll_wait);
1567 atomic_set(&ev_queue->bytes_in_use, 0);
1568 ev_queue->is_destroyed = 0;
1569}
1570
1571static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1572 struct uverbs_attr_bundle *attrs)
1573{
1574 struct devx_async_cmd_event_file *ev_file;
1575
1576 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1577 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1578 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1579
1580 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1581 uobj);
1582 devx_init_event_queue(&ev_file->ev_queue);
1583 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1584 return 0;
1585}
1586
1587static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1588 struct uverbs_attr_bundle *attrs)
1589{
1590 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1591 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1592 struct devx_async_event_file *ev_file;
1593 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1594 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1595 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1596 u32 flags;
1597 int err;
1598
1599 err = uverbs_get_flags32(&flags, attrs,
1600 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1601 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1602
1603 if (err)
1604 return err;
1605
1606 ev_file = container_of(uobj, struct devx_async_event_file,
1607 uobj);
1608 spin_lock_init(&ev_file->lock);
1609 INIT_LIST_HEAD(&ev_file->event_list);
1610 init_waitqueue_head(&ev_file->poll_wait);
1611 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1612 ev_file->omit_data = 1;
1613 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1614 ev_file->dev = dev;
1615 get_device(&dev->ib_dev.dev);
1616 return 0;
1617}
1618
1619static void devx_query_callback(int status, struct mlx5_async_work *context)
1620{
1621 struct devx_async_data *async_data =
1622 container_of(context, struct devx_async_data, cb_work);
1623 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1624 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1625 unsigned long flags;
1626
1627 /*
1628 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1629 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1630 * routine returns, ensuring that it always remains valid here.
1631 */
1632 spin_lock_irqsave(&ev_queue->lock, flags);
1633 list_add_tail(&async_data->list, &ev_queue->event_list);
1634 spin_unlock_irqrestore(&ev_queue->lock, flags);
1635
1636 wake_up_interruptible(&ev_queue->poll_wait);
1637}
1638
1639#define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1640
1641static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1642 struct uverbs_attr_bundle *attrs)
1643{
1644 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1645 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1646 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1647 attrs,
1648 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1649 u16 cmd_out_len;
1650 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1651 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1652 struct ib_uobject *fd_uobj;
1653 int err;
1654 int uid;
1655 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1656 struct devx_async_cmd_event_file *ev_file;
1657 struct devx_async_data *async_data;
1658
1659 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1660 return -EINVAL;
1661
1662 uid = devx_get_uid(c, cmd_in);
1663 if (uid < 0)
1664 return uid;
1665
1666 if (!devx_is_obj_query_cmd(cmd_in))
1667 return -EINVAL;
1668
1669 err = uverbs_get_const(&cmd_out_len, attrs,
1670 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1671 if (err)
1672 return err;
1673
1674 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1675 return -EINVAL;
1676
1677 fd_uobj = uverbs_attr_get_uobject(attrs,
1678 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1679 if (IS_ERR(fd_uobj))
1680 return PTR_ERR(fd_uobj);
1681
1682 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1683 uobj);
1684
1685 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1686 MAX_ASYNC_BYTES_IN_USE) {
1687 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1688 return -EAGAIN;
1689 }
1690
1691 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1692 cmd_out_len), GFP_KERNEL);
1693 if (!async_data) {
1694 err = -ENOMEM;
1695 goto sub_bytes;
1696 }
1697
1698 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1699 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1700 if (err)
1701 goto free_async;
1702
1703 async_data->cmd_out_len = cmd_out_len;
1704 async_data->mdev = mdev;
1705 async_data->ev_file = ev_file;
1706
1707 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1708 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1709 uverbs_attr_get_len(attrs,
1710 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1711 async_data->hdr.out_data,
1712 async_data->cmd_out_len,
1713 devx_query_callback, &async_data->cb_work);
1714
1715 if (err)
1716 goto free_async;
1717
1718 return 0;
1719
1720free_async:
1721 kvfree(async_data);
1722sub_bytes:
1723 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1724 return err;
1725}
1726
1727static void
1728subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1729 u32 key_level1,
1730 bool is_level2,
1731 u32 key_level2)
1732{
1733 struct devx_event *event;
1734 struct devx_obj_event *xa_val_level2;
1735
1736 /* Level 1 is valid for future use, no need to free */
1737 if (!is_level2)
1738 return;
1739
1740 event = xa_load(&devx_event_table->event_xa, key_level1);
1741 WARN_ON(!event);
1742
1743 xa_val_level2 = xa_load(&event->object_ids,
1744 key_level2);
1745 if (list_empty(&xa_val_level2->obj_sub_list)) {
1746 xa_erase(&event->object_ids,
1747 key_level2);
1748 kfree_rcu(xa_val_level2, rcu);
1749 }
1750}
1751
1752static int
1753subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1754 u32 key_level1,
1755 bool is_level2,
1756 u32 key_level2)
1757{
1758 struct devx_obj_event *obj_event;
1759 struct devx_event *event;
1760 int err;
1761
1762 event = xa_load(&devx_event_table->event_xa, key_level1);
1763 if (!event) {
1764 event = kzalloc(sizeof(*event), GFP_KERNEL);
1765 if (!event)
1766 return -ENOMEM;
1767
1768 INIT_LIST_HEAD(&event->unaffiliated_list);
1769 xa_init(&event->object_ids);
1770
1771 err = xa_insert(&devx_event_table->event_xa,
1772 key_level1,
1773 event,
1774 GFP_KERNEL);
1775 if (err) {
1776 kfree(event);
1777 return err;
1778 }
1779 }
1780
1781 if (!is_level2)
1782 return 0;
1783
1784 obj_event = xa_load(&event->object_ids, key_level2);
1785 if (!obj_event) {
1786 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1787 if (!obj_event)
1788 /* Level1 is valid for future use, no need to free */
1789 return -ENOMEM;
1790
1791 err = xa_insert(&event->object_ids,
1792 key_level2,
1793 obj_event,
1794 GFP_KERNEL);
1795 if (err)
1796 return err;
1797 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1798 }
1799
1800 return 0;
1801}
1802
1803static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1804 struct devx_obj *obj)
1805{
1806 int i;
1807
1808 for (i = 0; i < num_events; i++) {
1809 if (obj) {
1810 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1811 return false;
1812 } else if (!is_legacy_unaffiliated_event_num(
1813 event_type_num_list[i])) {
1814 return false;
1815 }
1816 }
1817
1818 return true;
1819}
1820
1821#define MAX_SUPP_EVENT_NUM 255
1822static bool is_valid_events(struct mlx5_core_dev *dev,
1823 int num_events, u16 *event_type_num_list,
1824 struct devx_obj *obj)
1825{
1826 __be64 *aff_events;
1827 __be64 *unaff_events;
1828 int mask_entry;
1829 int mask_bit;
1830 int i;
1831
1832 if (MLX5_CAP_GEN(dev, event_cap)) {
1833 aff_events = MLX5_CAP_DEV_EVENT(dev,
1834 user_affiliated_events);
1835 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1836 user_unaffiliated_events);
1837 } else {
1838 return is_valid_events_legacy(num_events, event_type_num_list,
1839 obj);
1840 }
1841
1842 for (i = 0; i < num_events; i++) {
1843 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1844 return false;
1845
1846 mask_entry = event_type_num_list[i] / 64;
1847 mask_bit = event_type_num_list[i] % 64;
1848
1849 if (obj) {
1850 /* CQ completion */
1851 if (event_type_num_list[i] == 0)
1852 continue;
1853
1854 if (!(be64_to_cpu(aff_events[mask_entry]) &
1855 (1ull << mask_bit)))
1856 return false;
1857
1858 continue;
1859 }
1860
1861 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1862 (1ull << mask_bit)))
1863 return false;
1864 }
1865
1866 return true;
1867}
1868
1869#define MAX_NUM_EVENTS 16
1870static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1871 struct uverbs_attr_bundle *attrs)
1872{
1873 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1874 attrs,
1875 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1876 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1877 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1878 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1879 struct ib_uobject *fd_uobj;
1880 struct devx_obj *obj = NULL;
1881 struct devx_async_event_file *ev_file;
1882 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1883 u16 *event_type_num_list;
1884 struct devx_event_subscription *event_sub, *tmp_sub;
1885 struct list_head sub_list;
1886 int redirect_fd;
1887 bool use_eventfd = false;
1888 int num_events;
1889 int num_alloc_xa_entries = 0;
1890 u16 obj_type = 0;
1891 u64 cookie = 0;
1892 u32 obj_id = 0;
1893 int err;
1894 int i;
1895
1896 if (!c->devx_uid)
1897 return -EINVAL;
1898
1899 if (!IS_ERR(devx_uobj)) {
1900 obj = (struct devx_obj *)devx_uobj->object;
1901 if (obj)
1902 obj_id = get_dec_obj_id(obj->obj_id);
1903 }
1904
1905 fd_uobj = uverbs_attr_get_uobject(attrs,
1906 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
1907 if (IS_ERR(fd_uobj))
1908 return PTR_ERR(fd_uobj);
1909
1910 ev_file = container_of(fd_uobj, struct devx_async_event_file,
1911 uobj);
1912
1913 if (uverbs_attr_is_valid(attrs,
1914 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
1915 err = uverbs_copy_from(&redirect_fd, attrs,
1916 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
1917 if (err)
1918 return err;
1919
1920 use_eventfd = true;
1921 }
1922
1923 if (uverbs_attr_is_valid(attrs,
1924 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
1925 if (use_eventfd)
1926 return -EINVAL;
1927
1928 err = uverbs_copy_from(&cookie, attrs,
1929 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
1930 if (err)
1931 return err;
1932 }
1933
1934 num_events = uverbs_attr_ptr_get_array_size(
1935 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
1936 sizeof(u16));
1937
1938 if (num_events < 0)
1939 return num_events;
1940
1941 if (num_events > MAX_NUM_EVENTS)
1942 return -EINVAL;
1943
1944 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
1945 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
1946
1947 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
1948 return -EINVAL;
1949
1950 INIT_LIST_HEAD(&sub_list);
1951
1952 /* Protect from concurrent subscriptions to same XA entries to allow
1953 * both to succeed
1954 */
1955 mutex_lock(&devx_event_table->event_xa_lock);
1956 for (i = 0; i < num_events; i++) {
1957 u32 key_level1;
1958
1959 if (obj)
1960 obj_type = get_dec_obj_type(obj,
1961 event_type_num_list[i]);
1962 key_level1 = event_type_num_list[i] | obj_type << 16;
1963
1964 err = subscribe_event_xa_alloc(devx_event_table,
1965 key_level1,
1966 obj,
1967 obj_id);
1968 if (err)
1969 goto err;
1970
1971 num_alloc_xa_entries++;
1972 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
1973 if (!event_sub) {
1974 err = -ENOMEM;
1975 goto err;
1976 }
1977
1978 list_add_tail(&event_sub->event_list, &sub_list);
1979 uverbs_uobject_get(&ev_file->uobj);
1980 if (use_eventfd) {
1981 event_sub->eventfd =
1982 eventfd_ctx_fdget(redirect_fd);
1983
1984 if (IS_ERR(event_sub->eventfd)) {
1985 err = PTR_ERR(event_sub->eventfd);
1986 event_sub->eventfd = NULL;
1987 goto err;
1988 }
1989 }
1990
1991 event_sub->cookie = cookie;
1992 event_sub->ev_file = ev_file;
1993 /* May be needed upon cleanup the devx object/subscription */
1994 event_sub->xa_key_level1 = key_level1;
1995 event_sub->xa_key_level2 = obj_id;
1996 INIT_LIST_HEAD(&event_sub->obj_list);
1997 }
1998
1999 /* Once all the allocations and the XA data insertions were done we
2000 * can go ahead and add all the subscriptions to the relevant lists
2001 * without concern of a failure.
2002 */
2003 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2004 struct devx_event *event;
2005 struct devx_obj_event *obj_event;
2006
2007 list_del_init(&event_sub->event_list);
2008
2009 spin_lock_irq(&ev_file->lock);
2010 list_add_tail_rcu(&event_sub->file_list,
2011 &ev_file->subscribed_events_list);
2012 spin_unlock_irq(&ev_file->lock);
2013
2014 event = xa_load(&devx_event_table->event_xa,
2015 event_sub->xa_key_level1);
2016 WARN_ON(!event);
2017
2018 if (!obj) {
2019 list_add_tail_rcu(&event_sub->xa_list,
2020 &event->unaffiliated_list);
2021 continue;
2022 }
2023
2024 obj_event = xa_load(&event->object_ids, obj_id);
2025 WARN_ON(!obj_event);
2026 list_add_tail_rcu(&event_sub->xa_list,
2027 &obj_event->obj_sub_list);
2028 list_add_tail_rcu(&event_sub->obj_list,
2029 &obj->event_sub);
2030 }
2031
2032 mutex_unlock(&devx_event_table->event_xa_lock);
2033 return 0;
2034
2035err:
2036 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2037 list_del(&event_sub->event_list);
2038
2039 subscribe_event_xa_dealloc(devx_event_table,
2040 event_sub->xa_key_level1,
2041 obj,
2042 obj_id);
2043
2044 if (event_sub->eventfd)
2045 eventfd_ctx_put(event_sub->eventfd);
2046 uverbs_uobject_put(&event_sub->ev_file->uobj);
2047 kfree(event_sub);
2048 }
2049
2050 mutex_unlock(&devx_event_table->event_xa_lock);
2051 return err;
2052}
2053
2054static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2055 struct uverbs_attr_bundle *attrs,
2056 struct devx_umem *obj)
2057{
2058 u64 addr;
2059 size_t size;
2060 u32 access;
2061 int err;
2062
2063 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2064 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2065 return -EFAULT;
2066
2067 err = uverbs_get_flags32(&access, attrs,
2068 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2069 IB_ACCESS_LOCAL_WRITE |
2070 IB_ACCESS_REMOTE_WRITE |
2071 IB_ACCESS_REMOTE_READ);
2072 if (err)
2073 return err;
2074
2075 err = ib_check_mr_access(&dev->ib_dev, access);
2076 if (err)
2077 return err;
2078
2079 obj->umem = ib_umem_get_peer(&dev->ib_dev, addr, size, access, 0);
2080 if (IS_ERR(obj->umem))
2081 return PTR_ERR(obj->umem);
2082 return 0;
2083}
2084
2085static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2086 struct uverbs_attr_bundle *attrs,
2087 struct devx_umem *obj,
2088 struct devx_umem_reg_cmd *cmd)
2089{
2090 unsigned int page_size;
2091 __be64 *mtt;
2092 void *umem;
2093
2094 /*
2095 * We don't know what the user intends to use this umem for, but the HW
2096 * restrictions must be met. MR, doorbell records, QP, WQ and CQ all
2097 * have different requirements. Since we have no idea how to sort this
2098 * out, only support PAGE_SIZE with the expectation that userspace will
2099 * provide the necessary alignments inside the known PAGE_SIZE and that
2100 * FW will check everything.
2101 */
2102 page_size = ib_umem_find_best_pgoff(
2103 obj->umem, PAGE_SIZE,
2104 __mlx5_page_offset_to_bitmask(__mlx5_bit_sz(umem, page_offset),
2105 0));
2106 if (!page_size)
2107 return -EINVAL;
2108
2109 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2110 (MLX5_ST_SZ_BYTES(mtt) *
2111 ib_umem_num_dma_blocks(obj->umem, page_size));
2112 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2113 if (IS_ERR(cmd->in))
2114 return PTR_ERR(cmd->in);
2115
2116 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2117 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2118
2119 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2120 MLX5_SET64(umem, umem, num_of_mtt,
2121 ib_umem_num_dma_blocks(obj->umem, page_size));
2122 MLX5_SET(umem, umem, log_page_size,
2123 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2124 MLX5_SET(umem, umem, page_offset,
2125 ib_umem_dma_offset(obj->umem, page_size));
2126
2127 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2128 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2129 MLX5_IB_MTT_READ);
2130 return 0;
2131}
2132
2133static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2134 struct uverbs_attr_bundle *attrs)
2135{
2136 struct devx_umem_reg_cmd cmd;
2137 struct devx_umem *obj;
2138 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2139 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2140 u32 obj_id;
2141 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2142 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2143 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2144 int err;
2145
2146 if (!c->devx_uid)
2147 return -EINVAL;
2148
2149 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2150 if (!obj)
2151 return -ENOMEM;
2152
2153 err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2154 if (err)
2155 goto err_obj_free;
2156
2157 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd);
2158 if (err)
2159 goto err_umem_release;
2160
2161 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2162 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2163 sizeof(cmd.out));
2164 if (err)
2165 goto err_umem_release;
2166
2167 obj->mdev = dev->mdev;
2168 uobj->object = obj;
2169 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2170 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2171
2172 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2173 sizeof(obj_id));
2174 return err;
2175
2176err_umem_release:
2177 ib_umem_release(obj->umem);
2178err_obj_free:
2179 kfree(obj);
2180 return err;
2181}
2182
2183static int devx_umem_cleanup(struct ib_uobject *uobject,
2184 enum rdma_remove_reason why,
2185 struct uverbs_attr_bundle *attrs)
2186{
2187 struct devx_umem *obj = uobject->object;
2188 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2189 int err;
2190
2191 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2192 if (err)
2193 return err;
2194
2195 ib_umem_release(obj->umem);
2196 kfree(obj);
2197 return 0;
2198}
2199
2200static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2201 unsigned long event_type)
2202{
2203 __be64 *unaff_events;
2204 int mask_entry;
2205 int mask_bit;
2206
2207 if (!MLX5_CAP_GEN(dev, event_cap))
2208 return is_legacy_unaffiliated_event_num(event_type);
2209
2210 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2211 user_unaffiliated_events);
2212 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2213
2214 mask_entry = event_type / 64;
2215 mask_bit = event_type % 64;
2216
2217 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2218 return false;
2219
2220 return true;
2221}
2222
2223static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2224{
2225 struct mlx5_eqe *eqe = data;
2226 u32 obj_id = 0;
2227
2228 switch (event_type) {
2229 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2230 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2231 case MLX5_EVENT_TYPE_PATH_MIG:
2232 case MLX5_EVENT_TYPE_COMM_EST:
2233 case MLX5_EVENT_TYPE_SQ_DRAINED:
2234 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2235 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2236 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2237 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2238 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2239 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2240 break;
2241 case MLX5_EVENT_TYPE_XRQ_ERROR:
2242 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2243 break;
2244 case MLX5_EVENT_TYPE_DCT_DRAINED:
2245 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2246 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2247 break;
2248 case MLX5_EVENT_TYPE_CQ_ERROR:
2249 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2250 break;
2251 default:
2252 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2253 break;
2254 }
2255
2256 return obj_id;
2257}
2258
2259static int deliver_event(struct devx_event_subscription *event_sub,
2260 const void *data)
2261{
2262 struct devx_async_event_file *ev_file;
2263 struct devx_async_event_data *event_data;
2264 unsigned long flags;
2265
2266 ev_file = event_sub->ev_file;
2267
2268 if (ev_file->omit_data) {
2269 spin_lock_irqsave(&ev_file->lock, flags);
2270 if (!list_empty(&event_sub->event_list) ||
2271 ev_file->is_destroyed) {
2272 spin_unlock_irqrestore(&ev_file->lock, flags);
2273 return 0;
2274 }
2275
2276 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2277 spin_unlock_irqrestore(&ev_file->lock, flags);
2278 wake_up_interruptible(&ev_file->poll_wait);
2279 return 0;
2280 }
2281
2282 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2283 GFP_ATOMIC);
2284 if (!event_data) {
2285 spin_lock_irqsave(&ev_file->lock, flags);
2286 ev_file->is_overflow_err = 1;
2287 spin_unlock_irqrestore(&ev_file->lock, flags);
2288 return -ENOMEM;
2289 }
2290
2291 event_data->hdr.cookie = event_sub->cookie;
2292 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2293
2294 spin_lock_irqsave(&ev_file->lock, flags);
2295 if (!ev_file->is_destroyed)
2296 list_add_tail(&event_data->list, &ev_file->event_list);
2297 else
2298 kfree(event_data);
2299 spin_unlock_irqrestore(&ev_file->lock, flags);
2300 wake_up_interruptible(&ev_file->poll_wait);
2301
2302 return 0;
2303}
2304
2305static void dispatch_event_fd(struct list_head *fd_list,
2306 const void *data)
2307{
2308 struct devx_event_subscription *item;
2309
2310 list_for_each_entry_rcu(item, fd_list, xa_list) {
2311 if (item->eventfd)
2312 eventfd_signal(item->eventfd, 1);
2313 else
2314 deliver_event(item, data);
2315 }
2316}
2317
2318static int devx_event_notifier(struct notifier_block *nb,
2319 unsigned long event_type, void *data)
2320{
2321 struct mlx5_devx_event_table *table;
2322 struct mlx5_ib_dev *dev;
2323 struct devx_event *event;
2324 struct devx_obj_event *obj_event;
2325 u16 obj_type = 0;
2326 bool is_unaffiliated;
2327 u32 obj_id;
2328
2329 /* Explicit filtering to kernel events which may occur frequently */
2330 if (event_type == MLX5_EVENT_TYPE_CMD ||
2331 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2332 return NOTIFY_OK;
2333
2334 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2335 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2336 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2337
2338 if (!is_unaffiliated)
2339 obj_type = get_event_obj_type(event_type, data);
2340
2341 rcu_read_lock();
2342 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2343 if (!event) {
2344 rcu_read_unlock();
2345 return NOTIFY_DONE;
2346 }
2347
2348 if (is_unaffiliated) {
2349 dispatch_event_fd(&event->unaffiliated_list, data);
2350 rcu_read_unlock();
2351 return NOTIFY_OK;
2352 }
2353
2354 obj_id = devx_get_obj_id_from_event(event_type, data);
2355 obj_event = xa_load(&event->object_ids, obj_id);
2356 if (!obj_event) {
2357 rcu_read_unlock();
2358 return NOTIFY_DONE;
2359 }
2360
2361 dispatch_event_fd(&obj_event->obj_sub_list, data);
2362
2363 rcu_read_unlock();
2364 return NOTIFY_OK;
2365}
2366
2367int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2368{
2369 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2370 int uid;
2371
2372 uid = mlx5_ib_devx_create(dev, false);
2373 if (uid > 0) {
2374 dev->devx_whitelist_uid = uid;
2375 xa_init(&table->event_xa);
2376 mutex_init(&table->event_xa_lock);
2377 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2378 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2379 }
2380
2381 return 0;
2382}
2383
2384void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2385{
2386 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2387 struct devx_event_subscription *sub, *tmp;
2388 struct devx_event *event;
2389 void *entry;
2390 unsigned long id;
2391
2392 if (dev->devx_whitelist_uid) {
2393 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2394 mutex_lock(&dev->devx_event_table.event_xa_lock);
2395 xa_for_each(&table->event_xa, id, entry) {
2396 event = entry;
2397 list_for_each_entry_safe(
2398 sub, tmp, &event->unaffiliated_list, xa_list)
2399 devx_cleanup_subscription(dev, sub);
2400 kfree(entry);
2401 }
2402 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2403 xa_destroy(&table->event_xa);
2404
2405 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2406 }
2407}
2408
2409static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2410 size_t count, loff_t *pos)
2411{
2412 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2413 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2414 struct devx_async_data *event;
2415 int ret = 0;
2416 size_t eventsz;
2417
2418 spin_lock_irq(&ev_queue->lock);
2419
2420 while (list_empty(&ev_queue->event_list)) {
2421 spin_unlock_irq(&ev_queue->lock);
2422
2423 if (filp->f_flags & O_NONBLOCK)
2424 return -EAGAIN;
2425
2426 if (wait_event_interruptible(
2427 ev_queue->poll_wait,
2428 (!list_empty(&ev_queue->event_list) ||
2429 ev_queue->is_destroyed))) {
2430 return -ERESTARTSYS;
2431 }
2432
2433 spin_lock_irq(&ev_queue->lock);
2434 if (ev_queue->is_destroyed) {
2435 spin_unlock_irq(&ev_queue->lock);
2436 return -EIO;
2437 }
2438 }
2439
2440 event = list_entry(ev_queue->event_list.next,
2441 struct devx_async_data, list);
2442 eventsz = event->cmd_out_len +
2443 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2444
2445 if (eventsz > count) {
2446 spin_unlock_irq(&ev_queue->lock);
2447 return -ENOSPC;
2448 }
2449
2450 list_del(ev_queue->event_list.next);
2451 spin_unlock_irq(&ev_queue->lock);
2452
2453 if (copy_to_user(buf, &event->hdr, eventsz))
2454 ret = -EFAULT;
2455 else
2456 ret = eventsz;
2457
2458 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2459 kvfree(event);
2460 return ret;
2461}
2462
2463static __poll_t devx_async_cmd_event_poll(struct file *filp,
2464 struct poll_table_struct *wait)
2465{
2466 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2467 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2468 __poll_t pollflags = 0;
2469
2470 poll_wait(filp, &ev_queue->poll_wait, wait);
2471
2472 spin_lock_irq(&ev_queue->lock);
2473 if (ev_queue->is_destroyed)
2474 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2475 else if (!list_empty(&ev_queue->event_list))
2476 pollflags = EPOLLIN | EPOLLRDNORM;
2477 spin_unlock_irq(&ev_queue->lock);
2478
2479 return pollflags;
2480}
2481
2482static const struct file_operations devx_async_cmd_event_fops = {
2483 .owner = THIS_MODULE,
2484 .read = devx_async_cmd_event_read,
2485 .poll = devx_async_cmd_event_poll,
2486 .release = uverbs_uobject_fd_release,
2487 .llseek = no_llseek,
2488};
2489
2490static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2491 size_t count, loff_t *pos)
2492{
2493 struct devx_async_event_file *ev_file = filp->private_data;
2494 struct devx_event_subscription *event_sub;
2495 struct devx_async_event_data *event;
2496 int ret = 0;
2497 size_t eventsz;
2498 bool omit_data;
2499 void *event_data;
2500
2501 omit_data = ev_file->omit_data;
2502
2503 spin_lock_irq(&ev_file->lock);
2504
2505 if (ev_file->is_overflow_err) {
2506 ev_file->is_overflow_err = 0;
2507 spin_unlock_irq(&ev_file->lock);
2508 return -EOVERFLOW;
2509 }
2510
2511
2512 while (list_empty(&ev_file->event_list)) {
2513 spin_unlock_irq(&ev_file->lock);
2514
2515 if (filp->f_flags & O_NONBLOCK)
2516 return -EAGAIN;
2517
2518 if (wait_event_interruptible(ev_file->poll_wait,
2519 (!list_empty(&ev_file->event_list) ||
2520 ev_file->is_destroyed))) {
2521 return -ERESTARTSYS;
2522 }
2523
2524 spin_lock_irq(&ev_file->lock);
2525 if (ev_file->is_destroyed) {
2526 spin_unlock_irq(&ev_file->lock);
2527 return -EIO;
2528 }
2529 }
2530
2531 if (omit_data) {
2532 event_sub = list_first_entry(&ev_file->event_list,
2533 struct devx_event_subscription,
2534 event_list);
2535 eventsz = sizeof(event_sub->cookie);
2536 event_data = &event_sub->cookie;
2537 } else {
2538 event = list_first_entry(&ev_file->event_list,
2539 struct devx_async_event_data, list);
2540 eventsz = sizeof(struct mlx5_eqe) +
2541 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2542 event_data = &event->hdr;
2543 }
2544
2545 if (eventsz > count) {
2546 spin_unlock_irq(&ev_file->lock);
2547 return -EINVAL;
2548 }
2549
2550 if (omit_data)
2551 list_del_init(&event_sub->event_list);
2552 else
2553 list_del(&event->list);
2554
2555 spin_unlock_irq(&ev_file->lock);
2556
2557 if (copy_to_user(buf, event_data, eventsz))
2558 /* This points to an application issue, not a kernel concern */
2559 ret = -EFAULT;
2560 else
2561 ret = eventsz;
2562
2563 if (!omit_data)
2564 kfree(event);
2565 return ret;
2566}
2567
2568static __poll_t devx_async_event_poll(struct file *filp,
2569 struct poll_table_struct *wait)
2570{
2571 struct devx_async_event_file *ev_file = filp->private_data;
2572 __poll_t pollflags = 0;
2573
2574 poll_wait(filp, &ev_file->poll_wait, wait);
2575
2576 spin_lock_irq(&ev_file->lock);
2577 if (ev_file->is_destroyed)
2578 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2579 else if (!list_empty(&ev_file->event_list))
2580 pollflags = EPOLLIN | EPOLLRDNORM;
2581 spin_unlock_irq(&ev_file->lock);
2582
2583 return pollflags;
2584}
2585
2586static void devx_free_subscription(struct rcu_head *rcu)
2587{
2588 struct devx_event_subscription *event_sub =
2589 container_of(rcu, struct devx_event_subscription, rcu);
2590
2591 if (event_sub->eventfd)
2592 eventfd_ctx_put(event_sub->eventfd);
2593 uverbs_uobject_put(&event_sub->ev_file->uobj);
2594 kfree(event_sub);
2595}
2596
2597static const struct file_operations devx_async_event_fops = {
2598 .owner = THIS_MODULE,
2599 .read = devx_async_event_read,
2600 .poll = devx_async_event_poll,
2601 .release = uverbs_uobject_fd_release,
2602 .llseek = no_llseek,
2603};
2604
2605static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2606 enum rdma_remove_reason why)
2607{
2608 struct devx_async_cmd_event_file *comp_ev_file =
2609 container_of(uobj, struct devx_async_cmd_event_file,
2610 uobj);
2611 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2612 struct devx_async_data *entry, *tmp;
2613
2614 spin_lock_irq(&ev_queue->lock);
2615 ev_queue->is_destroyed = 1;
2616 spin_unlock_irq(&ev_queue->lock);
2617 wake_up_interruptible(&ev_queue->poll_wait);
2618
2619 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2620
2621 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2622 list_for_each_entry_safe(entry, tmp,
2623 &comp_ev_file->ev_queue.event_list, list) {
2624 list_del(&entry->list);
2625 kvfree(entry);
2626 }
2627 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2628};
2629
2630static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2631 enum rdma_remove_reason why)
2632{
2633 struct devx_async_event_file *ev_file =
2634 container_of(uobj, struct devx_async_event_file,
2635 uobj);
2636 struct devx_event_subscription *event_sub, *event_sub_tmp;
2637 struct mlx5_ib_dev *dev = ev_file->dev;
2638
2639 spin_lock_irq(&ev_file->lock);
2640 ev_file->is_destroyed = 1;
2641
2642 /* free the pending events allocation */
2643 if (ev_file->omit_data) {
2644 struct devx_event_subscription *event_sub, *tmp;
2645
2646 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2647 event_list)
2648 list_del_init(&event_sub->event_list);
2649
2650 } else {
2651 struct devx_async_event_data *entry, *tmp;
2652
2653 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2654 list) {
2655 list_del(&entry->list);
2656 kfree(entry);
2657 }
2658 }
2659
2660 spin_unlock_irq(&ev_file->lock);
2661 wake_up_interruptible(&ev_file->poll_wait);
2662
2663 mutex_lock(&dev->devx_event_table.event_xa_lock);
2664 /* delete the subscriptions which are related to this FD */
2665 list_for_each_entry_safe(event_sub, event_sub_tmp,
2666 &ev_file->subscribed_events_list, file_list) {
2667 devx_cleanup_subscription(dev, event_sub);
2668 list_del_rcu(&event_sub->file_list);
2669 /* subscription may not be used by the read API any more */
2670 call_rcu(&event_sub->rcu, devx_free_subscription);
2671 }
2672 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2673
2674 put_device(&dev->ib_dev.dev);
2675};
2676
2677DECLARE_UVERBS_NAMED_METHOD(
2678 MLX5_IB_METHOD_DEVX_UMEM_REG,
2679 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2680 MLX5_IB_OBJECT_DEVX_UMEM,
2681 UVERBS_ACCESS_NEW,
2682 UA_MANDATORY),
2683 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2684 UVERBS_ATTR_TYPE(u64),
2685 UA_MANDATORY),
2686 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2687 UVERBS_ATTR_TYPE(u64),
2688 UA_MANDATORY),
2689 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2690 enum ib_access_flags),
2691 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2692 UVERBS_ATTR_TYPE(u32),
2693 UA_MANDATORY));
2694
2695DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2696 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2697 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2698 MLX5_IB_OBJECT_DEVX_UMEM,
2699 UVERBS_ACCESS_DESTROY,
2700 UA_MANDATORY));
2701
2702DECLARE_UVERBS_NAMED_METHOD(
2703 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2704 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2705 UVERBS_ATTR_TYPE(u32),
2706 UA_MANDATORY),
2707 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2708 UVERBS_ATTR_TYPE(u32),
2709 UA_MANDATORY));
2710
2711DECLARE_UVERBS_NAMED_METHOD(
2712 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2713 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2714 UVERBS_ATTR_TYPE(u32),
2715 UA_MANDATORY),
2716 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2717 UVERBS_ATTR_TYPE(u32),
2718 UA_MANDATORY));
2719
2720DECLARE_UVERBS_NAMED_METHOD(
2721 MLX5_IB_METHOD_DEVX_OTHER,
2722 UVERBS_ATTR_PTR_IN(
2723 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2724 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2725 UA_MANDATORY,
2726 UA_ALLOC_AND_COPY),
2727 UVERBS_ATTR_PTR_OUT(
2728 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2729 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2730 UA_MANDATORY));
2731
2732DECLARE_UVERBS_NAMED_METHOD(
2733 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2734 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2735 MLX5_IB_OBJECT_DEVX_OBJ,
2736 UVERBS_ACCESS_NEW,
2737 UA_MANDATORY),
2738 UVERBS_ATTR_PTR_IN(
2739 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2740 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2741 UA_MANDATORY,
2742 UA_ALLOC_AND_COPY),
2743 UVERBS_ATTR_PTR_OUT(
2744 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2745 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2746 UA_MANDATORY));
2747
2748DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2749 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2750 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2751 MLX5_IB_OBJECT_DEVX_OBJ,
2752 UVERBS_ACCESS_DESTROY,
2753 UA_MANDATORY));
2754
2755DECLARE_UVERBS_NAMED_METHOD(
2756 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2757 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2758 UVERBS_IDR_ANY_OBJECT,
2759 UVERBS_ACCESS_WRITE,
2760 UA_MANDATORY),
2761 UVERBS_ATTR_PTR_IN(
2762 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2763 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2764 UA_MANDATORY,
2765 UA_ALLOC_AND_COPY),
2766 UVERBS_ATTR_PTR_OUT(
2767 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2768 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2769 UA_MANDATORY));
2770
2771DECLARE_UVERBS_NAMED_METHOD(
2772 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2773 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2774 UVERBS_IDR_ANY_OBJECT,
2775 UVERBS_ACCESS_READ,
2776 UA_MANDATORY),
2777 UVERBS_ATTR_PTR_IN(
2778 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2779 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2780 UA_MANDATORY,
2781 UA_ALLOC_AND_COPY),
2782 UVERBS_ATTR_PTR_OUT(
2783 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2784 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2785 UA_MANDATORY));
2786
2787DECLARE_UVERBS_NAMED_METHOD(
2788 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2789 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2790 UVERBS_IDR_ANY_OBJECT,
2791 UVERBS_ACCESS_READ,
2792 UA_MANDATORY),
2793 UVERBS_ATTR_PTR_IN(
2794 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2795 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2796 UA_MANDATORY,
2797 UA_ALLOC_AND_COPY),
2798 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2799 u16, UA_MANDATORY),
2800 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2801 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2802 UVERBS_ACCESS_READ,
2803 UA_MANDATORY),
2804 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2805 UVERBS_ATTR_TYPE(u64),
2806 UA_MANDATORY));
2807
2808DECLARE_UVERBS_NAMED_METHOD(
2809 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2810 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2811 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2812 UVERBS_ACCESS_READ,
2813 UA_MANDATORY),
2814 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2815 MLX5_IB_OBJECT_DEVX_OBJ,
2816 UVERBS_ACCESS_READ,
2817 UA_OPTIONAL),
2818 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2819 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2820 UA_MANDATORY,
2821 UA_ALLOC_AND_COPY),
2822 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2823 UVERBS_ATTR_TYPE(u64),
2824 UA_OPTIONAL),
2825 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2826 UVERBS_ATTR_TYPE(u32),
2827 UA_OPTIONAL));
2828
2829DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2830 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2831 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2832 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2833 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
2834
2835DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
2836 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
2837 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
2838 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
2839 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
2840 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
2841 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
2842
2843DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
2844 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
2845 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
2846 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
2847
2848
2849DECLARE_UVERBS_NAMED_METHOD(
2850 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
2851 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
2852 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2853 UVERBS_ACCESS_NEW,
2854 UA_MANDATORY));
2855
2856DECLARE_UVERBS_NAMED_OBJECT(
2857 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2858 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
2859 devx_async_cmd_event_destroy_uobj,
2860 &devx_async_cmd_event_fops, "[devx_async_cmd]",
2861 O_RDONLY),
2862 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
2863
2864DECLARE_UVERBS_NAMED_METHOD(
2865 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
2866 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
2867 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2868 UVERBS_ACCESS_NEW,
2869 UA_MANDATORY),
2870 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
2871 enum mlx5_ib_uapi_devx_create_event_channel_flags,
2872 UA_MANDATORY));
2873
2874DECLARE_UVERBS_NAMED_OBJECT(
2875 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2876 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
2877 devx_async_event_destroy_uobj,
2878 &devx_async_event_fops, "[devx_async_event]",
2879 O_RDONLY),
2880 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
2881
2882static bool devx_is_supported(struct ib_device *device)
2883{
2884 struct mlx5_ib_dev *dev = to_mdev(device);
2885
2886 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
2887}
2888
2889const struct uapi_definition mlx5_ib_devx_defs[] = {
2890 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2891 MLX5_IB_OBJECT_DEVX,
2892 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2893 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2894 MLX5_IB_OBJECT_DEVX_OBJ,
2895 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2896 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2897 MLX5_IB_OBJECT_DEVX_UMEM,
2898 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2899 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2900 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2901 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2902 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2903 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2904 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2905 {},
2906};
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