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1 | /** | |
2 | * OV519 driver | |
3 | * | |
4 | * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr) | |
5 | * | |
6 | * This module is adapted from the ov51x-jpeg package, which itself | |
7 | * was adapted from the ov511 driver. | |
8 | * | |
9 | * Original copyright for the ov511 driver is: | |
10 | * | |
11 | * Copyright (c) 1999-2004 Mark W. McClelland | |
12 | * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach | |
13 | * | |
14 | * ov51x-jpeg original copyright is: | |
15 | * | |
16 | * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org> | |
17 | * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com> | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or modify | |
20 | * it under the terms of the GNU General Public License as published by | |
21 | * the Free Software Foundation; either version 2 of the License, or | |
22 | * any later version. | |
23 | * | |
24 | * This program is distributed in the hope that it will be useful, | |
25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
27 | * GNU General Public License for more details. | |
28 | * | |
29 | * You should have received a copy of the GNU General Public License | |
30 | * along with this program; if not, write to the Free Software | |
31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
32 | * | |
33 | */ | |
34 | #define MODULE_NAME "ov519" | |
35 | ||
36 | #include "gspca.h" | |
37 | ||
38 | MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); | |
39 | MODULE_DESCRIPTION("OV519 USB Camera Driver"); | |
40 | MODULE_LICENSE("GPL"); | |
41 | ||
42 | /* global parameters */ | |
43 | static int frame_rate; | |
44 | ||
45 | /* Number of times to retry a failed I2C transaction. Increase this if you | |
46 | * are getting "Failed to read sensor ID..." */ | |
47 | static int i2c_detect_tries = 10; | |
48 | ||
49 | /* ov519 device descriptor */ | |
50 | struct sd { | |
51 | struct gspca_dev gspca_dev; /* !! must be the first item */ | |
52 | ||
53 | __u8 packet_nr; | |
54 | ||
55 | char bridge; | |
56 | #define BRIDGE_OV511 0 | |
57 | #define BRIDGE_OV511PLUS 1 | |
58 | #define BRIDGE_OV518 2 | |
59 | #define BRIDGE_OV518PLUS 3 | |
60 | #define BRIDGE_OV519 4 | |
61 | #define BRIDGE_MASK 7 | |
62 | ||
63 | char invert_led; | |
64 | #define BRIDGE_INVERT_LED 8 | |
65 | ||
66 | /* Determined by sensor type */ | |
67 | __u8 sif; | |
68 | ||
69 | __u8 brightness; | |
70 | __u8 contrast; | |
71 | __u8 colors; | |
72 | __u8 hflip; | |
73 | __u8 vflip; | |
74 | __u8 autobrightness; | |
75 | __u8 freq; | |
76 | ||
77 | __u8 stopped; /* Streaming is temporarily paused */ | |
78 | ||
79 | __u8 frame_rate; /* current Framerate */ | |
80 | __u8 clockdiv; /* clockdiv override */ | |
81 | ||
82 | char sensor; /* Type of image sensor chip (SEN_*) */ | |
83 | #define SEN_UNKNOWN 0 | |
84 | #define SEN_OV6620 1 | |
85 | #define SEN_OV6630 2 | |
86 | #define SEN_OV66308AF 3 | |
87 | #define SEN_OV7610 4 | |
88 | #define SEN_OV7620 5 | |
89 | #define SEN_OV7640 6 | |
90 | #define SEN_OV7670 7 | |
91 | #define SEN_OV76BE 8 | |
92 | #define SEN_OV8610 9 | |
93 | }; | |
94 | ||
95 | /* V4L2 controls supported by the driver */ | |
96 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); | |
97 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); | |
98 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val); | |
99 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val); | |
100 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val); | |
101 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val); | |
102 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val); | |
103 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val); | |
104 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val); | |
105 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val); | |
106 | static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val); | |
107 | static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val); | |
108 | static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val); | |
109 | static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val); | |
110 | static void setbrightness(struct gspca_dev *gspca_dev); | |
111 | static void setcontrast(struct gspca_dev *gspca_dev); | |
112 | static void setcolors(struct gspca_dev *gspca_dev); | |
113 | static void setautobrightness(struct sd *sd); | |
114 | static void setfreq(struct sd *sd); | |
115 | ||
116 | static const struct ctrl sd_ctrls[] = { | |
117 | { | |
118 | { | |
119 | .id = V4L2_CID_BRIGHTNESS, | |
120 | .type = V4L2_CTRL_TYPE_INTEGER, | |
121 | .name = "Brightness", | |
122 | .minimum = 0, | |
123 | .maximum = 255, | |
124 | .step = 1, | |
125 | #define BRIGHTNESS_DEF 127 | |
126 | .default_value = BRIGHTNESS_DEF, | |
127 | }, | |
128 | .set = sd_setbrightness, | |
129 | .get = sd_getbrightness, | |
130 | }, | |
131 | { | |
132 | { | |
133 | .id = V4L2_CID_CONTRAST, | |
134 | .type = V4L2_CTRL_TYPE_INTEGER, | |
135 | .name = "Contrast", | |
136 | .minimum = 0, | |
137 | .maximum = 255, | |
138 | .step = 1, | |
139 | #define CONTRAST_DEF 127 | |
140 | .default_value = CONTRAST_DEF, | |
141 | }, | |
142 | .set = sd_setcontrast, | |
143 | .get = sd_getcontrast, | |
144 | }, | |
145 | { | |
146 | { | |
147 | .id = V4L2_CID_SATURATION, | |
148 | .type = V4L2_CTRL_TYPE_INTEGER, | |
149 | .name = "Color", | |
150 | .minimum = 0, | |
151 | .maximum = 255, | |
152 | .step = 1, | |
153 | #define COLOR_DEF 127 | |
154 | .default_value = COLOR_DEF, | |
155 | }, | |
156 | .set = sd_setcolors, | |
157 | .get = sd_getcolors, | |
158 | }, | |
159 | /* The flip controls work with ov7670 only */ | |
160 | #define HFLIP_IDX 3 | |
161 | { | |
162 | { | |
163 | .id = V4L2_CID_HFLIP, | |
164 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
165 | .name = "Mirror", | |
166 | .minimum = 0, | |
167 | .maximum = 1, | |
168 | .step = 1, | |
169 | #define HFLIP_DEF 0 | |
170 | .default_value = HFLIP_DEF, | |
171 | }, | |
172 | .set = sd_sethflip, | |
173 | .get = sd_gethflip, | |
174 | }, | |
175 | #define VFLIP_IDX 4 | |
176 | { | |
177 | { | |
178 | .id = V4L2_CID_VFLIP, | |
179 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
180 | .name = "Vflip", | |
181 | .minimum = 0, | |
182 | .maximum = 1, | |
183 | .step = 1, | |
184 | #define VFLIP_DEF 0 | |
185 | .default_value = VFLIP_DEF, | |
186 | }, | |
187 | .set = sd_setvflip, | |
188 | .get = sd_getvflip, | |
189 | }, | |
190 | #define AUTOBRIGHT_IDX 5 | |
191 | { | |
192 | { | |
193 | .id = V4L2_CID_AUTOBRIGHTNESS, | |
194 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
195 | .name = "Auto Brightness", | |
196 | .minimum = 0, | |
197 | .maximum = 1, | |
198 | .step = 1, | |
199 | #define AUTOBRIGHT_DEF 1 | |
200 | .default_value = AUTOBRIGHT_DEF, | |
201 | }, | |
202 | .set = sd_setautobrightness, | |
203 | .get = sd_getautobrightness, | |
204 | }, | |
205 | #define FREQ_IDX 6 | |
206 | { | |
207 | { | |
208 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | |
209 | .type = V4L2_CTRL_TYPE_MENU, | |
210 | .name = "Light frequency filter", | |
211 | .minimum = 0, | |
212 | .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */ | |
213 | .step = 1, | |
214 | #define FREQ_DEF 0 | |
215 | .default_value = FREQ_DEF, | |
216 | }, | |
217 | .set = sd_setfreq, | |
218 | .get = sd_getfreq, | |
219 | }, | |
220 | #define OV7670_FREQ_IDX 7 | |
221 | { | |
222 | { | |
223 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | |
224 | .type = V4L2_CTRL_TYPE_MENU, | |
225 | .name = "Light frequency filter", | |
226 | .minimum = 0, | |
227 | .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */ | |
228 | .step = 1, | |
229 | #define OV7670_FREQ_DEF 3 | |
230 | .default_value = OV7670_FREQ_DEF, | |
231 | }, | |
232 | .set = sd_setfreq, | |
233 | .get = sd_getfreq, | |
234 | }, | |
235 | }; | |
236 | ||
237 | static const struct v4l2_pix_format ov519_vga_mode[] = { | |
238 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
239 | .bytesperline = 320, | |
240 | .sizeimage = 320 * 240 * 3 / 8 + 590, | |
241 | .colorspace = V4L2_COLORSPACE_JPEG, | |
242 | .priv = 1}, | |
243 | {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
244 | .bytesperline = 640, | |
245 | .sizeimage = 640 * 480 * 3 / 8 + 590, | |
246 | .colorspace = V4L2_COLORSPACE_JPEG, | |
247 | .priv = 0}, | |
248 | }; | |
249 | static const struct v4l2_pix_format ov519_sif_mode[] = { | |
250 | {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
251 | .bytesperline = 160, | |
252 | .sizeimage = 160 * 120 * 3 / 8 + 590, | |
253 | .colorspace = V4L2_COLORSPACE_JPEG, | |
254 | .priv = 3}, | |
255 | {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
256 | .bytesperline = 176, | |
257 | .sizeimage = 176 * 144 * 3 / 8 + 590, | |
258 | .colorspace = V4L2_COLORSPACE_JPEG, | |
259 | .priv = 1}, | |
260 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
261 | .bytesperline = 320, | |
262 | .sizeimage = 320 * 240 * 3 / 8 + 590, | |
263 | .colorspace = V4L2_COLORSPACE_JPEG, | |
264 | .priv = 2}, | |
265 | {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
266 | .bytesperline = 352, | |
267 | .sizeimage = 352 * 288 * 3 / 8 + 590, | |
268 | .colorspace = V4L2_COLORSPACE_JPEG, | |
269 | .priv = 0}, | |
270 | }; | |
271 | ||
272 | /* Note some of the sizeimage values for the ov511 / ov518 may seem | |
273 | larger then necessary, however they need to be this big as the ov511 / | |
274 | ov518 always fills the entire isoc frame, using 0 padding bytes when | |
275 | it doesn't have any data. So with low framerates the amount of data | |
276 | transfered can become quite large (libv4l will remove all the 0 padding | |
277 | in userspace). */ | |
278 | static const struct v4l2_pix_format ov518_vga_mode[] = { | |
279 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
280 | .bytesperline = 320, | |
281 | .sizeimage = 320 * 240 * 3, | |
282 | .colorspace = V4L2_COLORSPACE_JPEG, | |
283 | .priv = 1}, | |
284 | {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
285 | .bytesperline = 640, | |
286 | .sizeimage = 640 * 480 * 2, | |
287 | .colorspace = V4L2_COLORSPACE_JPEG, | |
288 | .priv = 0}, | |
289 | }; | |
290 | static const struct v4l2_pix_format ov518_sif_mode[] = { | |
291 | {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
292 | .bytesperline = 160, | |
293 | .sizeimage = 70000, | |
294 | .colorspace = V4L2_COLORSPACE_JPEG, | |
295 | .priv = 3}, | |
296 | {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
297 | .bytesperline = 176, | |
298 | .sizeimage = 70000, | |
299 | .colorspace = V4L2_COLORSPACE_JPEG, | |
300 | .priv = 1}, | |
301 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
302 | .bytesperline = 320, | |
303 | .sizeimage = 320 * 240 * 3, | |
304 | .colorspace = V4L2_COLORSPACE_JPEG, | |
305 | .priv = 2}, | |
306 | {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
307 | .bytesperline = 352, | |
308 | .sizeimage = 352 * 288 * 3, | |
309 | .colorspace = V4L2_COLORSPACE_JPEG, | |
310 | .priv = 0}, | |
311 | }; | |
312 | ||
313 | static const struct v4l2_pix_format ov511_vga_mode[] = { | |
314 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
315 | .bytesperline = 320, | |
316 | .sizeimage = 320 * 240 * 3, | |
317 | .colorspace = V4L2_COLORSPACE_JPEG, | |
318 | .priv = 1}, | |
319 | {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
320 | .bytesperline = 640, | |
321 | .sizeimage = 640 * 480 * 2, | |
322 | .colorspace = V4L2_COLORSPACE_JPEG, | |
323 | .priv = 0}, | |
324 | }; | |
325 | static const struct v4l2_pix_format ov511_sif_mode[] = { | |
326 | {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
327 | .bytesperline = 160, | |
328 | .sizeimage = 70000, | |
329 | .colorspace = V4L2_COLORSPACE_JPEG, | |
330 | .priv = 3}, | |
331 | {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
332 | .bytesperline = 176, | |
333 | .sizeimage = 70000, | |
334 | .colorspace = V4L2_COLORSPACE_JPEG, | |
335 | .priv = 1}, | |
336 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
337 | .bytesperline = 320, | |
338 | .sizeimage = 320 * 240 * 3, | |
339 | .colorspace = V4L2_COLORSPACE_JPEG, | |
340 | .priv = 2}, | |
341 | {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
342 | .bytesperline = 352, | |
343 | .sizeimage = 352 * 288 * 3, | |
344 | .colorspace = V4L2_COLORSPACE_JPEG, | |
345 | .priv = 0}, | |
346 | }; | |
347 | ||
348 | /* Registers common to OV511 / OV518 */ | |
349 | #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ | |
350 | #define R51x_SYS_RESET 0x50 | |
351 | /* Reset type flags */ | |
352 | #define OV511_RESET_OMNICE 0x08 | |
353 | #define R51x_SYS_INIT 0x53 | |
354 | #define R51x_SYS_SNAP 0x52 | |
355 | #define R51x_SYS_CUST_ID 0x5F | |
356 | #define R51x_COMP_LUT_BEGIN 0x80 | |
357 | ||
358 | /* OV511 Camera interface register numbers */ | |
359 | #define R511_CAM_DELAY 0x10 | |
360 | #define R511_CAM_EDGE 0x11 | |
361 | #define R511_CAM_PXCNT 0x12 | |
362 | #define R511_CAM_LNCNT 0x13 | |
363 | #define R511_CAM_PXDIV 0x14 | |
364 | #define R511_CAM_LNDIV 0x15 | |
365 | #define R511_CAM_UV_EN 0x16 | |
366 | #define R511_CAM_LINE_MODE 0x17 | |
367 | #define R511_CAM_OPTS 0x18 | |
368 | ||
369 | #define R511_SNAP_FRAME 0x19 | |
370 | #define R511_SNAP_PXCNT 0x1A | |
371 | #define R511_SNAP_LNCNT 0x1B | |
372 | #define R511_SNAP_PXDIV 0x1C | |
373 | #define R511_SNAP_LNDIV 0x1D | |
374 | #define R511_SNAP_UV_EN 0x1E | |
375 | #define R511_SNAP_UV_EN 0x1E | |
376 | #define R511_SNAP_OPTS 0x1F | |
377 | ||
378 | #define R511_DRAM_FLOW_CTL 0x20 | |
379 | #define R511_FIFO_OPTS 0x31 | |
380 | #define R511_I2C_CTL 0x40 | |
381 | #define R511_SYS_LED_CTL 0x55 /* OV511+ only */ | |
382 | #define R511_COMP_EN 0x78 | |
383 | #define R511_COMP_LUT_EN 0x79 | |
384 | ||
385 | /* OV518 Camera interface register numbers */ | |
386 | #define R518_GPIO_OUT 0x56 /* OV518(+) only */ | |
387 | #define R518_GPIO_CTL 0x57 /* OV518(+) only */ | |
388 | ||
389 | /* OV519 Camera interface register numbers */ | |
390 | #define OV519_R10_H_SIZE 0x10 | |
391 | #define OV519_R11_V_SIZE 0x11 | |
392 | #define OV519_R12_X_OFFSETL 0x12 | |
393 | #define OV519_R13_X_OFFSETH 0x13 | |
394 | #define OV519_R14_Y_OFFSETL 0x14 | |
395 | #define OV519_R15_Y_OFFSETH 0x15 | |
396 | #define OV519_R16_DIVIDER 0x16 | |
397 | #define OV519_R20_DFR 0x20 | |
398 | #define OV519_R25_FORMAT 0x25 | |
399 | ||
400 | /* OV519 System Controller register numbers */ | |
401 | #define OV519_SYS_RESET1 0x51 | |
402 | #define OV519_SYS_EN_CLK1 0x54 | |
403 | ||
404 | #define OV519_GPIO_DATA_OUT0 0x71 | |
405 | #define OV519_GPIO_IO_CTRL0 0x72 | |
406 | ||
407 | #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */ | |
408 | ||
409 | /* I2C registers */ | |
410 | #define R51x_I2C_W_SID 0x41 | |
411 | #define R51x_I2C_SADDR_3 0x42 | |
412 | #define R51x_I2C_SADDR_2 0x43 | |
413 | #define R51x_I2C_R_SID 0x44 | |
414 | #define R51x_I2C_DATA 0x45 | |
415 | #define R518_I2C_CTL 0x47 /* OV518(+) only */ | |
416 | ||
417 | /* I2C ADDRESSES */ | |
418 | #define OV7xx0_SID 0x42 | |
419 | #define OV8xx0_SID 0xa0 | |
420 | #define OV6xx0_SID 0xc0 | |
421 | ||
422 | /* OV7610 registers */ | |
423 | #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */ | |
424 | #define OV7610_REG_BLUE 0x01 /* blue channel balance */ | |
425 | #define OV7610_REG_RED 0x02 /* red channel balance */ | |
426 | #define OV7610_REG_SAT 0x03 /* saturation */ | |
427 | #define OV8610_REG_HUE 0x04 /* 04 reserved */ | |
428 | #define OV7610_REG_CNT 0x05 /* Y contrast */ | |
429 | #define OV7610_REG_BRT 0x06 /* Y brightness */ | |
430 | #define OV7610_REG_COM_C 0x14 /* misc common regs */ | |
431 | #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */ | |
432 | #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */ | |
433 | #define OV7610_REG_COM_I 0x29 /* misc settings */ | |
434 | ||
435 | /* OV7670 registers */ | |
436 | #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ | |
437 | #define OV7670_REG_BLUE 0x01 /* blue gain */ | |
438 | #define OV7670_REG_RED 0x02 /* red gain */ | |
439 | #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ | |
440 | #define OV7670_REG_COM1 0x04 /* Control 1 */ | |
441 | #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */ | |
442 | #define OV7670_REG_COM3 0x0c /* Control 3 */ | |
443 | #define OV7670_REG_COM4 0x0d /* Control 4 */ | |
444 | #define OV7670_REG_COM5 0x0e /* All "reserved" */ | |
445 | #define OV7670_REG_COM6 0x0f /* Control 6 */ | |
446 | #define OV7670_REG_AECH 0x10 /* More bits of AEC value */ | |
447 | #define OV7670_REG_CLKRC 0x11 /* Clock control */ | |
448 | #define OV7670_REG_COM7 0x12 /* Control 7 */ | |
449 | #define OV7670_COM7_FMT_VGA 0x00 | |
450 | #define OV7670_COM7_YUV 0x00 /* YUV */ | |
451 | #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */ | |
452 | #define OV7670_COM7_FMT_MASK 0x38 | |
453 | #define OV7670_COM7_RESET 0x80 /* Register reset */ | |
454 | #define OV7670_REG_COM8 0x13 /* Control 8 */ | |
455 | #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */ | |
456 | #define OV7670_COM8_AWB 0x02 /* White balance enable */ | |
457 | #define OV7670_COM8_AGC 0x04 /* Auto gain enable */ | |
458 | #define OV7670_COM8_BFILT 0x20 /* Band filter enable */ | |
459 | #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */ | |
460 | #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ | |
461 | #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */ | |
462 | #define OV7670_REG_COM10 0x15 /* Control 10 */ | |
463 | #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */ | |
464 | #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */ | |
465 | #define OV7670_REG_VSTART 0x19 /* Vert start high bits */ | |
466 | #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */ | |
467 | #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */ | |
468 | #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */ | |
469 | #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */ | |
470 | #define OV7670_REG_AEW 0x24 /* AGC upper limit */ | |
471 | #define OV7670_REG_AEB 0x25 /* AGC lower limit */ | |
472 | #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */ | |
473 | #define OV7670_REG_HREF 0x32 /* HREF pieces */ | |
474 | #define OV7670_REG_TSLB 0x3a /* lots of stuff */ | |
475 | #define OV7670_REG_COM11 0x3b /* Control 11 */ | |
476 | #define OV7670_COM11_EXP 0x02 | |
477 | #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ | |
478 | #define OV7670_REG_COM12 0x3c /* Control 12 */ | |
479 | #define OV7670_REG_COM13 0x3d /* Control 13 */ | |
480 | #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */ | |
481 | #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */ | |
482 | #define OV7670_REG_COM14 0x3e /* Control 14 */ | |
483 | #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */ | |
484 | #define OV7670_REG_COM15 0x40 /* Control 15 */ | |
485 | #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */ | |
486 | #define OV7670_REG_COM16 0x41 /* Control 16 */ | |
487 | #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */ | |
488 | #define OV7670_REG_BRIGHT 0x55 /* Brightness */ | |
489 | #define OV7670_REG_CONTRAS 0x56 /* Contrast control */ | |
490 | #define OV7670_REG_GFIX 0x69 /* Fix gain control */ | |
491 | #define OV7670_REG_RGB444 0x8c /* RGB 444 control */ | |
492 | #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ | |
493 | #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ | |
494 | #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */ | |
495 | #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ | |
496 | #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ | |
497 | #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ | |
498 | #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ | |
499 | #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ | |
500 | #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */ | |
501 | ||
502 | struct ov_regvals { | |
503 | __u8 reg; | |
504 | __u8 val; | |
505 | }; | |
506 | struct ov_i2c_regvals { | |
507 | __u8 reg; | |
508 | __u8 val; | |
509 | }; | |
510 | ||
511 | static const struct ov_i2c_regvals norm_6x20[] = { | |
512 | { 0x12, 0x80 }, /* reset */ | |
513 | { 0x11, 0x01 }, | |
514 | { 0x03, 0x60 }, | |
515 | { 0x05, 0x7f }, /* For when autoadjust is off */ | |
516 | { 0x07, 0xa8 }, | |
517 | /* The ratio of 0x0c and 0x0d controls the white point */ | |
518 | { 0x0c, 0x24 }, | |
519 | { 0x0d, 0x24 }, | |
520 | { 0x0f, 0x15 }, /* COMS */ | |
521 | { 0x10, 0x75 }, /* AEC Exposure time */ | |
522 | { 0x12, 0x24 }, /* Enable AGC */ | |
523 | { 0x14, 0x04 }, | |
524 | /* 0x16: 0x06 helps frame stability with moving objects */ | |
525 | { 0x16, 0x06 }, | |
526 | /* { 0x20, 0x30 }, * Aperture correction enable */ | |
527 | { 0x26, 0xb2 }, /* BLC enable */ | |
528 | /* 0x28: 0x05 Selects RGB format if RGB on */ | |
529 | { 0x28, 0x05 }, | |
530 | { 0x2a, 0x04 }, /* Disable framerate adjust */ | |
531 | /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */ | |
532 | { 0x2d, 0x85 }, | |
533 | { 0x33, 0xa0 }, /* Color Processing Parameter */ | |
534 | { 0x34, 0xd2 }, /* Max A/D range */ | |
535 | { 0x38, 0x8b }, | |
536 | { 0x39, 0x40 }, | |
537 | ||
538 | { 0x3c, 0x39 }, /* Enable AEC mode changing */ | |
539 | { 0x3c, 0x3c }, /* Change AEC mode */ | |
540 | { 0x3c, 0x24 }, /* Disable AEC mode changing */ | |
541 | ||
542 | { 0x3d, 0x80 }, | |
543 | /* These next two registers (0x4a, 0x4b) are undocumented. | |
544 | * They control the color balance */ | |
545 | { 0x4a, 0x80 }, | |
546 | { 0x4b, 0x80 }, | |
547 | { 0x4d, 0xd2 }, /* This reduces noise a bit */ | |
548 | { 0x4e, 0xc1 }, | |
549 | { 0x4f, 0x04 }, | |
550 | /* Do 50-53 have any effect? */ | |
551 | /* Toggle 0x12[2] off and on here? */ | |
552 | }; | |
553 | ||
554 | static const struct ov_i2c_regvals norm_6x30[] = { | |
555 | { 0x12, 0x80 }, /* Reset */ | |
556 | { 0x00, 0x1f }, /* Gain */ | |
557 | { 0x01, 0x99 }, /* Blue gain */ | |
558 | { 0x02, 0x7c }, /* Red gain */ | |
559 | { 0x03, 0xc0 }, /* Saturation */ | |
560 | { 0x05, 0x0a }, /* Contrast */ | |
561 | { 0x06, 0x95 }, /* Brightness */ | |
562 | { 0x07, 0x2d }, /* Sharpness */ | |
563 | { 0x0c, 0x20 }, | |
564 | { 0x0d, 0x20 }, | |
565 | { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */ | |
566 | { 0x0f, 0x05 }, | |
567 | { 0x10, 0x9a }, | |
568 | { 0x11, 0x00 }, /* Pixel clock = fastest */ | |
569 | { 0x12, 0x24 }, /* Enable AGC and AWB */ | |
570 | { 0x13, 0x21 }, | |
571 | { 0x14, 0x80 }, | |
572 | { 0x15, 0x01 }, | |
573 | { 0x16, 0x03 }, | |
574 | { 0x17, 0x38 }, | |
575 | { 0x18, 0xea }, | |
576 | { 0x19, 0x04 }, | |
577 | { 0x1a, 0x93 }, | |
578 | { 0x1b, 0x00 }, | |
579 | { 0x1e, 0xc4 }, | |
580 | { 0x1f, 0x04 }, | |
581 | { 0x20, 0x20 }, | |
582 | { 0x21, 0x10 }, | |
583 | { 0x22, 0x88 }, | |
584 | { 0x23, 0xc0 }, /* Crystal circuit power level */ | |
585 | { 0x25, 0x9a }, /* Increase AEC black ratio */ | |
586 | { 0x26, 0xb2 }, /* BLC enable */ | |
587 | { 0x27, 0xa2 }, | |
588 | { 0x28, 0x00 }, | |
589 | { 0x29, 0x00 }, | |
590 | { 0x2a, 0x84 }, /* 60 Hz power */ | |
591 | { 0x2b, 0xa8 }, /* 60 Hz power */ | |
592 | { 0x2c, 0xa0 }, | |
593 | { 0x2d, 0x95 }, /* Enable auto-brightness */ | |
594 | { 0x2e, 0x88 }, | |
595 | { 0x33, 0x26 }, | |
596 | { 0x34, 0x03 }, | |
597 | { 0x36, 0x8f }, | |
598 | { 0x37, 0x80 }, | |
599 | { 0x38, 0x83 }, | |
600 | { 0x39, 0x80 }, | |
601 | { 0x3a, 0x0f }, | |
602 | { 0x3b, 0x3c }, | |
603 | { 0x3c, 0x1a }, | |
604 | { 0x3d, 0x80 }, | |
605 | { 0x3e, 0x80 }, | |
606 | { 0x3f, 0x0e }, | |
607 | { 0x40, 0x00 }, /* White bal */ | |
608 | { 0x41, 0x00 }, /* White bal */ | |
609 | { 0x42, 0x80 }, | |
610 | { 0x43, 0x3f }, /* White bal */ | |
611 | { 0x44, 0x80 }, | |
612 | { 0x45, 0x20 }, | |
613 | { 0x46, 0x20 }, | |
614 | { 0x47, 0x80 }, | |
615 | { 0x48, 0x7f }, | |
616 | { 0x49, 0x00 }, | |
617 | { 0x4a, 0x00 }, | |
618 | { 0x4b, 0x80 }, | |
619 | { 0x4c, 0xd0 }, | |
620 | { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ | |
621 | { 0x4e, 0x40 }, | |
622 | { 0x4f, 0x07 }, /* UV avg., col. killer: max */ | |
623 | { 0x50, 0xff }, | |
624 | { 0x54, 0x23 }, /* Max AGC gain: 18dB */ | |
625 | { 0x55, 0xff }, | |
626 | { 0x56, 0x12 }, | |
627 | { 0x57, 0x81 }, | |
628 | { 0x58, 0x75 }, | |
629 | { 0x59, 0x01 }, /* AGC dark current comp.: +1 */ | |
630 | { 0x5a, 0x2c }, | |
631 | { 0x5b, 0x0f }, /* AWB chrominance levels */ | |
632 | { 0x5c, 0x10 }, | |
633 | { 0x3d, 0x80 }, | |
634 | { 0x27, 0xa6 }, | |
635 | { 0x12, 0x20 }, /* Toggle AWB */ | |
636 | { 0x12, 0x24 }, | |
637 | }; | |
638 | ||
639 | /* Lawrence Glaister <lg@jfm.bc.ca> reports: | |
640 | * | |
641 | * Register 0x0f in the 7610 has the following effects: | |
642 | * | |
643 | * 0x85 (AEC method 1): Best overall, good contrast range | |
644 | * 0x45 (AEC method 2): Very overexposed | |
645 | * 0xa5 (spec sheet default): Ok, but the black level is | |
646 | * shifted resulting in loss of contrast | |
647 | * 0x05 (old driver setting): very overexposed, too much | |
648 | * contrast | |
649 | */ | |
650 | static const struct ov_i2c_regvals norm_7610[] = { | |
651 | { 0x10, 0xff }, | |
652 | { 0x16, 0x06 }, | |
653 | { 0x28, 0x24 }, | |
654 | { 0x2b, 0xac }, | |
655 | { 0x12, 0x00 }, | |
656 | { 0x38, 0x81 }, | |
657 | { 0x28, 0x24 }, /* 0c */ | |
658 | { 0x0f, 0x85 }, /* lg's setting */ | |
659 | { 0x15, 0x01 }, | |
660 | { 0x20, 0x1c }, | |
661 | { 0x23, 0x2a }, | |
662 | { 0x24, 0x10 }, | |
663 | { 0x25, 0x8a }, | |
664 | { 0x26, 0xa2 }, | |
665 | { 0x27, 0xc2 }, | |
666 | { 0x2a, 0x04 }, | |
667 | { 0x2c, 0xfe }, | |
668 | { 0x2d, 0x93 }, | |
669 | { 0x30, 0x71 }, | |
670 | { 0x31, 0x60 }, | |
671 | { 0x32, 0x26 }, | |
672 | { 0x33, 0x20 }, | |
673 | { 0x34, 0x48 }, | |
674 | { 0x12, 0x24 }, | |
675 | { 0x11, 0x01 }, | |
676 | { 0x0c, 0x24 }, | |
677 | { 0x0d, 0x24 }, | |
678 | }; | |
679 | ||
680 | static const struct ov_i2c_regvals norm_7620[] = { | |
681 | { 0x00, 0x00 }, /* gain */ | |
682 | { 0x01, 0x80 }, /* blue gain */ | |
683 | { 0x02, 0x80 }, /* red gain */ | |
684 | { 0x03, 0xc0 }, /* OV7670_REG_VREF */ | |
685 | { 0x06, 0x60 }, | |
686 | { 0x07, 0x00 }, | |
687 | { 0x0c, 0x24 }, | |
688 | { 0x0c, 0x24 }, | |
689 | { 0x0d, 0x24 }, | |
690 | { 0x11, 0x01 }, | |
691 | { 0x12, 0x24 }, | |
692 | { 0x13, 0x01 }, | |
693 | { 0x14, 0x84 }, | |
694 | { 0x15, 0x01 }, | |
695 | { 0x16, 0x03 }, | |
696 | { 0x17, 0x2f }, | |
697 | { 0x18, 0xcf }, | |
698 | { 0x19, 0x06 }, | |
699 | { 0x1a, 0xf5 }, | |
700 | { 0x1b, 0x00 }, | |
701 | { 0x20, 0x18 }, | |
702 | { 0x21, 0x80 }, | |
703 | { 0x22, 0x80 }, | |
704 | { 0x23, 0x00 }, | |
705 | { 0x26, 0xa2 }, | |
706 | { 0x27, 0xea }, | |
707 | { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */ | |
708 | { 0x29, 0x00 }, | |
709 | { 0x2a, 0x10 }, | |
710 | { 0x2b, 0x00 }, | |
711 | { 0x2c, 0x88 }, | |
712 | { 0x2d, 0x91 }, | |
713 | { 0x2e, 0x80 }, | |
714 | { 0x2f, 0x44 }, | |
715 | { 0x60, 0x27 }, | |
716 | { 0x61, 0x02 }, | |
717 | { 0x62, 0x5f }, | |
718 | { 0x63, 0xd5 }, | |
719 | { 0x64, 0x57 }, | |
720 | { 0x65, 0x83 }, | |
721 | { 0x66, 0x55 }, | |
722 | { 0x67, 0x92 }, | |
723 | { 0x68, 0xcf }, | |
724 | { 0x69, 0x76 }, | |
725 | { 0x6a, 0x22 }, | |
726 | { 0x6b, 0x00 }, | |
727 | { 0x6c, 0x02 }, | |
728 | { 0x6d, 0x44 }, | |
729 | { 0x6e, 0x80 }, | |
730 | { 0x6f, 0x1d }, | |
731 | { 0x70, 0x8b }, | |
732 | { 0x71, 0x00 }, | |
733 | { 0x72, 0x14 }, | |
734 | { 0x73, 0x54 }, | |
735 | { 0x74, 0x00 }, | |
736 | { 0x75, 0x8e }, | |
737 | { 0x76, 0x00 }, | |
738 | { 0x77, 0xff }, | |
739 | { 0x78, 0x80 }, | |
740 | { 0x79, 0x80 }, | |
741 | { 0x7a, 0x80 }, | |
742 | { 0x7b, 0xe2 }, | |
743 | { 0x7c, 0x00 }, | |
744 | }; | |
745 | ||
746 | /* 7640 and 7648. The defaults should be OK for most registers. */ | |
747 | static const struct ov_i2c_regvals norm_7640[] = { | |
748 | { 0x12, 0x80 }, | |
749 | { 0x12, 0x14 }, | |
750 | }; | |
751 | ||
752 | /* 7670. Defaults taken from OmniVision provided data, | |
753 | * as provided by Jonathan Corbet of OLPC */ | |
754 | static const struct ov_i2c_regvals norm_7670[] = { | |
755 | { OV7670_REG_COM7, OV7670_COM7_RESET }, | |
756 | { OV7670_REG_TSLB, 0x04 }, /* OV */ | |
757 | { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */ | |
758 | { OV7670_REG_CLKRC, 0x01 }, | |
759 | /* | |
760 | * Set the hardware window. These values from OV don't entirely | |
761 | * make sense - hstop is less than hstart. But they work... | |
762 | */ | |
763 | { OV7670_REG_HSTART, 0x13 }, | |
764 | { OV7670_REG_HSTOP, 0x01 }, | |
765 | { OV7670_REG_HREF, 0xb6 }, | |
766 | { OV7670_REG_VSTART, 0x02 }, | |
767 | { OV7670_REG_VSTOP, 0x7a }, | |
768 | { OV7670_REG_VREF, 0x0a }, | |
769 | ||
770 | { OV7670_REG_COM3, 0x00 }, | |
771 | { OV7670_REG_COM14, 0x00 }, | |
772 | /* Mystery scaling numbers */ | |
773 | { 0x70, 0x3a }, | |
774 | { 0x71, 0x35 }, | |
775 | { 0x72, 0x11 }, | |
776 | { 0x73, 0xf0 }, | |
777 | { 0xa2, 0x02 }, | |
778 | /* { OV7670_REG_COM10, 0x0 }, */ | |
779 | ||
780 | /* Gamma curve values */ | |
781 | { 0x7a, 0x20 }, | |
782 | { 0x7b, 0x10 }, | |
783 | { 0x7c, 0x1e }, | |
784 | { 0x7d, 0x35 }, | |
785 | { 0x7e, 0x5a }, | |
786 | { 0x7f, 0x69 }, | |
787 | { 0x80, 0x76 }, | |
788 | { 0x81, 0x80 }, | |
789 | { 0x82, 0x88 }, | |
790 | { 0x83, 0x8f }, | |
791 | { 0x84, 0x96 }, | |
792 | { 0x85, 0xa3 }, | |
793 | { 0x86, 0xaf }, | |
794 | { 0x87, 0xc4 }, | |
795 | { 0x88, 0xd7 }, | |
796 | { 0x89, 0xe8 }, | |
797 | ||
798 | /* AGC and AEC parameters. Note we start by disabling those features, | |
799 | then turn them only after tweaking the values. */ | |
800 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
801 | | OV7670_COM8_AECSTEP | |
802 | | OV7670_COM8_BFILT }, | |
803 | { OV7670_REG_GAIN, 0x00 }, | |
804 | { OV7670_REG_AECH, 0x00 }, | |
805 | { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */ | |
806 | { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ | |
807 | { OV7670_REG_BD50MAX, 0x05 }, | |
808 | { OV7670_REG_BD60MAX, 0x07 }, | |
809 | { OV7670_REG_AEW, 0x95 }, | |
810 | { OV7670_REG_AEB, 0x33 }, | |
811 | { OV7670_REG_VPT, 0xe3 }, | |
812 | { OV7670_REG_HAECC1, 0x78 }, | |
813 | { OV7670_REG_HAECC2, 0x68 }, | |
814 | { 0xa1, 0x03 }, /* magic */ | |
815 | { OV7670_REG_HAECC3, 0xd8 }, | |
816 | { OV7670_REG_HAECC4, 0xd8 }, | |
817 | { OV7670_REG_HAECC5, 0xf0 }, | |
818 | { OV7670_REG_HAECC6, 0x90 }, | |
819 | { OV7670_REG_HAECC7, 0x94 }, | |
820 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
821 | | OV7670_COM8_AECSTEP | |
822 | | OV7670_COM8_BFILT | |
823 | | OV7670_COM8_AGC | |
824 | | OV7670_COM8_AEC }, | |
825 | ||
826 | /* Almost all of these are magic "reserved" values. */ | |
827 | { OV7670_REG_COM5, 0x61 }, | |
828 | { OV7670_REG_COM6, 0x4b }, | |
829 | { 0x16, 0x02 }, | |
830 | { OV7670_REG_MVFP, 0x07 }, | |
831 | { 0x21, 0x02 }, | |
832 | { 0x22, 0x91 }, | |
833 | { 0x29, 0x07 }, | |
834 | { 0x33, 0x0b }, | |
835 | { 0x35, 0x0b }, | |
836 | { 0x37, 0x1d }, | |
837 | { 0x38, 0x71 }, | |
838 | { 0x39, 0x2a }, | |
839 | { OV7670_REG_COM12, 0x78 }, | |
840 | { 0x4d, 0x40 }, | |
841 | { 0x4e, 0x20 }, | |
842 | { OV7670_REG_GFIX, 0x00 }, | |
843 | { 0x6b, 0x4a }, | |
844 | { 0x74, 0x10 }, | |
845 | { 0x8d, 0x4f }, | |
846 | { 0x8e, 0x00 }, | |
847 | { 0x8f, 0x00 }, | |
848 | { 0x90, 0x00 }, | |
849 | { 0x91, 0x00 }, | |
850 | { 0x96, 0x00 }, | |
851 | { 0x9a, 0x00 }, | |
852 | { 0xb0, 0x84 }, | |
853 | { 0xb1, 0x0c }, | |
854 | { 0xb2, 0x0e }, | |
855 | { 0xb3, 0x82 }, | |
856 | { 0xb8, 0x0a }, | |
857 | ||
858 | /* More reserved magic, some of which tweaks white balance */ | |
859 | { 0x43, 0x0a }, | |
860 | { 0x44, 0xf0 }, | |
861 | { 0x45, 0x34 }, | |
862 | { 0x46, 0x58 }, | |
863 | { 0x47, 0x28 }, | |
864 | { 0x48, 0x3a }, | |
865 | { 0x59, 0x88 }, | |
866 | { 0x5a, 0x88 }, | |
867 | { 0x5b, 0x44 }, | |
868 | { 0x5c, 0x67 }, | |
869 | { 0x5d, 0x49 }, | |
870 | { 0x5e, 0x0e }, | |
871 | { 0x6c, 0x0a }, | |
872 | { 0x6d, 0x55 }, | |
873 | { 0x6e, 0x11 }, | |
874 | { 0x6f, 0x9f }, | |
875 | /* "9e for advance AWB" */ | |
876 | { 0x6a, 0x40 }, | |
877 | { OV7670_REG_BLUE, 0x40 }, | |
878 | { OV7670_REG_RED, 0x60 }, | |
879 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
880 | | OV7670_COM8_AECSTEP | |
881 | | OV7670_COM8_BFILT | |
882 | | OV7670_COM8_AGC | |
883 | | OV7670_COM8_AEC | |
884 | | OV7670_COM8_AWB }, | |
885 | ||
886 | /* Matrix coefficients */ | |
887 | { 0x4f, 0x80 }, | |
888 | { 0x50, 0x80 }, | |
889 | { 0x51, 0x00 }, | |
890 | { 0x52, 0x22 }, | |
891 | { 0x53, 0x5e }, | |
892 | { 0x54, 0x80 }, | |
893 | { 0x58, 0x9e }, | |
894 | ||
895 | { OV7670_REG_COM16, OV7670_COM16_AWBGAIN }, | |
896 | { OV7670_REG_EDGE, 0x00 }, | |
897 | { 0x75, 0x05 }, | |
898 | { 0x76, 0xe1 }, | |
899 | { 0x4c, 0x00 }, | |
900 | { 0x77, 0x01 }, | |
901 | { OV7670_REG_COM13, OV7670_COM13_GAMMA | |
902 | | OV7670_COM13_UVSAT | |
903 | | 2}, /* was 3 */ | |
904 | { 0x4b, 0x09 }, | |
905 | { 0xc9, 0x60 }, | |
906 | { OV7670_REG_COM16, 0x38 }, | |
907 | { 0x56, 0x40 }, | |
908 | ||
909 | { 0x34, 0x11 }, | |
910 | { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO }, | |
911 | { 0xa4, 0x88 }, | |
912 | { 0x96, 0x00 }, | |
913 | { 0x97, 0x30 }, | |
914 | { 0x98, 0x20 }, | |
915 | { 0x99, 0x30 }, | |
916 | { 0x9a, 0x84 }, | |
917 | { 0x9b, 0x29 }, | |
918 | { 0x9c, 0x03 }, | |
919 | { 0x9d, 0x4c }, | |
920 | { 0x9e, 0x3f }, | |
921 | { 0x78, 0x04 }, | |
922 | ||
923 | /* Extra-weird stuff. Some sort of multiplexor register */ | |
924 | { 0x79, 0x01 }, | |
925 | { 0xc8, 0xf0 }, | |
926 | { 0x79, 0x0f }, | |
927 | { 0xc8, 0x00 }, | |
928 | { 0x79, 0x10 }, | |
929 | { 0xc8, 0x7e }, | |
930 | { 0x79, 0x0a }, | |
931 | { 0xc8, 0x80 }, | |
932 | { 0x79, 0x0b }, | |
933 | { 0xc8, 0x01 }, | |
934 | { 0x79, 0x0c }, | |
935 | { 0xc8, 0x0f }, | |
936 | { 0x79, 0x0d }, | |
937 | { 0xc8, 0x20 }, | |
938 | { 0x79, 0x09 }, | |
939 | { 0xc8, 0x80 }, | |
940 | { 0x79, 0x02 }, | |
941 | { 0xc8, 0xc0 }, | |
942 | { 0x79, 0x03 }, | |
943 | { 0xc8, 0x40 }, | |
944 | { 0x79, 0x05 }, | |
945 | { 0xc8, 0x30 }, | |
946 | { 0x79, 0x26 }, | |
947 | }; | |
948 | ||
949 | static const struct ov_i2c_regvals norm_8610[] = { | |
950 | { 0x12, 0x80 }, | |
951 | { 0x00, 0x00 }, | |
952 | { 0x01, 0x80 }, | |
953 | { 0x02, 0x80 }, | |
954 | { 0x03, 0xc0 }, | |
955 | { 0x04, 0x30 }, | |
956 | { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
957 | { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */ | |
958 | { 0x0a, 0x86 }, | |
959 | { 0x0b, 0xb0 }, | |
960 | { 0x0c, 0x20 }, | |
961 | { 0x0d, 0x20 }, | |
962 | { 0x11, 0x01 }, | |
963 | { 0x12, 0x25 }, | |
964 | { 0x13, 0x01 }, | |
965 | { 0x14, 0x04 }, | |
966 | { 0x15, 0x01 }, /* Lin and Win think different about UV order */ | |
967 | { 0x16, 0x03 }, | |
968 | { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */ | |
969 | { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */ | |
970 | { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */ | |
971 | { 0x1a, 0xf5 }, | |
972 | { 0x1b, 0x00 }, | |
973 | { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */ | |
974 | { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */ | |
975 | { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */ | |
976 | { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */ | |
977 | { 0x26, 0xa2 }, | |
978 | { 0x27, 0xea }, | |
979 | { 0x28, 0x00 }, | |
980 | { 0x29, 0x00 }, | |
981 | { 0x2a, 0x80 }, | |
982 | { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */ | |
983 | { 0x2c, 0xac }, | |
984 | { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */ | |
985 | { 0x2e, 0x80 }, | |
986 | { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */ | |
987 | { 0x4c, 0x00 }, | |
988 | { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
989 | { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */ | |
990 | { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */ | |
991 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ | |
992 | { 0x63, 0xff }, | |
993 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, | |
994 | * maybe thats wrong */ | |
995 | { 0x65, 0x00 }, | |
996 | { 0x66, 0x55 }, | |
997 | { 0x67, 0xb0 }, | |
998 | { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */ | |
999 | { 0x69, 0x02 }, | |
1000 | { 0x6a, 0x22 }, | |
1001 | { 0x6b, 0x00 }, | |
1002 | { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but | |
1003 | * deleting bit7 colors the first images red */ | |
1004 | { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1005 | { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1006 | { 0x6f, 0x01 }, | |
1007 | { 0x70, 0x8b }, | |
1008 | { 0x71, 0x00 }, | |
1009 | { 0x72, 0x14 }, | |
1010 | { 0x73, 0x54 }, | |
1011 | { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */ | |
1012 | { 0x75, 0x0e }, | |
1013 | { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */ | |
1014 | { 0x77, 0xff }, | |
1015 | { 0x78, 0x80 }, | |
1016 | { 0x79, 0x80 }, | |
1017 | { 0x7a, 0x80 }, | |
1018 | { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */ | |
1019 | { 0x7c, 0x00 }, | |
1020 | { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */ | |
1021 | { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */ | |
1022 | { 0x7f, 0xfb }, | |
1023 | { 0x80, 0x28 }, | |
1024 | { 0x81, 0x00 }, | |
1025 | { 0x82, 0x23 }, | |
1026 | { 0x83, 0x0b }, | |
1027 | { 0x84, 0x00 }, | |
1028 | { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */ | |
1029 | { 0x86, 0xc9 }, | |
1030 | { 0x87, 0x00 }, | |
1031 | { 0x88, 0x00 }, | |
1032 | { 0x89, 0x01 }, | |
1033 | { 0x12, 0x20 }, | |
1034 | { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */ | |
1035 | }; | |
1036 | ||
1037 | static unsigned char ov7670_abs_to_sm(unsigned char v) | |
1038 | { | |
1039 | if (v > 127) | |
1040 | return v & 0x7f; | |
1041 | return (128 - v) | 0x80; | |
1042 | } | |
1043 | ||
1044 | /* Write a OV519 register */ | |
1045 | static int reg_w(struct sd *sd, __u16 index, __u8 value) | |
1046 | { | |
1047 | int ret; | |
1048 | int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1; | |
1049 | ||
1050 | sd->gspca_dev.usb_buf[0] = value; | |
1051 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1052 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
1053 | req, | |
1054 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1055 | 0, index, | |
1056 | sd->gspca_dev.usb_buf, 1, 500); | |
1057 | if (ret < 0) | |
1058 | PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value); | |
1059 | return ret; | |
1060 | } | |
1061 | ||
1062 | /* Read from a OV519 register */ | |
1063 | /* returns: negative is error, pos or zero is data */ | |
1064 | static int reg_r(struct sd *sd, __u16 index) | |
1065 | { | |
1066 | int ret; | |
1067 | int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1; | |
1068 | ||
1069 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1070 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
1071 | req, | |
1072 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1073 | 0, index, sd->gspca_dev.usb_buf, 1, 500); | |
1074 | ||
1075 | if (ret >= 0) | |
1076 | ret = sd->gspca_dev.usb_buf[0]; | |
1077 | else | |
1078 | PDEBUG(D_ERR, "Read reg [0x%02x] failed", index); | |
1079 | return ret; | |
1080 | } | |
1081 | ||
1082 | /* Read 8 values from a OV519 register */ | |
1083 | static int reg_r8(struct sd *sd, | |
1084 | __u16 index) | |
1085 | { | |
1086 | int ret; | |
1087 | ||
1088 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1089 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
1090 | 1, /* REQ_IO */ | |
1091 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1092 | 0, index, sd->gspca_dev.usb_buf, 8, 500); | |
1093 | ||
1094 | if (ret >= 0) | |
1095 | ret = sd->gspca_dev.usb_buf[0]; | |
1096 | else | |
1097 | PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index); | |
1098 | return ret; | |
1099 | } | |
1100 | ||
1101 | /* | |
1102 | * Writes bits at positions specified by mask to an OV51x reg. Bits that are in | |
1103 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
1104 | * that are in the same position as 0's in "mask" are preserved, regardless | |
1105 | * of their respective state in "value". | |
1106 | */ | |
1107 | static int reg_w_mask(struct sd *sd, | |
1108 | __u16 index, | |
1109 | __u8 value, | |
1110 | __u8 mask) | |
1111 | { | |
1112 | int ret; | |
1113 | __u8 oldval; | |
1114 | ||
1115 | if (mask != 0xff) { | |
1116 | value &= mask; /* Enforce mask on value */ | |
1117 | ret = reg_r(sd, index); | |
1118 | if (ret < 0) | |
1119 | return ret; | |
1120 | ||
1121 | oldval = ret & ~mask; /* Clear the masked bits */ | |
1122 | value |= oldval; /* Set the desired bits */ | |
1123 | } | |
1124 | return reg_w(sd, index, value); | |
1125 | } | |
1126 | ||
1127 | /* | |
1128 | * Writes multiple (n) byte value to a single register. Only valid with certain | |
1129 | * registers (0x30 and 0xc4 - 0xce). | |
1130 | */ | |
1131 | static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n) | |
1132 | { | |
1133 | int ret; | |
1134 | ||
1135 | *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value); | |
1136 | ||
1137 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1138 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
1139 | 1 /* REG_IO */, | |
1140 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1141 | 0, index, | |
1142 | sd->gspca_dev.usb_buf, n, 500); | |
1143 | if (ret < 0) | |
1144 | PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value); | |
1145 | return ret; | |
1146 | } | |
1147 | ||
1148 | static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value) | |
1149 | { | |
1150 | int rc, retries; | |
1151 | ||
1152 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
1153 | ||
1154 | /* Three byte write cycle */ | |
1155 | for (retries = 6; ; ) { | |
1156 | /* Select camera register */ | |
1157 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
1158 | if (rc < 0) | |
1159 | return rc; | |
1160 | ||
1161 | /* Write "value" to I2C data port of OV511 */ | |
1162 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
1163 | if (rc < 0) | |
1164 | return rc; | |
1165 | ||
1166 | /* Initiate 3-byte write cycle */ | |
1167 | rc = reg_w(sd, R511_I2C_CTL, 0x01); | |
1168 | if (rc < 0) | |
1169 | return rc; | |
1170 | ||
1171 | do | |
1172 | rc = reg_r(sd, R511_I2C_CTL); | |
1173 | while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ | |
1174 | ||
1175 | if (rc < 0) | |
1176 | return rc; | |
1177 | ||
1178 | if ((rc & 2) == 0) /* Ack? */ | |
1179 | break; | |
1180 | if (--retries < 0) { | |
1181 | PDEBUG(D_USBO, "i2c write retries exhausted"); | |
1182 | return -1; | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | return 0; | |
1187 | } | |
1188 | ||
1189 | static int ov511_i2c_r(struct sd *sd, __u8 reg) | |
1190 | { | |
1191 | int rc, value, retries; | |
1192 | ||
1193 | /* Two byte write cycle */ | |
1194 | for (retries = 6; ; ) { | |
1195 | /* Select camera register */ | |
1196 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
1197 | if (rc < 0) | |
1198 | return rc; | |
1199 | ||
1200 | /* Initiate 2-byte write cycle */ | |
1201 | rc = reg_w(sd, R511_I2C_CTL, 0x03); | |
1202 | if (rc < 0) | |
1203 | return rc; | |
1204 | ||
1205 | do | |
1206 | rc = reg_r(sd, R511_I2C_CTL); | |
1207 | while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ | |
1208 | ||
1209 | if (rc < 0) | |
1210 | return rc; | |
1211 | ||
1212 | if ((rc & 2) == 0) /* Ack? */ | |
1213 | break; | |
1214 | ||
1215 | /* I2C abort */ | |
1216 | reg_w(sd, R511_I2C_CTL, 0x10); | |
1217 | ||
1218 | if (--retries < 0) { | |
1219 | PDEBUG(D_USBI, "i2c write retries exhausted"); | |
1220 | return -1; | |
1221 | } | |
1222 | } | |
1223 | ||
1224 | /* Two byte read cycle */ | |
1225 | for (retries = 6; ; ) { | |
1226 | /* Initiate 2-byte read cycle */ | |
1227 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
1228 | if (rc < 0) | |
1229 | return rc; | |
1230 | ||
1231 | do | |
1232 | rc = reg_r(sd, R511_I2C_CTL); | |
1233 | while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ | |
1234 | ||
1235 | if (rc < 0) | |
1236 | return rc; | |
1237 | ||
1238 | if ((rc & 2) == 0) /* Ack? */ | |
1239 | break; | |
1240 | ||
1241 | /* I2C abort */ | |
1242 | rc = reg_w(sd, R511_I2C_CTL, 0x10); | |
1243 | if (rc < 0) | |
1244 | return rc; | |
1245 | ||
1246 | if (--retries < 0) { | |
1247 | PDEBUG(D_USBI, "i2c read retries exhausted"); | |
1248 | return -1; | |
1249 | } | |
1250 | } | |
1251 | ||
1252 | value = reg_r(sd, R51x_I2C_DATA); | |
1253 | ||
1254 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
1255 | ||
1256 | /* This is needed to make i2c_w() work */ | |
1257 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
1258 | if (rc < 0) | |
1259 | return rc; | |
1260 | ||
1261 | return value; | |
1262 | } | |
1263 | ||
1264 | /* | |
1265 | * The OV518 I2C I/O procedure is different, hence, this function. | |
1266 | * This is normally only called from i2c_w(). Note that this function | |
1267 | * always succeeds regardless of whether the sensor is present and working. | |
1268 | */ | |
1269 | static int ov518_i2c_w(struct sd *sd, | |
1270 | __u8 reg, | |
1271 | __u8 value) | |
1272 | { | |
1273 | int rc; | |
1274 | ||
1275 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
1276 | ||
1277 | /* Select camera register */ | |
1278 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
1279 | if (rc < 0) | |
1280 | return rc; | |
1281 | ||
1282 | /* Write "value" to I2C data port of OV511 */ | |
1283 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
1284 | if (rc < 0) | |
1285 | return rc; | |
1286 | ||
1287 | /* Initiate 3-byte write cycle */ | |
1288 | rc = reg_w(sd, R518_I2C_CTL, 0x01); | |
1289 | if (rc < 0) | |
1290 | return rc; | |
1291 | ||
1292 | /* wait for write complete */ | |
1293 | msleep(4); | |
1294 | return reg_r8(sd, R518_I2C_CTL); | |
1295 | } | |
1296 | ||
1297 | /* | |
1298 | * returns: negative is error, pos or zero is data | |
1299 | * | |
1300 | * The OV518 I2C I/O procedure is different, hence, this function. | |
1301 | * This is normally only called from i2c_r(). Note that this function | |
1302 | * always succeeds regardless of whether the sensor is present and working. | |
1303 | */ | |
1304 | static int ov518_i2c_r(struct sd *sd, __u8 reg) | |
1305 | { | |
1306 | int rc, value; | |
1307 | ||
1308 | /* Select camera register */ | |
1309 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
1310 | if (rc < 0) | |
1311 | return rc; | |
1312 | ||
1313 | /* Initiate 2-byte write cycle */ | |
1314 | rc = reg_w(sd, R518_I2C_CTL, 0x03); | |
1315 | if (rc < 0) | |
1316 | return rc; | |
1317 | ||
1318 | /* Initiate 2-byte read cycle */ | |
1319 | rc = reg_w(sd, R518_I2C_CTL, 0x05); | |
1320 | if (rc < 0) | |
1321 | return rc; | |
1322 | value = reg_r(sd, R51x_I2C_DATA); | |
1323 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
1324 | return value; | |
1325 | } | |
1326 | ||
1327 | static int i2c_w(struct sd *sd, __u8 reg, __u8 value) | |
1328 | { | |
1329 | switch (sd->bridge) { | |
1330 | case BRIDGE_OV511: | |
1331 | case BRIDGE_OV511PLUS: | |
1332 | return ov511_i2c_w(sd, reg, value); | |
1333 | case BRIDGE_OV518: | |
1334 | case BRIDGE_OV518PLUS: | |
1335 | case BRIDGE_OV519: | |
1336 | return ov518_i2c_w(sd, reg, value); | |
1337 | } | |
1338 | return -1; /* Should never happen */ | |
1339 | } | |
1340 | ||
1341 | static int i2c_r(struct sd *sd, __u8 reg) | |
1342 | { | |
1343 | switch (sd->bridge) { | |
1344 | case BRIDGE_OV511: | |
1345 | case BRIDGE_OV511PLUS: | |
1346 | return ov511_i2c_r(sd, reg); | |
1347 | case BRIDGE_OV518: | |
1348 | case BRIDGE_OV518PLUS: | |
1349 | case BRIDGE_OV519: | |
1350 | return ov518_i2c_r(sd, reg); | |
1351 | } | |
1352 | return -1; /* Should never happen */ | |
1353 | } | |
1354 | ||
1355 | /* Writes bits at positions specified by mask to an I2C reg. Bits that are in | |
1356 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
1357 | * that are in the same position as 0's in "mask" are preserved, regardless | |
1358 | * of their respective state in "value". | |
1359 | */ | |
1360 | static int i2c_w_mask(struct sd *sd, | |
1361 | __u8 reg, | |
1362 | __u8 value, | |
1363 | __u8 mask) | |
1364 | { | |
1365 | int rc; | |
1366 | __u8 oldval; | |
1367 | ||
1368 | value &= mask; /* Enforce mask on value */ | |
1369 | rc = i2c_r(sd, reg); | |
1370 | if (rc < 0) | |
1371 | return rc; | |
1372 | oldval = rc & ~mask; /* Clear the masked bits */ | |
1373 | value |= oldval; /* Set the desired bits */ | |
1374 | return i2c_w(sd, reg, value); | |
1375 | } | |
1376 | ||
1377 | /* Temporarily stops OV511 from functioning. Must do this before changing | |
1378 | * registers while the camera is streaming */ | |
1379 | static inline int ov51x_stop(struct sd *sd) | |
1380 | { | |
1381 | PDEBUG(D_STREAM, "stopping"); | |
1382 | sd->stopped = 1; | |
1383 | switch (sd->bridge) { | |
1384 | case BRIDGE_OV511: | |
1385 | case BRIDGE_OV511PLUS: | |
1386 | return reg_w(sd, R51x_SYS_RESET, 0x3d); | |
1387 | case BRIDGE_OV518: | |
1388 | case BRIDGE_OV518PLUS: | |
1389 | return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a); | |
1390 | case BRIDGE_OV519: | |
1391 | return reg_w(sd, OV519_SYS_RESET1, 0x0f); | |
1392 | } | |
1393 | ||
1394 | return 0; | |
1395 | } | |
1396 | ||
1397 | /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not | |
1398 | * actually stopped (for performance). */ | |
1399 | static inline int ov51x_restart(struct sd *sd) | |
1400 | { | |
1401 | int rc; | |
1402 | ||
1403 | PDEBUG(D_STREAM, "restarting"); | |
1404 | if (!sd->stopped) | |
1405 | return 0; | |
1406 | sd->stopped = 0; | |
1407 | ||
1408 | /* Reinitialize the stream */ | |
1409 | switch (sd->bridge) { | |
1410 | case BRIDGE_OV511: | |
1411 | case BRIDGE_OV511PLUS: | |
1412 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
1413 | case BRIDGE_OV518: | |
1414 | case BRIDGE_OV518PLUS: | |
1415 | rc = reg_w(sd, 0x2f, 0x80); | |
1416 | if (rc < 0) | |
1417 | return rc; | |
1418 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
1419 | case BRIDGE_OV519: | |
1420 | return reg_w(sd, OV519_SYS_RESET1, 0x00); | |
1421 | } | |
1422 | ||
1423 | return 0; | |
1424 | } | |
1425 | ||
1426 | /* This does an initial reset of an OmniVision sensor and ensures that I2C | |
1427 | * is synchronized. Returns <0 on failure. | |
1428 | */ | |
1429 | static int init_ov_sensor(struct sd *sd) | |
1430 | { | |
1431 | int i; | |
1432 | ||
1433 | /* Reset the sensor */ | |
1434 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
1435 | return -EIO; | |
1436 | ||
1437 | /* Wait for it to initialize */ | |
1438 | msleep(150); | |
1439 | ||
1440 | for (i = 0; i < i2c_detect_tries; i++) { | |
1441 | if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f && | |
1442 | i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) { | |
1443 | PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i); | |
1444 | return 0; | |
1445 | } | |
1446 | ||
1447 | /* Reset the sensor */ | |
1448 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
1449 | return -EIO; | |
1450 | /* Wait for it to initialize */ | |
1451 | msleep(150); | |
1452 | /* Dummy read to sync I2C */ | |
1453 | if (i2c_r(sd, 0x00) < 0) | |
1454 | return -EIO; | |
1455 | } | |
1456 | return -EIO; | |
1457 | } | |
1458 | ||
1459 | /* Set the read and write slave IDs. The "slave" argument is the write slave, | |
1460 | * and the read slave will be set to (slave + 1). | |
1461 | * This should not be called from outside the i2c I/O functions. | |
1462 | * Sets I2C read and write slave IDs. Returns <0 for error | |
1463 | */ | |
1464 | static int ov51x_set_slave_ids(struct sd *sd, | |
1465 | __u8 slave) | |
1466 | { | |
1467 | int rc; | |
1468 | ||
1469 | rc = reg_w(sd, R51x_I2C_W_SID, slave); | |
1470 | if (rc < 0) | |
1471 | return rc; | |
1472 | return reg_w(sd, R51x_I2C_R_SID, slave + 1); | |
1473 | } | |
1474 | ||
1475 | static int write_regvals(struct sd *sd, | |
1476 | const struct ov_regvals *regvals, | |
1477 | int n) | |
1478 | { | |
1479 | int rc; | |
1480 | ||
1481 | while (--n >= 0) { | |
1482 | rc = reg_w(sd, regvals->reg, regvals->val); | |
1483 | if (rc < 0) | |
1484 | return rc; | |
1485 | regvals++; | |
1486 | } | |
1487 | return 0; | |
1488 | } | |
1489 | ||
1490 | static int write_i2c_regvals(struct sd *sd, | |
1491 | const struct ov_i2c_regvals *regvals, | |
1492 | int n) | |
1493 | { | |
1494 | int rc; | |
1495 | ||
1496 | while (--n >= 0) { | |
1497 | rc = i2c_w(sd, regvals->reg, regvals->val); | |
1498 | if (rc < 0) | |
1499 | return rc; | |
1500 | regvals++; | |
1501 | } | |
1502 | return 0; | |
1503 | } | |
1504 | ||
1505 | /**************************************************************************** | |
1506 | * | |
1507 | * OV511 and sensor configuration | |
1508 | * | |
1509 | ***************************************************************************/ | |
1510 | ||
1511 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses | |
1512 | * the same register settings as the OV8610, since they are very similar. | |
1513 | */ | |
1514 | static int ov8xx0_configure(struct sd *sd) | |
1515 | { | |
1516 | int rc; | |
1517 | ||
1518 | PDEBUG(D_PROBE, "starting ov8xx0 configuration"); | |
1519 | ||
1520 | /* Detect sensor (sub)type */ | |
1521 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1522 | if (rc < 0) { | |
1523 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1524 | return -1; | |
1525 | } | |
1526 | if ((rc & 3) == 1) { | |
1527 | sd->sensor = SEN_OV8610; | |
1528 | } else { | |
1529 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
1530 | return -1; | |
1531 | } | |
1532 | ||
1533 | /* Set sensor-specific vars */ | |
1534 | return 0; | |
1535 | } | |
1536 | ||
1537 | /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses | |
1538 | * the same register settings as the OV7610, since they are very similar. | |
1539 | */ | |
1540 | static int ov7xx0_configure(struct sd *sd) | |
1541 | { | |
1542 | int rc, high, low; | |
1543 | ||
1544 | ||
1545 | PDEBUG(D_PROBE, "starting OV7xx0 configuration"); | |
1546 | ||
1547 | /* Detect sensor (sub)type */ | |
1548 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1549 | ||
1550 | /* add OV7670 here | |
1551 | * it appears to be wrongly detected as a 7610 by default */ | |
1552 | if (rc < 0) { | |
1553 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1554 | return -1; | |
1555 | } | |
1556 | if ((rc & 3) == 3) { | |
1557 | /* quick hack to make OV7670s work */ | |
1558 | high = i2c_r(sd, 0x0a); | |
1559 | low = i2c_r(sd, 0x0b); | |
1560 | /* info("%x, %x", high, low); */ | |
1561 | if (high == 0x76 && low == 0x73) { | |
1562 | PDEBUG(D_PROBE, "Sensor is an OV7670"); | |
1563 | sd->sensor = SEN_OV7670; | |
1564 | } else { | |
1565 | PDEBUG(D_PROBE, "Sensor is an OV7610"); | |
1566 | sd->sensor = SEN_OV7610; | |
1567 | } | |
1568 | } else if ((rc & 3) == 1) { | |
1569 | /* I don't know what's different about the 76BE yet. */ | |
1570 | if (i2c_r(sd, 0x15) & 1) { | |
1571 | PDEBUG(D_PROBE, "Sensor is an OV7620AE"); | |
1572 | sd->sensor = SEN_OV7620; | |
1573 | } else { | |
1574 | PDEBUG(D_PROBE, "Sensor is an OV76BE"); | |
1575 | sd->sensor = SEN_OV76BE; | |
1576 | } | |
1577 | } else if ((rc & 3) == 0) { | |
1578 | /* try to read product id registers */ | |
1579 | high = i2c_r(sd, 0x0a); | |
1580 | if (high < 0) { | |
1581 | PDEBUG(D_ERR, "Error detecting camera chip PID"); | |
1582 | return high; | |
1583 | } | |
1584 | low = i2c_r(sd, 0x0b); | |
1585 | if (low < 0) { | |
1586 | PDEBUG(D_ERR, "Error detecting camera chip VER"); | |
1587 | return low; | |
1588 | } | |
1589 | if (high == 0x76) { | |
1590 | switch (low) { | |
1591 | case 0x30: | |
1592 | PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635"); | |
1593 | PDEBUG(D_ERR, | |
1594 | "7630 is not supported by this driver"); | |
1595 | return -1; | |
1596 | case 0x40: | |
1597 | PDEBUG(D_PROBE, "Sensor is an OV7645"); | |
1598 | sd->sensor = SEN_OV7640; /* FIXME */ | |
1599 | break; | |
1600 | case 0x45: | |
1601 | PDEBUG(D_PROBE, "Sensor is an OV7645B"); | |
1602 | sd->sensor = SEN_OV7640; /* FIXME */ | |
1603 | break; | |
1604 | case 0x48: | |
1605 | PDEBUG(D_PROBE, "Sensor is an OV7648"); | |
1606 | sd->sensor = SEN_OV7640; /* FIXME */ | |
1607 | break; | |
1608 | default: | |
1609 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | |
1610 | return -1; | |
1611 | } | |
1612 | } else { | |
1613 | PDEBUG(D_PROBE, "Sensor is an OV7620"); | |
1614 | sd->sensor = SEN_OV7620; | |
1615 | } | |
1616 | } else { | |
1617 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
1618 | return -1; | |
1619 | } | |
1620 | ||
1621 | /* Set sensor-specific vars */ | |
1622 | return 0; | |
1623 | } | |
1624 | ||
1625 | /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */ | |
1626 | static int ov6xx0_configure(struct sd *sd) | |
1627 | { | |
1628 | int rc; | |
1629 | PDEBUG(D_PROBE, "starting OV6xx0 configuration"); | |
1630 | ||
1631 | /* Detect sensor (sub)type */ | |
1632 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1633 | if (rc < 0) { | |
1634 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1635 | return -1; | |
1636 | } | |
1637 | ||
1638 | /* Ugh. The first two bits are the version bits, but | |
1639 | * the entire register value must be used. I guess OVT | |
1640 | * underestimated how many variants they would make. */ | |
1641 | switch (rc) { | |
1642 | case 0x00: | |
1643 | sd->sensor = SEN_OV6630; | |
1644 | PDEBUG(D_ERR, | |
1645 | "WARNING: Sensor is an OV66308. Your camera may have"); | |
1646 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
1647 | break; | |
1648 | case 0x01: | |
1649 | sd->sensor = SEN_OV6620; | |
1650 | PDEBUG(D_PROBE, "Sensor is an OV6620"); | |
1651 | break; | |
1652 | case 0x02: | |
1653 | sd->sensor = SEN_OV6630; | |
1654 | PDEBUG(D_PROBE, "Sensor is an OV66308AE"); | |
1655 | break; | |
1656 | case 0x03: | |
1657 | sd->sensor = SEN_OV66308AF; | |
1658 | PDEBUG(D_PROBE, "Sensor is an OV66308AF"); | |
1659 | break; | |
1660 | case 0x90: | |
1661 | sd->sensor = SEN_OV6630; | |
1662 | PDEBUG(D_ERR, | |
1663 | "WARNING: Sensor is an OV66307. Your camera may have"); | |
1664 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
1665 | break; | |
1666 | default: | |
1667 | PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc); | |
1668 | return -1; | |
1669 | } | |
1670 | ||
1671 | /* Set sensor-specific vars */ | |
1672 | sd->sif = 1; | |
1673 | ||
1674 | return 0; | |
1675 | } | |
1676 | ||
1677 | /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */ | |
1678 | static void ov51x_led_control(struct sd *sd, int on) | |
1679 | { | |
1680 | if (sd->invert_led) | |
1681 | on = !on; | |
1682 | ||
1683 | switch (sd->bridge) { | |
1684 | /* OV511 has no LED control */ | |
1685 | case BRIDGE_OV511PLUS: | |
1686 | reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0); | |
1687 | break; | |
1688 | case BRIDGE_OV518: | |
1689 | case BRIDGE_OV518PLUS: | |
1690 | reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02); | |
1691 | break; | |
1692 | case BRIDGE_OV519: | |
1693 | reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */ | |
1694 | break; | |
1695 | } | |
1696 | } | |
1697 | ||
1698 | static int ov51x_upload_quan_tables(struct sd *sd) | |
1699 | { | |
1700 | const unsigned char yQuanTable511[] = { | |
1701 | 0, 1, 1, 2, 2, 3, 3, 4, | |
1702 | 1, 1, 1, 2, 2, 3, 4, 4, | |
1703 | 1, 1, 2, 2, 3, 4, 4, 4, | |
1704 | 2, 2, 2, 3, 4, 4, 4, 4, | |
1705 | 2, 2, 3, 4, 4, 5, 5, 5, | |
1706 | 3, 3, 4, 4, 5, 5, 5, 5, | |
1707 | 3, 4, 4, 4, 5, 5, 5, 5, | |
1708 | 4, 4, 4, 4, 5, 5, 5, 5 | |
1709 | }; | |
1710 | ||
1711 | const unsigned char uvQuanTable511[] = { | |
1712 | 0, 2, 2, 3, 4, 4, 4, 4, | |
1713 | 2, 2, 2, 4, 4, 4, 4, 4, | |
1714 | 2, 2, 3, 4, 4, 4, 4, 4, | |
1715 | 3, 4, 4, 4, 4, 4, 4, 4, | |
1716 | 4, 4, 4, 4, 4, 4, 4, 4, | |
1717 | 4, 4, 4, 4, 4, 4, 4, 4, | |
1718 | 4, 4, 4, 4, 4, 4, 4, 4, | |
1719 | 4, 4, 4, 4, 4, 4, 4, 4 | |
1720 | }; | |
1721 | ||
1722 | /* OV518 quantization tables are 8x4 (instead of 8x8) */ | |
1723 | const unsigned char yQuanTable518[] = { | |
1724 | 5, 4, 5, 6, 6, 7, 7, 7, | |
1725 | 5, 5, 5, 5, 6, 7, 7, 7, | |
1726 | 6, 6, 6, 6, 7, 7, 7, 8, | |
1727 | 7, 7, 6, 7, 7, 7, 8, 8 | |
1728 | }; | |
1729 | ||
1730 | const unsigned char uvQuanTable518[] = { | |
1731 | 6, 6, 6, 7, 7, 7, 7, 7, | |
1732 | 6, 6, 6, 7, 7, 7, 7, 7, | |
1733 | 6, 6, 6, 7, 7, 7, 7, 8, | |
1734 | 7, 7, 7, 7, 7, 7, 8, 8 | |
1735 | }; | |
1736 | ||
1737 | const unsigned char *pYTable, *pUVTable; | |
1738 | unsigned char val0, val1; | |
1739 | int i, size, rc, reg = R51x_COMP_LUT_BEGIN; | |
1740 | ||
1741 | PDEBUG(D_PROBE, "Uploading quantization tables"); | |
1742 | ||
1743 | if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) { | |
1744 | pYTable = yQuanTable511; | |
1745 | pUVTable = uvQuanTable511; | |
1746 | size = 32; | |
1747 | } else { | |
1748 | pYTable = yQuanTable518; | |
1749 | pUVTable = uvQuanTable518; | |
1750 | size = 16; | |
1751 | } | |
1752 | ||
1753 | for (i = 0; i < size; i++) { | |
1754 | val0 = *pYTable++; | |
1755 | val1 = *pYTable++; | |
1756 | val0 &= 0x0f; | |
1757 | val1 &= 0x0f; | |
1758 | val0 |= val1 << 4; | |
1759 | rc = reg_w(sd, reg, val0); | |
1760 | if (rc < 0) | |
1761 | return rc; | |
1762 | ||
1763 | val0 = *pUVTable++; | |
1764 | val1 = *pUVTable++; | |
1765 | val0 &= 0x0f; | |
1766 | val1 &= 0x0f; | |
1767 | val0 |= val1 << 4; | |
1768 | rc = reg_w(sd, reg + size, val0); | |
1769 | if (rc < 0) | |
1770 | return rc; | |
1771 | ||
1772 | reg++; | |
1773 | } | |
1774 | ||
1775 | return 0; | |
1776 | } | |
1777 | ||
1778 | /* This initializes the OV511/OV511+ and the sensor */ | |
1779 | static int ov511_configure(struct gspca_dev *gspca_dev) | |
1780 | { | |
1781 | struct sd *sd = (struct sd *) gspca_dev; | |
1782 | int rc; | |
1783 | ||
1784 | /* For 511 and 511+ */ | |
1785 | const struct ov_regvals init_511[] = { | |
1786 | { R51x_SYS_RESET, 0x7f }, | |
1787 | { R51x_SYS_INIT, 0x01 }, | |
1788 | { R51x_SYS_RESET, 0x7f }, | |
1789 | { R51x_SYS_INIT, 0x01 }, | |
1790 | { R51x_SYS_RESET, 0x3f }, | |
1791 | { R51x_SYS_INIT, 0x01 }, | |
1792 | { R51x_SYS_RESET, 0x3d }, | |
1793 | }; | |
1794 | ||
1795 | const struct ov_regvals norm_511[] = { | |
1796 | { R511_DRAM_FLOW_CTL, 0x01 }, | |
1797 | { R51x_SYS_SNAP, 0x00 }, | |
1798 | { R51x_SYS_SNAP, 0x02 }, | |
1799 | { R51x_SYS_SNAP, 0x00 }, | |
1800 | { R511_FIFO_OPTS, 0x1f }, | |
1801 | { R511_COMP_EN, 0x00 }, | |
1802 | { R511_COMP_LUT_EN, 0x03 }, | |
1803 | }; | |
1804 | ||
1805 | const struct ov_regvals norm_511_p[] = { | |
1806 | { R511_DRAM_FLOW_CTL, 0xff }, | |
1807 | { R51x_SYS_SNAP, 0x00 }, | |
1808 | { R51x_SYS_SNAP, 0x02 }, | |
1809 | { R51x_SYS_SNAP, 0x00 }, | |
1810 | { R511_FIFO_OPTS, 0xff }, | |
1811 | { R511_COMP_EN, 0x00 }, | |
1812 | { R511_COMP_LUT_EN, 0x03 }, | |
1813 | }; | |
1814 | ||
1815 | const struct ov_regvals compress_511[] = { | |
1816 | { 0x70, 0x1f }, | |
1817 | { 0x71, 0x05 }, | |
1818 | { 0x72, 0x06 }, | |
1819 | { 0x73, 0x06 }, | |
1820 | { 0x74, 0x14 }, | |
1821 | { 0x75, 0x03 }, | |
1822 | { 0x76, 0x04 }, | |
1823 | { 0x77, 0x04 }, | |
1824 | }; | |
1825 | ||
1826 | PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID)); | |
1827 | ||
1828 | rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511)); | |
1829 | if (rc < 0) | |
1830 | return rc; | |
1831 | ||
1832 | switch (sd->bridge) { | |
1833 | case BRIDGE_OV511: | |
1834 | rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511)); | |
1835 | if (rc < 0) | |
1836 | return rc; | |
1837 | break; | |
1838 | case BRIDGE_OV511PLUS: | |
1839 | rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p)); | |
1840 | if (rc < 0) | |
1841 | return rc; | |
1842 | break; | |
1843 | } | |
1844 | ||
1845 | /* Init compression */ | |
1846 | rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511)); | |
1847 | if (rc < 0) | |
1848 | return rc; | |
1849 | ||
1850 | rc = ov51x_upload_quan_tables(sd); | |
1851 | if (rc < 0) { | |
1852 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
1853 | return rc; | |
1854 | } | |
1855 | ||
1856 | return 0; | |
1857 | } | |
1858 | ||
1859 | /* This initializes the OV518/OV518+ and the sensor */ | |
1860 | static int ov518_configure(struct gspca_dev *gspca_dev) | |
1861 | { | |
1862 | struct sd *sd = (struct sd *) gspca_dev; | |
1863 | int rc; | |
1864 | ||
1865 | /* For 518 and 518+ */ | |
1866 | const struct ov_regvals init_518[] = { | |
1867 | { R51x_SYS_RESET, 0x40 }, | |
1868 | { R51x_SYS_INIT, 0xe1 }, | |
1869 | { R51x_SYS_RESET, 0x3e }, | |
1870 | { R51x_SYS_INIT, 0xe1 }, | |
1871 | { R51x_SYS_RESET, 0x00 }, | |
1872 | { R51x_SYS_INIT, 0xe1 }, | |
1873 | { 0x46, 0x00 }, | |
1874 | { 0x5d, 0x03 }, | |
1875 | }; | |
1876 | ||
1877 | const struct ov_regvals norm_518[] = { | |
1878 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ | |
1879 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
1880 | { 0x31, 0x0f }, | |
1881 | { 0x5d, 0x03 }, | |
1882 | { 0x24, 0x9f }, | |
1883 | { 0x25, 0x90 }, | |
1884 | { 0x20, 0x00 }, | |
1885 | { 0x51, 0x04 }, | |
1886 | { 0x71, 0x19 }, | |
1887 | { 0x2f, 0x80 }, | |
1888 | }; | |
1889 | ||
1890 | const struct ov_regvals norm_518_p[] = { | |
1891 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ | |
1892 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
1893 | { 0x31, 0x0f }, | |
1894 | { 0x5d, 0x03 }, | |
1895 | { 0x24, 0x9f }, | |
1896 | { 0x25, 0x90 }, | |
1897 | { 0x20, 0x60 }, | |
1898 | { 0x51, 0x02 }, | |
1899 | { 0x71, 0x19 }, | |
1900 | { 0x40, 0xff }, | |
1901 | { 0x41, 0x42 }, | |
1902 | { 0x46, 0x00 }, | |
1903 | { 0x33, 0x04 }, | |
1904 | { 0x21, 0x19 }, | |
1905 | { 0x3f, 0x10 }, | |
1906 | { 0x2f, 0x80 }, | |
1907 | }; | |
1908 | ||
1909 | /* First 5 bits of custom ID reg are a revision ID on OV518 */ | |
1910 | PDEBUG(D_PROBE, "Device revision %d", | |
1911 | 0x1F & reg_r(sd, R51x_SYS_CUST_ID)); | |
1912 | ||
1913 | rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518)); | |
1914 | if (rc < 0) | |
1915 | return rc; | |
1916 | ||
1917 | /* Set LED GPIO pin to output mode */ | |
1918 | rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02); | |
1919 | if (rc < 0) | |
1920 | return rc; | |
1921 | ||
1922 | switch (sd->bridge) { | |
1923 | case BRIDGE_OV518: | |
1924 | rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518)); | |
1925 | if (rc < 0) | |
1926 | return rc; | |
1927 | break; | |
1928 | case BRIDGE_OV518PLUS: | |
1929 | rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p)); | |
1930 | if (rc < 0) | |
1931 | return rc; | |
1932 | break; | |
1933 | } | |
1934 | ||
1935 | rc = ov51x_upload_quan_tables(sd); | |
1936 | if (rc < 0) { | |
1937 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
1938 | return rc; | |
1939 | } | |
1940 | ||
1941 | rc = reg_w(sd, 0x2f, 0x80); | |
1942 | if (rc < 0) | |
1943 | return rc; | |
1944 | ||
1945 | return 0; | |
1946 | } | |
1947 | ||
1948 | static int ov519_configure(struct sd *sd) | |
1949 | { | |
1950 | static const struct ov_regvals init_519[] = { | |
1951 | { 0x5a, 0x6d }, /* EnableSystem */ | |
1952 | { 0x53, 0x9b }, | |
1953 | { 0x54, 0xff }, /* set bit2 to enable jpeg */ | |
1954 | { 0x5d, 0x03 }, | |
1955 | { 0x49, 0x01 }, | |
1956 | { 0x48, 0x00 }, | |
1957 | /* Set LED pin to output mode. Bit 4 must be cleared or sensor | |
1958 | * detection will fail. This deserves further investigation. */ | |
1959 | { OV519_GPIO_IO_CTRL0, 0xee }, | |
1960 | { 0x51, 0x0f }, /* SetUsbInit */ | |
1961 | { 0x51, 0x00 }, | |
1962 | { 0x22, 0x00 }, | |
1963 | /* windows reads 0x55 at this point*/ | |
1964 | }; | |
1965 | ||
1966 | return write_regvals(sd, init_519, ARRAY_SIZE(init_519)); | |
1967 | } | |
1968 | ||
1969 | /* this function is called at probe time */ | |
1970 | static int sd_config(struct gspca_dev *gspca_dev, | |
1971 | const struct usb_device_id *id) | |
1972 | { | |
1973 | struct sd *sd = (struct sd *) gspca_dev; | |
1974 | struct cam *cam; | |
1975 | int ret = 0; | |
1976 | ||
1977 | sd->bridge = id->driver_info & BRIDGE_MASK; | |
1978 | sd->invert_led = id->driver_info & BRIDGE_INVERT_LED; | |
1979 | ||
1980 | switch (sd->bridge) { | |
1981 | case BRIDGE_OV511: | |
1982 | case BRIDGE_OV511PLUS: | |
1983 | ret = ov511_configure(gspca_dev); | |
1984 | break; | |
1985 | case BRIDGE_OV518: | |
1986 | case BRIDGE_OV518PLUS: | |
1987 | ret = ov518_configure(gspca_dev); | |
1988 | break; | |
1989 | case BRIDGE_OV519: | |
1990 | ret = ov519_configure(sd); | |
1991 | break; | |
1992 | } | |
1993 | ||
1994 | if (ret) | |
1995 | goto error; | |
1996 | ||
1997 | ov51x_led_control(sd, 0); /* turn LED off */ | |
1998 | ||
1999 | /* Test for 76xx */ | |
2000 | if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0) | |
2001 | goto error; | |
2002 | ||
2003 | /* The OV519 must be more aggressive about sensor detection since | |
2004 | * I2C write will never fail if the sensor is not present. We have | |
2005 | * to try to initialize the sensor to detect its presence */ | |
2006 | if (init_ov_sensor(sd) >= 0) { | |
2007 | if (ov7xx0_configure(sd) < 0) { | |
2008 | PDEBUG(D_ERR, "Failed to configure OV7xx0"); | |
2009 | goto error; | |
2010 | } | |
2011 | } else { | |
2012 | ||
2013 | /* Test for 6xx0 */ | |
2014 | if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0) | |
2015 | goto error; | |
2016 | ||
2017 | if (init_ov_sensor(sd) >= 0) { | |
2018 | if (ov6xx0_configure(sd) < 0) { | |
2019 | PDEBUG(D_ERR, "Failed to configure OV6xx0"); | |
2020 | goto error; | |
2021 | } | |
2022 | } else { | |
2023 | ||
2024 | /* Test for 8xx0 */ | |
2025 | if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0) | |
2026 | goto error; | |
2027 | ||
2028 | if (init_ov_sensor(sd) < 0) { | |
2029 | PDEBUG(D_ERR, | |
2030 | "Can't determine sensor slave IDs"); | |
2031 | goto error; | |
2032 | } | |
2033 | if (ov8xx0_configure(sd) < 0) { | |
2034 | PDEBUG(D_ERR, | |
2035 | "Failed to configure OV8xx0 sensor"); | |
2036 | goto error; | |
2037 | } | |
2038 | } | |
2039 | } | |
2040 | ||
2041 | cam = &gspca_dev->cam; | |
2042 | switch (sd->bridge) { | |
2043 | case BRIDGE_OV511: | |
2044 | case BRIDGE_OV511PLUS: | |
2045 | if (!sd->sif) { | |
2046 | cam->cam_mode = ov511_vga_mode; | |
2047 | cam->nmodes = ARRAY_SIZE(ov511_vga_mode); | |
2048 | } else { | |
2049 | cam->cam_mode = ov511_sif_mode; | |
2050 | cam->nmodes = ARRAY_SIZE(ov511_sif_mode); | |
2051 | } | |
2052 | break; | |
2053 | case BRIDGE_OV518: | |
2054 | case BRIDGE_OV518PLUS: | |
2055 | if (!sd->sif) { | |
2056 | cam->cam_mode = ov518_vga_mode; | |
2057 | cam->nmodes = ARRAY_SIZE(ov518_vga_mode); | |
2058 | } else { | |
2059 | cam->cam_mode = ov518_sif_mode; | |
2060 | cam->nmodes = ARRAY_SIZE(ov518_sif_mode); | |
2061 | } | |
2062 | break; | |
2063 | case BRIDGE_OV519: | |
2064 | if (!sd->sif) { | |
2065 | cam->cam_mode = ov519_vga_mode; | |
2066 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | |
2067 | } else { | |
2068 | cam->cam_mode = ov519_sif_mode; | |
2069 | cam->nmodes = ARRAY_SIZE(ov519_sif_mode); | |
2070 | } | |
2071 | break; | |
2072 | } | |
2073 | sd->brightness = BRIGHTNESS_DEF; | |
2074 | if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF) | |
2075 | sd->contrast = 200; /* The default is too low for the ov6630 */ | |
2076 | else | |
2077 | sd->contrast = CONTRAST_DEF; | |
2078 | sd->colors = COLOR_DEF; | |
2079 | sd->hflip = HFLIP_DEF; | |
2080 | sd->vflip = VFLIP_DEF; | |
2081 | sd->autobrightness = AUTOBRIGHT_DEF; | |
2082 | if (sd->sensor == SEN_OV7670) { | |
2083 | sd->freq = OV7670_FREQ_DEF; | |
2084 | gspca_dev->ctrl_dis = 1 << FREQ_IDX; | |
2085 | } else { | |
2086 | sd->freq = FREQ_DEF; | |
2087 | gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | | |
2088 | (1 << OV7670_FREQ_IDX); | |
2089 | } | |
2090 | if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670) | |
2091 | gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX; | |
2092 | /* OV8610 Frequency filter control should work but needs testing */ | |
2093 | if (sd->sensor == SEN_OV8610) | |
2094 | gspca_dev->ctrl_dis |= 1 << FREQ_IDX; | |
2095 | ||
2096 | return 0; | |
2097 | error: | |
2098 | PDEBUG(D_ERR, "OV519 Config failed"); | |
2099 | return -EBUSY; | |
2100 | } | |
2101 | ||
2102 | /* this function is called at probe and resume time */ | |
2103 | static int sd_init(struct gspca_dev *gspca_dev) | |
2104 | { | |
2105 | struct sd *sd = (struct sd *) gspca_dev; | |
2106 | ||
2107 | /* initialize the sensor */ | |
2108 | switch (sd->sensor) { | |
2109 | case SEN_OV6620: | |
2110 | if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20))) | |
2111 | return -EIO; | |
2112 | break; | |
2113 | case SEN_OV6630: | |
2114 | case SEN_OV66308AF: | |
2115 | if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30))) | |
2116 | return -EIO; | |
2117 | break; | |
2118 | default: | |
2119 | /* case SEN_OV7610: */ | |
2120 | /* case SEN_OV76BE: */ | |
2121 | if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610))) | |
2122 | return -EIO; | |
2123 | if (i2c_w_mask(sd, 0x0e, 0x00, 0x40)) | |
2124 | return -EIO; | |
2125 | break; | |
2126 | case SEN_OV7620: | |
2127 | if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620))) | |
2128 | return -EIO; | |
2129 | break; | |
2130 | case SEN_OV7640: | |
2131 | if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640))) | |
2132 | return -EIO; | |
2133 | break; | |
2134 | case SEN_OV7670: | |
2135 | if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670))) | |
2136 | return -EIO; | |
2137 | break; | |
2138 | case SEN_OV8610: | |
2139 | if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610))) | |
2140 | return -EIO; | |
2141 | break; | |
2142 | } | |
2143 | return 0; | |
2144 | } | |
2145 | ||
2146 | /* Set up the OV511/OV511+ with the given image parameters. | |
2147 | * | |
2148 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
2149 | */ | |
2150 | static int ov511_mode_init_regs(struct sd *sd) | |
2151 | { | |
2152 | int hsegs, vsegs, packet_size, fps, needed; | |
2153 | int interlaced = 0; | |
2154 | struct usb_host_interface *alt; | |
2155 | struct usb_interface *intf; | |
2156 | ||
2157 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
2158 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
2159 | if (!alt) { | |
2160 | PDEBUG(D_ERR, "Couldn't get altsetting"); | |
2161 | return -EIO; | |
2162 | } | |
2163 | ||
2164 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
2165 | reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5); | |
2166 | ||
2167 | reg_w(sd, R511_CAM_UV_EN, 0x01); | |
2168 | reg_w(sd, R511_SNAP_UV_EN, 0x01); | |
2169 | reg_w(sd, R511_SNAP_OPTS, 0x03); | |
2170 | ||
2171 | /* Here I'm assuming that snapshot size == image size. | |
2172 | * I hope that's always true. --claudio | |
2173 | */ | |
2174 | hsegs = (sd->gspca_dev.width >> 3) - 1; | |
2175 | vsegs = (sd->gspca_dev.height >> 3) - 1; | |
2176 | ||
2177 | reg_w(sd, R511_CAM_PXCNT, hsegs); | |
2178 | reg_w(sd, R511_CAM_LNCNT, vsegs); | |
2179 | reg_w(sd, R511_CAM_PXDIV, 0x00); | |
2180 | reg_w(sd, R511_CAM_LNDIV, 0x00); | |
2181 | ||
2182 | /* YUV420, low pass filter on */ | |
2183 | reg_w(sd, R511_CAM_OPTS, 0x03); | |
2184 | ||
2185 | /* Snapshot additions */ | |
2186 | reg_w(sd, R511_SNAP_PXCNT, hsegs); | |
2187 | reg_w(sd, R511_SNAP_LNCNT, vsegs); | |
2188 | reg_w(sd, R511_SNAP_PXDIV, 0x00); | |
2189 | reg_w(sd, R511_SNAP_LNDIV, 0x00); | |
2190 | ||
2191 | /******** Set the framerate ********/ | |
2192 | if (frame_rate > 0) | |
2193 | sd->frame_rate = frame_rate; | |
2194 | ||
2195 | switch (sd->sensor) { | |
2196 | case SEN_OV6620: | |
2197 | /* No framerate control, doesn't like higher rates yet */ | |
2198 | sd->clockdiv = 3; | |
2199 | break; | |
2200 | ||
2201 | /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed | |
2202 | for more sensors we need to do this for them too */ | |
2203 | case SEN_OV7620: | |
2204 | case SEN_OV7640: | |
2205 | case SEN_OV76BE: | |
2206 | if (sd->gspca_dev.width == 320) | |
2207 | interlaced = 1; | |
2208 | /* Fall through */ | |
2209 | case SEN_OV6630: | |
2210 | case SEN_OV7610: | |
2211 | case SEN_OV7670: | |
2212 | switch (sd->frame_rate) { | |
2213 | case 30: | |
2214 | case 25: | |
2215 | /* Not enough bandwidth to do 640x480 @ 30 fps */ | |
2216 | if (sd->gspca_dev.width != 640) { | |
2217 | sd->clockdiv = 0; | |
2218 | break; | |
2219 | } | |
2220 | /* Fall through for 640x480 case */ | |
2221 | default: | |
2222 | /* case 20: */ | |
2223 | /* case 15: */ | |
2224 | sd->clockdiv = 1; | |
2225 | break; | |
2226 | case 10: | |
2227 | sd->clockdiv = 2; | |
2228 | break; | |
2229 | case 5: | |
2230 | sd->clockdiv = 5; | |
2231 | break; | |
2232 | } | |
2233 | if (interlaced) { | |
2234 | sd->clockdiv = (sd->clockdiv + 1) * 2 - 1; | |
2235 | /* Higher then 10 does not work */ | |
2236 | if (sd->clockdiv > 10) | |
2237 | sd->clockdiv = 10; | |
2238 | } | |
2239 | break; | |
2240 | ||
2241 | case SEN_OV8610: | |
2242 | /* No framerate control ?? */ | |
2243 | sd->clockdiv = 0; | |
2244 | break; | |
2245 | } | |
2246 | ||
2247 | /* Check if we have enough bandwidth to disable compression */ | |
2248 | fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1; | |
2249 | needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2; | |
2250 | /* 1400 is a conservative estimate of the max nr of isoc packets/sec */ | |
2251 | if (needed > 1400 * packet_size) { | |
2252 | /* Enable Y and UV quantization and compression */ | |
2253 | reg_w(sd, R511_COMP_EN, 0x07); | |
2254 | reg_w(sd, R511_COMP_LUT_EN, 0x03); | |
2255 | } else { | |
2256 | reg_w(sd, R511_COMP_EN, 0x06); | |
2257 | reg_w(sd, R511_COMP_LUT_EN, 0x00); | |
2258 | } | |
2259 | ||
2260 | reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE); | |
2261 | reg_w(sd, R51x_SYS_RESET, 0); | |
2262 | ||
2263 | return 0; | |
2264 | } | |
2265 | ||
2266 | /* Sets up the OV518/OV518+ with the given image parameters | |
2267 | * | |
2268 | * OV518 needs a completely different approach, until we can figure out what | |
2269 | * the individual registers do. Also, only 15 FPS is supported now. | |
2270 | * | |
2271 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
2272 | */ | |
2273 | static int ov518_mode_init_regs(struct sd *sd) | |
2274 | { | |
2275 | int hsegs, vsegs, packet_size; | |
2276 | struct usb_host_interface *alt; | |
2277 | struct usb_interface *intf; | |
2278 | ||
2279 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
2280 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
2281 | if (!alt) { | |
2282 | PDEBUG(D_ERR, "Couldn't get altsetting"); | |
2283 | return -EIO; | |
2284 | } | |
2285 | ||
2286 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
2287 | ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2); | |
2288 | ||
2289 | /******** Set the mode ********/ | |
2290 | ||
2291 | reg_w(sd, 0x2b, 0); | |
2292 | reg_w(sd, 0x2c, 0); | |
2293 | reg_w(sd, 0x2d, 0); | |
2294 | reg_w(sd, 0x2e, 0); | |
2295 | reg_w(sd, 0x3b, 0); | |
2296 | reg_w(sd, 0x3c, 0); | |
2297 | reg_w(sd, 0x3d, 0); | |
2298 | reg_w(sd, 0x3e, 0); | |
2299 | ||
2300 | if (sd->bridge == BRIDGE_OV518) { | |
2301 | /* Set 8-bit (YVYU) input format */ | |
2302 | reg_w_mask(sd, 0x20, 0x08, 0x08); | |
2303 | ||
2304 | /* Set 12-bit (4:2:0) output format */ | |
2305 | reg_w_mask(sd, 0x28, 0x80, 0xf0); | |
2306 | reg_w_mask(sd, 0x38, 0x80, 0xf0); | |
2307 | } else { | |
2308 | reg_w(sd, 0x28, 0x80); | |
2309 | reg_w(sd, 0x38, 0x80); | |
2310 | } | |
2311 | ||
2312 | hsegs = sd->gspca_dev.width / 16; | |
2313 | vsegs = sd->gspca_dev.height / 4; | |
2314 | ||
2315 | reg_w(sd, 0x29, hsegs); | |
2316 | reg_w(sd, 0x2a, vsegs); | |
2317 | ||
2318 | reg_w(sd, 0x39, hsegs); | |
2319 | reg_w(sd, 0x3a, vsegs); | |
2320 | ||
2321 | /* Windows driver does this here; who knows why */ | |
2322 | reg_w(sd, 0x2f, 0x80); | |
2323 | ||
2324 | /******** Set the framerate ********/ | |
2325 | sd->clockdiv = 1; | |
2326 | ||
2327 | /* Mode independent, but framerate dependent, regs */ | |
2328 | /* 0x51: Clock divider; Only works on some cams which use 2 crystals */ | |
2329 | reg_w(sd, 0x51, 0x04); | |
2330 | reg_w(sd, 0x22, 0x18); | |
2331 | reg_w(sd, 0x23, 0xff); | |
2332 | ||
2333 | if (sd->bridge == BRIDGE_OV518PLUS) { | |
2334 | switch (sd->sensor) { | |
2335 | case SEN_OV7620: | |
2336 | if (sd->gspca_dev.width == 320) { | |
2337 | reg_w(sd, 0x20, 0x00); | |
2338 | reg_w(sd, 0x21, 0x19); | |
2339 | } else { | |
2340 | reg_w(sd, 0x20, 0x60); | |
2341 | reg_w(sd, 0x21, 0x1f); | |
2342 | } | |
2343 | break; | |
2344 | default: | |
2345 | reg_w(sd, 0x21, 0x19); | |
2346 | } | |
2347 | } else | |
2348 | reg_w(sd, 0x71, 0x17); /* Compression-related? */ | |
2349 | ||
2350 | /* FIXME: Sensor-specific */ | |
2351 | /* Bit 5 is what matters here. Of course, it is "reserved" */ | |
2352 | i2c_w(sd, 0x54, 0x23); | |
2353 | ||
2354 | reg_w(sd, 0x2f, 0x80); | |
2355 | ||
2356 | if (sd->bridge == BRIDGE_OV518PLUS) { | |
2357 | reg_w(sd, 0x24, 0x94); | |
2358 | reg_w(sd, 0x25, 0x90); | |
2359 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
2360 | ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */ | |
2361 | ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */ | |
2362 | ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */ | |
2363 | ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */ | |
2364 | ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */ | |
2365 | ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */ | |
2366 | ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */ | |
2367 | ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */ | |
2368 | } else { | |
2369 | reg_w(sd, 0x24, 0x9f); | |
2370 | reg_w(sd, 0x25, 0x90); | |
2371 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
2372 | ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */ | |
2373 | ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */ | |
2374 | ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */ | |
2375 | ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */ | |
2376 | ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */ | |
2377 | ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */ | |
2378 | ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */ | |
2379 | ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */ | |
2380 | } | |
2381 | ||
2382 | reg_w(sd, 0x2f, 0x80); | |
2383 | ||
2384 | return 0; | |
2385 | } | |
2386 | ||
2387 | ||
2388 | /* Sets up the OV519 with the given image parameters | |
2389 | * | |
2390 | * OV519 needs a completely different approach, until we can figure out what | |
2391 | * the individual registers do. | |
2392 | * | |
2393 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
2394 | */ | |
2395 | static int ov519_mode_init_regs(struct sd *sd) | |
2396 | { | |
2397 | static const struct ov_regvals mode_init_519_ov7670[] = { | |
2398 | { 0x5d, 0x03 }, /* Turn off suspend mode */ | |
2399 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
2400 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
2401 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
2402 | { 0xa3, 0x18 }, | |
2403 | { 0xa4, 0x04 }, | |
2404 | { 0xa5, 0x28 }, | |
2405 | { 0x37, 0x00 }, /* SetUsbInit */ | |
2406 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
2407 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
2408 | { 0x20, 0x0c }, | |
2409 | { 0x21, 0x38 }, | |
2410 | { 0x22, 0x1d }, | |
2411 | { 0x17, 0x50 }, /* undocumented */ | |
2412 | { 0x37, 0x00 }, /* undocumented */ | |
2413 | { 0x40, 0xff }, /* I2C timeout counter */ | |
2414 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
2415 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
2416 | { 0xff, 0x00 }, /* undocumented */ | |
2417 | /* windows reads 0x55 at this point, why? */ | |
2418 | }; | |
2419 | ||
2420 | static const struct ov_regvals mode_init_519[] = { | |
2421 | { 0x5d, 0x03 }, /* Turn off suspend mode */ | |
2422 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
2423 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
2424 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
2425 | { 0xa3, 0x18 }, | |
2426 | { 0xa4, 0x04 }, | |
2427 | { 0xa5, 0x28 }, | |
2428 | { 0x37, 0x00 }, /* SetUsbInit */ | |
2429 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
2430 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
2431 | { 0x22, 0x1d }, | |
2432 | { 0x17, 0x50 }, /* undocumented */ | |
2433 | { 0x37, 0x00 }, /* undocumented */ | |
2434 | { 0x40, 0xff }, /* I2C timeout counter */ | |
2435 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
2436 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
2437 | { 0xff, 0x00 }, /* undocumented */ | |
2438 | /* windows reads 0x55 at this point, why? */ | |
2439 | }; | |
2440 | ||
2441 | /******** Set the mode ********/ | |
2442 | if (sd->sensor != SEN_OV7670) { | |
2443 | if (write_regvals(sd, mode_init_519, | |
2444 | ARRAY_SIZE(mode_init_519))) | |
2445 | return -EIO; | |
2446 | if (sd->sensor == SEN_OV7640) { | |
2447 | /* Select 8-bit input mode */ | |
2448 | reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); | |
2449 | } | |
2450 | } else { | |
2451 | if (write_regvals(sd, mode_init_519_ov7670, | |
2452 | ARRAY_SIZE(mode_init_519_ov7670))) | |
2453 | return -EIO; | |
2454 | } | |
2455 | ||
2456 | reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4); | |
2457 | reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3); | |
2458 | if (sd->sensor == SEN_OV7670 && | |
2459 | sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) | |
2460 | reg_w(sd, OV519_R12_X_OFFSETL, 0x04); | |
2461 | else | |
2462 | reg_w(sd, OV519_R12_X_OFFSETL, 0x00); | |
2463 | reg_w(sd, OV519_R13_X_OFFSETH, 0x00); | |
2464 | reg_w(sd, OV519_R14_Y_OFFSETL, 0x00); | |
2465 | reg_w(sd, OV519_R15_Y_OFFSETH, 0x00); | |
2466 | reg_w(sd, OV519_R16_DIVIDER, 0x00); | |
2467 | reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */ | |
2468 | reg_w(sd, 0x26, 0x00); /* Undocumented */ | |
2469 | ||
2470 | /******** Set the framerate ********/ | |
2471 | if (frame_rate > 0) | |
2472 | sd->frame_rate = frame_rate; | |
2473 | ||
2474 | /* FIXME: These are only valid at the max resolution. */ | |
2475 | sd->clockdiv = 0; | |
2476 | switch (sd->sensor) { | |
2477 | case SEN_OV7640: | |
2478 | switch (sd->frame_rate) { | |
2479 | default: | |
2480 | /* case 30: */ | |
2481 | reg_w(sd, 0xa4, 0x0c); | |
2482 | reg_w(sd, 0x23, 0xff); | |
2483 | break; | |
2484 | case 25: | |
2485 | reg_w(sd, 0xa4, 0x0c); | |
2486 | reg_w(sd, 0x23, 0x1f); | |
2487 | break; | |
2488 | case 20: | |
2489 | reg_w(sd, 0xa4, 0x0c); | |
2490 | reg_w(sd, 0x23, 0x1b); | |
2491 | break; | |
2492 | case 15: | |
2493 | reg_w(sd, 0xa4, 0x04); | |
2494 | reg_w(sd, 0x23, 0xff); | |
2495 | sd->clockdiv = 1; | |
2496 | break; | |
2497 | case 10: | |
2498 | reg_w(sd, 0xa4, 0x04); | |
2499 | reg_w(sd, 0x23, 0x1f); | |
2500 | sd->clockdiv = 1; | |
2501 | break; | |
2502 | case 5: | |
2503 | reg_w(sd, 0xa4, 0x04); | |
2504 | reg_w(sd, 0x23, 0x1b); | |
2505 | sd->clockdiv = 1; | |
2506 | break; | |
2507 | } | |
2508 | break; | |
2509 | case SEN_OV8610: | |
2510 | switch (sd->frame_rate) { | |
2511 | default: /* 15 fps */ | |
2512 | /* case 15: */ | |
2513 | reg_w(sd, 0xa4, 0x06); | |
2514 | reg_w(sd, 0x23, 0xff); | |
2515 | break; | |
2516 | case 10: | |
2517 | reg_w(sd, 0xa4, 0x06); | |
2518 | reg_w(sd, 0x23, 0x1f); | |
2519 | break; | |
2520 | case 5: | |
2521 | reg_w(sd, 0xa4, 0x06); | |
2522 | reg_w(sd, 0x23, 0x1b); | |
2523 | break; | |
2524 | } | |
2525 | break; | |
2526 | case SEN_OV7670: /* guesses, based on 7640 */ | |
2527 | PDEBUG(D_STREAM, "Setting framerate to %d fps", | |
2528 | (sd->frame_rate == 0) ? 15 : sd->frame_rate); | |
2529 | reg_w(sd, 0xa4, 0x10); | |
2530 | switch (sd->frame_rate) { | |
2531 | case 30: | |
2532 | reg_w(sd, 0x23, 0xff); | |
2533 | break; | |
2534 | case 20: | |
2535 | reg_w(sd, 0x23, 0x1b); | |
2536 | break; | |
2537 | default: | |
2538 | /* case 15: */ | |
2539 | reg_w(sd, 0x23, 0xff); | |
2540 | sd->clockdiv = 1; | |
2541 | break; | |
2542 | } | |
2543 | break; | |
2544 | } | |
2545 | return 0; | |
2546 | } | |
2547 | ||
2548 | static int mode_init_ov_sensor_regs(struct sd *sd) | |
2549 | { | |
2550 | struct gspca_dev *gspca_dev; | |
2551 | int qvga; | |
2552 | ||
2553 | gspca_dev = &sd->gspca_dev; | |
2554 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; | |
2555 | ||
2556 | /******** Mode (VGA/QVGA) and sensor specific regs ********/ | |
2557 | switch (sd->sensor) { | |
2558 | case SEN_OV8610: | |
2559 | /* For OV8610 qvga means qsvga */ | |
2560 | i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5); | |
2561 | break; | |
2562 | case SEN_OV7610: | |
2563 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
2564 | break; | |
2565 | case SEN_OV7620: | |
2566 | case SEN_OV76BE: | |
2567 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
2568 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
2569 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
2570 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
2571 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
2572 | i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0); | |
2573 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); | |
2574 | break; | |
2575 | case SEN_OV7640: | |
2576 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
2577 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
2578 | /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */ | |
2579 | /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */ | |
2580 | /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */ | |
2581 | /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */ | |
2582 | /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */ | |
2583 | break; | |
2584 | case SEN_OV7670: | |
2585 | /* set COM7_FMT_VGA or COM7_FMT_QVGA | |
2586 | * do we need to set anything else? | |
2587 | * HSTART etc are set in set_ov_sensor_window itself */ | |
2588 | i2c_w_mask(sd, OV7670_REG_COM7, | |
2589 | qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA, | |
2590 | OV7670_COM7_FMT_MASK); | |
2591 | break; | |
2592 | case SEN_OV6620: | |
2593 | case SEN_OV6630: | |
2594 | case SEN_OV66308AF: | |
2595 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
2596 | break; | |
2597 | default: | |
2598 | return -EINVAL; | |
2599 | } | |
2600 | ||
2601 | /******** Palette-specific regs ********/ | |
2602 | ||
2603 | /* The OV518 needs special treatment. Although both the OV518 | |
2604 | * and the OV6630 support a 16-bit video bus, only the 8 bit Y | |
2605 | * bus is actually used. The UV bus is tied to ground. | |
2606 | * Therefore, the OV6630 needs to be in 8-bit multiplexed | |
2607 | * output mode */ | |
2608 | ||
2609 | /* OV7640 is 8-bit only */ | |
2610 | ||
2611 | if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF && | |
2612 | sd->sensor != SEN_OV7640) | |
2613 | i2c_w_mask(sd, 0x13, 0x00, 0x20); | |
2614 | ||
2615 | /******** Clock programming ********/ | |
2616 | i2c_w(sd, 0x11, sd->clockdiv); | |
2617 | ||
2618 | /******** Special Features ********/ | |
2619 | /* no evidence this is possible with OV7670, either */ | |
2620 | /* Test Pattern */ | |
2621 | if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670) | |
2622 | i2c_w_mask(sd, 0x12, 0x00, 0x02); | |
2623 | ||
2624 | /* Enable auto white balance */ | |
2625 | if (sd->sensor == SEN_OV7670) | |
2626 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB, | |
2627 | OV7670_COM8_AWB); | |
2628 | else | |
2629 | i2c_w_mask(sd, 0x12, 0x04, 0x04); | |
2630 | ||
2631 | /* This will go away as soon as ov51x_mode_init_sensor_regs() */ | |
2632 | /* is fully tested. */ | |
2633 | /* 7620/6620/6630? don't have register 0x35, so play it safe */ | |
2634 | if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) { | |
2635 | if (!qvga) | |
2636 | i2c_w(sd, 0x35, 0x9e); | |
2637 | else | |
2638 | i2c_w(sd, 0x35, 0x1e); | |
2639 | } | |
2640 | return 0; | |
2641 | } | |
2642 | ||
2643 | static void sethvflip(struct sd *sd) | |
2644 | { | |
2645 | if (sd->sensor != SEN_OV7670) | |
2646 | return; | |
2647 | if (sd->gspca_dev.streaming) | |
2648 | ov51x_stop(sd); | |
2649 | i2c_w_mask(sd, OV7670_REG_MVFP, | |
2650 | OV7670_MVFP_MIRROR * sd->hflip | |
2651 | | OV7670_MVFP_VFLIP * sd->vflip, | |
2652 | OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP); | |
2653 | if (sd->gspca_dev.streaming) | |
2654 | ov51x_restart(sd); | |
2655 | } | |
2656 | ||
2657 | static int set_ov_sensor_window(struct sd *sd) | |
2658 | { | |
2659 | struct gspca_dev *gspca_dev; | |
2660 | int qvga, crop; | |
2661 | int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale; | |
2662 | int ret, hstart, hstop, vstop, vstart; | |
2663 | __u8 v; | |
2664 | ||
2665 | gspca_dev = &sd->gspca_dev; | |
2666 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; | |
2667 | crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2; | |
2668 | ||
2669 | /* The different sensor ICs handle setting up of window differently. | |
2670 | * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */ | |
2671 | switch (sd->sensor) { | |
2672 | case SEN_OV8610: | |
2673 | hwsbase = 0x1e; | |
2674 | hwebase = 0x1e; | |
2675 | vwsbase = 0x02; | |
2676 | vwebase = 0x02; | |
2677 | break; | |
2678 | case SEN_OV7610: | |
2679 | case SEN_OV76BE: | |
2680 | hwsbase = 0x38; | |
2681 | hwebase = 0x3a; | |
2682 | vwsbase = vwebase = 0x05; | |
2683 | break; | |
2684 | case SEN_OV6620: | |
2685 | case SEN_OV6630: | |
2686 | case SEN_OV66308AF: | |
2687 | hwsbase = 0x38; | |
2688 | hwebase = 0x3a; | |
2689 | vwsbase = 0x05; | |
2690 | vwebase = 0x06; | |
2691 | if (sd->sensor == SEN_OV66308AF && qvga) | |
2692 | /* HDG: this fixes U and V getting swapped */ | |
2693 | hwsbase++; | |
2694 | if (crop) { | |
2695 | hwsbase += 8; | |
2696 | hwebase += 8; | |
2697 | vwsbase += 11; | |
2698 | vwebase += 11; | |
2699 | } | |
2700 | break; | |
2701 | case SEN_OV7620: | |
2702 | hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ | |
2703 | hwebase = 0x2f; | |
2704 | vwsbase = vwebase = 0x05; | |
2705 | break; | |
2706 | case SEN_OV7640: | |
2707 | hwsbase = 0x1a; | |
2708 | hwebase = 0x1a; | |
2709 | vwsbase = vwebase = 0x03; | |
2710 | break; | |
2711 | case SEN_OV7670: | |
2712 | /*handling of OV7670 hardware sensor start and stop values | |
2713 | * is very odd, compared to the other OV sensors */ | |
2714 | vwsbase = vwebase = hwebase = hwsbase = 0x00; | |
2715 | break; | |
2716 | default: | |
2717 | return -EINVAL; | |
2718 | } | |
2719 | ||
2720 | switch (sd->sensor) { | |
2721 | case SEN_OV6620: | |
2722 | case SEN_OV6630: | |
2723 | case SEN_OV66308AF: | |
2724 | if (qvga) { /* QCIF */ | |
2725 | hwscale = 0; | |
2726 | vwscale = 0; | |
2727 | } else { /* CIF */ | |
2728 | hwscale = 1; | |
2729 | vwscale = 1; /* The datasheet says 0; | |
2730 | * it's wrong */ | |
2731 | } | |
2732 | break; | |
2733 | case SEN_OV8610: | |
2734 | if (qvga) { /* QSVGA */ | |
2735 | hwscale = 1; | |
2736 | vwscale = 1; | |
2737 | } else { /* SVGA */ | |
2738 | hwscale = 2; | |
2739 | vwscale = 2; | |
2740 | } | |
2741 | break; | |
2742 | default: /* SEN_OV7xx0 */ | |
2743 | if (qvga) { /* QVGA */ | |
2744 | hwscale = 1; | |
2745 | vwscale = 0; | |
2746 | } else { /* VGA */ | |
2747 | hwscale = 2; | |
2748 | vwscale = 1; | |
2749 | } | |
2750 | } | |
2751 | ||
2752 | ret = mode_init_ov_sensor_regs(sd); | |
2753 | if (ret < 0) | |
2754 | return ret; | |
2755 | ||
2756 | if (sd->sensor == SEN_OV8610) { | |
2757 | i2c_w_mask(sd, 0x2d, 0x05, 0x40); | |
2758 | /* old 0x95, new 0x05 from windrv 090403 */ | |
2759 | /* bits 5-7: reserved */ | |
2760 | i2c_w_mask(sd, 0x28, 0x20, 0x20); | |
2761 | /* bit 5: progressive mode on */ | |
2762 | } | |
2763 | ||
2764 | /* The below is wrong for OV7670s because their window registers | |
2765 | * only store the high bits in 0x17 to 0x1a */ | |
2766 | ||
2767 | /* SRH Use sd->max values instead of requested win values */ | |
2768 | /* SCS Since we're sticking with only the max hardware widths | |
2769 | * for a given mode */ | |
2770 | /* I can hard code this for OV7670s */ | |
2771 | /* Yes, these numbers do look odd, but they're tested and work! */ | |
2772 | if (sd->sensor == SEN_OV7670) { | |
2773 | if (qvga) { /* QVGA from ov7670.c by | |
2774 | * Jonathan Corbet */ | |
2775 | hstart = 164; | |
2776 | hstop = 28; | |
2777 | vstart = 14; | |
2778 | vstop = 494; | |
2779 | } else { /* VGA */ | |
2780 | hstart = 158; | |
2781 | hstop = 14; | |
2782 | vstart = 10; | |
2783 | vstop = 490; | |
2784 | } | |
2785 | /* OV7670 hardware window registers are split across | |
2786 | * multiple locations */ | |
2787 | i2c_w(sd, OV7670_REG_HSTART, hstart >> 3); | |
2788 | i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3); | |
2789 | v = i2c_r(sd, OV7670_REG_HREF); | |
2790 | v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07); | |
2791 | msleep(10); /* need to sleep between read and write to | |
2792 | * same reg! */ | |
2793 | i2c_w(sd, OV7670_REG_HREF, v); | |
2794 | ||
2795 | i2c_w(sd, OV7670_REG_VSTART, vstart >> 2); | |
2796 | i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2); | |
2797 | v = i2c_r(sd, OV7670_REG_VREF); | |
2798 | v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03); | |
2799 | msleep(10); /* need to sleep between read and write to | |
2800 | * same reg! */ | |
2801 | i2c_w(sd, OV7670_REG_VREF, v); | |
2802 | } else { | |
2803 | i2c_w(sd, 0x17, hwsbase); | |
2804 | i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale)); | |
2805 | i2c_w(sd, 0x19, vwsbase); | |
2806 | i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale)); | |
2807 | } | |
2808 | return 0; | |
2809 | } | |
2810 | ||
2811 | /* -- start the camera -- */ | |
2812 | static int sd_start(struct gspca_dev *gspca_dev) | |
2813 | { | |
2814 | struct sd *sd = (struct sd *) gspca_dev; | |
2815 | int ret = 0; | |
2816 | ||
2817 | switch (sd->bridge) { | |
2818 | case BRIDGE_OV511: | |
2819 | case BRIDGE_OV511PLUS: | |
2820 | ret = ov511_mode_init_regs(sd); | |
2821 | break; | |
2822 | case BRIDGE_OV518: | |
2823 | case BRIDGE_OV518PLUS: | |
2824 | ret = ov518_mode_init_regs(sd); | |
2825 | break; | |
2826 | case BRIDGE_OV519: | |
2827 | ret = ov519_mode_init_regs(sd); | |
2828 | break; | |
2829 | } | |
2830 | if (ret < 0) | |
2831 | goto out; | |
2832 | ||
2833 | ret = set_ov_sensor_window(sd); | |
2834 | if (ret < 0) | |
2835 | goto out; | |
2836 | ||
2837 | setcontrast(gspca_dev); | |
2838 | setbrightness(gspca_dev); | |
2839 | setcolors(gspca_dev); | |
2840 | sethvflip(sd); | |
2841 | setautobrightness(sd); | |
2842 | setfreq(sd); | |
2843 | ||
2844 | ret = ov51x_restart(sd); | |
2845 | if (ret < 0) | |
2846 | goto out; | |
2847 | ov51x_led_control(sd, 1); | |
2848 | return 0; | |
2849 | out: | |
2850 | PDEBUG(D_ERR, "camera start error:%d", ret); | |
2851 | return ret; | |
2852 | } | |
2853 | ||
2854 | static void sd_stopN(struct gspca_dev *gspca_dev) | |
2855 | { | |
2856 | struct sd *sd = (struct sd *) gspca_dev; | |
2857 | ||
2858 | ov51x_stop(sd); | |
2859 | ov51x_led_control(sd, 0); | |
2860 | } | |
2861 | ||
2862 | static void ov511_pkt_scan(struct gspca_dev *gspca_dev, | |
2863 | struct gspca_frame *frame, /* target */ | |
2864 | __u8 *in, /* isoc packet */ | |
2865 | int len) /* iso packet length */ | |
2866 | { | |
2867 | struct sd *sd = (struct sd *) gspca_dev; | |
2868 | ||
2869 | /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th | |
2870 | * byte non-zero. The EOF packet has image width/height in the | |
2871 | * 10th and 11th bytes. The 9th byte is given as follows: | |
2872 | * | |
2873 | * bit 7: EOF | |
2874 | * 6: compression enabled | |
2875 | * 5: 422/420/400 modes | |
2876 | * 4: 422/420/400 modes | |
2877 | * 3: 1 | |
2878 | * 2: snapshot button on | |
2879 | * 1: snapshot frame | |
2880 | * 0: even/odd field | |
2881 | */ | |
2882 | if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) && | |
2883 | (in[8] & 0x08)) { | |
2884 | if (in[8] & 0x80) { | |
2885 | /* Frame end */ | |
2886 | if ((in[9] + 1) * 8 != gspca_dev->width || | |
2887 | (in[10] + 1) * 8 != gspca_dev->height) { | |
2888 | PDEBUG(D_ERR, "Invalid frame size, got: %dx%d," | |
2889 | " requested: %dx%d\n", | |
2890 | (in[9] + 1) * 8, (in[10] + 1) * 8, | |
2891 | gspca_dev->width, gspca_dev->height); | |
2892 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
2893 | return; | |
2894 | } | |
2895 | /* Add 11 byte footer to frame, might be usefull */ | |
2896 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11); | |
2897 | return; | |
2898 | } else { | |
2899 | /* Frame start */ | |
2900 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0); | |
2901 | sd->packet_nr = 0; | |
2902 | } | |
2903 | } | |
2904 | ||
2905 | /* Ignore the packet number */ | |
2906 | len--; | |
2907 | ||
2908 | /* intermediate packet */ | |
2909 | gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len); | |
2910 | } | |
2911 | ||
2912 | static void ov518_pkt_scan(struct gspca_dev *gspca_dev, | |
2913 | struct gspca_frame *frame, /* target */ | |
2914 | __u8 *data, /* isoc packet */ | |
2915 | int len) /* iso packet length */ | |
2916 | { | |
2917 | struct sd *sd = (struct sd *) gspca_dev; | |
2918 | ||
2919 | /* A false positive here is likely, until OVT gives me | |
2920 | * the definitive SOF/EOF format */ | |
2921 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { | |
2922 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); | |
2923 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); | |
2924 | sd->packet_nr = 0; | |
2925 | } | |
2926 | ||
2927 | if (gspca_dev->last_packet_type == DISCARD_PACKET) | |
2928 | return; | |
2929 | ||
2930 | /* Does this device use packet numbers ? */ | |
2931 | if (len & 7) { | |
2932 | len--; | |
2933 | if (sd->packet_nr == data[len]) | |
2934 | sd->packet_nr++; | |
2935 | /* The last few packets of the frame (which are all 0's | |
2936 | except that they may contain part of the footer), are | |
2937 | numbered 0 */ | |
2938 | else if (sd->packet_nr == 0 || data[len]) { | |
2939 | PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)", | |
2940 | (int)data[len], (int)sd->packet_nr); | |
2941 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
2942 | return; | |
2943 | } | |
2944 | } | |
2945 | ||
2946 | /* intermediate packet */ | |
2947 | gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len); | |
2948 | } | |
2949 | ||
2950 | static void ov519_pkt_scan(struct gspca_dev *gspca_dev, | |
2951 | struct gspca_frame *frame, /* target */ | |
2952 | __u8 *data, /* isoc packet */ | |
2953 | int len) /* iso packet length */ | |
2954 | { | |
2955 | /* Header of ov519 is 16 bytes: | |
2956 | * Byte Value Description | |
2957 | * 0 0xff magic | |
2958 | * 1 0xff magic | |
2959 | * 2 0xff magic | |
2960 | * 3 0xXX 0x50 = SOF, 0x51 = EOF | |
2961 | * 9 0xXX 0x01 initial frame without data, | |
2962 | * 0x00 standard frame with image | |
2963 | * 14 Lo in EOF: length of image data / 8 | |
2964 | * 15 Hi | |
2965 | */ | |
2966 | ||
2967 | if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { | |
2968 | switch (data[3]) { | |
2969 | case 0x50: /* start of frame */ | |
2970 | #define HDRSZ 16 | |
2971 | data += HDRSZ; | |
2972 | len -= HDRSZ; | |
2973 | #undef HDRSZ | |
2974 | if (data[0] == 0xff || data[1] == 0xd8) | |
2975 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, | |
2976 | data, len); | |
2977 | else | |
2978 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
2979 | return; | |
2980 | case 0x51: /* end of frame */ | |
2981 | if (data[9] != 0) | |
2982 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
2983 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, | |
2984 | data, 0); | |
2985 | return; | |
2986 | } | |
2987 | } | |
2988 | ||
2989 | /* intermediate packet */ | |
2990 | gspca_frame_add(gspca_dev, INTER_PACKET, frame, | |
2991 | data, len); | |
2992 | } | |
2993 | ||
2994 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, | |
2995 | struct gspca_frame *frame, /* target */ | |
2996 | __u8 *data, /* isoc packet */ | |
2997 | int len) /* iso packet length */ | |
2998 | { | |
2999 | struct sd *sd = (struct sd *) gspca_dev; | |
3000 | ||
3001 | switch (sd->bridge) { | |
3002 | case BRIDGE_OV511: | |
3003 | case BRIDGE_OV511PLUS: | |
3004 | ov511_pkt_scan(gspca_dev, frame, data, len); | |
3005 | break; | |
3006 | case BRIDGE_OV518: | |
3007 | case BRIDGE_OV518PLUS: | |
3008 | ov518_pkt_scan(gspca_dev, frame, data, len); | |
3009 | break; | |
3010 | case BRIDGE_OV519: | |
3011 | ov519_pkt_scan(gspca_dev, frame, data, len); | |
3012 | break; | |
3013 | } | |
3014 | } | |
3015 | ||
3016 | /* -- management routines -- */ | |
3017 | ||
3018 | static void setbrightness(struct gspca_dev *gspca_dev) | |
3019 | { | |
3020 | struct sd *sd = (struct sd *) gspca_dev; | |
3021 | int val; | |
3022 | ||
3023 | val = sd->brightness; | |
3024 | switch (sd->sensor) { | |
3025 | case SEN_OV8610: | |
3026 | case SEN_OV7610: | |
3027 | case SEN_OV76BE: | |
3028 | case SEN_OV6620: | |
3029 | case SEN_OV6630: | |
3030 | case SEN_OV66308AF: | |
3031 | case SEN_OV7640: | |
3032 | i2c_w(sd, OV7610_REG_BRT, val); | |
3033 | break; | |
3034 | case SEN_OV7620: | |
3035 | /* 7620 doesn't like manual changes when in auto mode */ | |
3036 | if (!sd->autobrightness) | |
3037 | i2c_w(sd, OV7610_REG_BRT, val); | |
3038 | break; | |
3039 | case SEN_OV7670: | |
3040 | /*win trace | |
3041 | * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */ | |
3042 | i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val)); | |
3043 | break; | |
3044 | } | |
3045 | } | |
3046 | ||
3047 | static void setcontrast(struct gspca_dev *gspca_dev) | |
3048 | { | |
3049 | struct sd *sd = (struct sd *) gspca_dev; | |
3050 | int val; | |
3051 | ||
3052 | val = sd->contrast; | |
3053 | switch (sd->sensor) { | |
3054 | case SEN_OV7610: | |
3055 | case SEN_OV6620: | |
3056 | i2c_w(sd, OV7610_REG_CNT, val); | |
3057 | break; | |
3058 | case SEN_OV6630: | |
3059 | case SEN_OV66308AF: | |
3060 | i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f); | |
3061 | break; | |
3062 | case SEN_OV8610: { | |
3063 | static const __u8 ctab[] = { | |
3064 | 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f | |
3065 | }; | |
3066 | ||
3067 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
3068 | i2c_w(sd, 0x64, ctab[val >> 5]); | |
3069 | break; | |
3070 | } | |
3071 | case SEN_OV7620: { | |
3072 | static const __u8 ctab[] = { | |
3073 | 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, | |
3074 | 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff | |
3075 | }; | |
3076 | ||
3077 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
3078 | i2c_w(sd, 0x64, ctab[val >> 4]); | |
3079 | break; | |
3080 | } | |
3081 | case SEN_OV7640: | |
3082 | /* Use gain control instead. */ | |
3083 | i2c_w(sd, OV7610_REG_GAIN, val >> 2); | |
3084 | break; | |
3085 | case SEN_OV7670: | |
3086 | /* check that this isn't just the same as ov7610 */ | |
3087 | i2c_w(sd, OV7670_REG_CONTRAS, val >> 1); | |
3088 | break; | |
3089 | } | |
3090 | } | |
3091 | ||
3092 | static void setcolors(struct gspca_dev *gspca_dev) | |
3093 | { | |
3094 | struct sd *sd = (struct sd *) gspca_dev; | |
3095 | int val; | |
3096 | ||
3097 | val = sd->colors; | |
3098 | switch (sd->sensor) { | |
3099 | case SEN_OV8610: | |
3100 | case SEN_OV7610: | |
3101 | case SEN_OV76BE: | |
3102 | case SEN_OV6620: | |
3103 | case SEN_OV6630: | |
3104 | case SEN_OV66308AF: | |
3105 | i2c_w(sd, OV7610_REG_SAT, val); | |
3106 | break; | |
3107 | case SEN_OV7620: | |
3108 | /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ | |
3109 | /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); | |
3110 | if (rc < 0) | |
3111 | goto out; */ | |
3112 | i2c_w(sd, OV7610_REG_SAT, val); | |
3113 | break; | |
3114 | case SEN_OV7640: | |
3115 | i2c_w(sd, OV7610_REG_SAT, val & 0xf0); | |
3116 | break; | |
3117 | case SEN_OV7670: | |
3118 | /* supported later once I work out how to do it | |
3119 | * transparently fail now! */ | |
3120 | /* set REG_COM13 values for UV sat auto mode */ | |
3121 | break; | |
3122 | } | |
3123 | } | |
3124 | ||
3125 | static void setautobrightness(struct sd *sd) | |
3126 | { | |
3127 | if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670) | |
3128 | return; | |
3129 | ||
3130 | i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10); | |
3131 | } | |
3132 | ||
3133 | static void setfreq(struct sd *sd) | |
3134 | { | |
3135 | if (sd->sensor == SEN_OV7670) { | |
3136 | switch (sd->freq) { | |
3137 | case 0: /* Banding filter disabled */ | |
3138 | i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT); | |
3139 | break; | |
3140 | case 1: /* 50 hz */ | |
3141 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
3142 | OV7670_COM8_BFILT); | |
3143 | i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18); | |
3144 | break; | |
3145 | case 2: /* 60 hz */ | |
3146 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
3147 | OV7670_COM8_BFILT); | |
3148 | i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18); | |
3149 | break; | |
3150 | case 3: /* Auto hz */ | |
3151 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
3152 | OV7670_COM8_BFILT); | |
3153 | i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO, | |
3154 | 0x18); | |
3155 | break; | |
3156 | } | |
3157 | } else { | |
3158 | switch (sd->freq) { | |
3159 | case 0: /* Banding filter disabled */ | |
3160 | i2c_w_mask(sd, 0x2d, 0x00, 0x04); | |
3161 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
3162 | break; | |
3163 | case 1: /* 50 hz (filter on and framerate adj) */ | |
3164 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
3165 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
3166 | /* 20 fps -> 16.667 fps */ | |
3167 | if (sd->sensor == SEN_OV6620 || | |
3168 | sd->sensor == SEN_OV6630 || | |
3169 | sd->sensor == SEN_OV66308AF) | |
3170 | i2c_w(sd, 0x2b, 0x5e); | |
3171 | else | |
3172 | i2c_w(sd, 0x2b, 0xac); | |
3173 | break; | |
3174 | case 2: /* 60 hz (filter on, ...) */ | |
3175 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
3176 | if (sd->sensor == SEN_OV6620 || | |
3177 | sd->sensor == SEN_OV6630 || | |
3178 | sd->sensor == SEN_OV66308AF) { | |
3179 | /* 20 fps -> 15 fps */ | |
3180 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
3181 | i2c_w(sd, 0x2b, 0xa8); | |
3182 | } else { | |
3183 | /* no framerate adj. */ | |
3184 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
3185 | } | |
3186 | break; | |
3187 | } | |
3188 | } | |
3189 | } | |
3190 | ||
3191 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val) | |
3192 | { | |
3193 | struct sd *sd = (struct sd *) gspca_dev; | |
3194 | ||
3195 | sd->brightness = val; | |
3196 | if (gspca_dev->streaming) | |
3197 | setbrightness(gspca_dev); | |
3198 | return 0; | |
3199 | } | |
3200 | ||
3201 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val) | |
3202 | { | |
3203 | struct sd *sd = (struct sd *) gspca_dev; | |
3204 | ||
3205 | *val = sd->brightness; | |
3206 | return 0; | |
3207 | } | |
3208 | ||
3209 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val) | |
3210 | { | |
3211 | struct sd *sd = (struct sd *) gspca_dev; | |
3212 | ||
3213 | sd->contrast = val; | |
3214 | if (gspca_dev->streaming) | |
3215 | setcontrast(gspca_dev); | |
3216 | return 0; | |
3217 | } | |
3218 | ||
3219 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val) | |
3220 | { | |
3221 | struct sd *sd = (struct sd *) gspca_dev; | |
3222 | ||
3223 | *val = sd->contrast; | |
3224 | return 0; | |
3225 | } | |
3226 | ||
3227 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val) | |
3228 | { | |
3229 | struct sd *sd = (struct sd *) gspca_dev; | |
3230 | ||
3231 | sd->colors = val; | |
3232 | if (gspca_dev->streaming) | |
3233 | setcolors(gspca_dev); | |
3234 | return 0; | |
3235 | } | |
3236 | ||
3237 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val) | |
3238 | { | |
3239 | struct sd *sd = (struct sd *) gspca_dev; | |
3240 | ||
3241 | *val = sd->colors; | |
3242 | return 0; | |
3243 | } | |
3244 | ||
3245 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val) | |
3246 | { | |
3247 | struct sd *sd = (struct sd *) gspca_dev; | |
3248 | ||
3249 | sd->hflip = val; | |
3250 | if (gspca_dev->streaming) | |
3251 | sethvflip(sd); | |
3252 | return 0; | |
3253 | } | |
3254 | ||
3255 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val) | |
3256 | { | |
3257 | struct sd *sd = (struct sd *) gspca_dev; | |
3258 | ||
3259 | *val = sd->hflip; | |
3260 | return 0; | |
3261 | } | |
3262 | ||
3263 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val) | |
3264 | { | |
3265 | struct sd *sd = (struct sd *) gspca_dev; | |
3266 | ||
3267 | sd->vflip = val; | |
3268 | if (gspca_dev->streaming) | |
3269 | sethvflip(sd); | |
3270 | return 0; | |
3271 | } | |
3272 | ||
3273 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val) | |
3274 | { | |
3275 | struct sd *sd = (struct sd *) gspca_dev; | |
3276 | ||
3277 | *val = sd->vflip; | |
3278 | return 0; | |
3279 | } | |
3280 | ||
3281 | static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val) | |
3282 | { | |
3283 | struct sd *sd = (struct sd *) gspca_dev; | |
3284 | ||
3285 | sd->autobrightness = val; | |
3286 | if (gspca_dev->streaming) | |
3287 | setautobrightness(sd); | |
3288 | return 0; | |
3289 | } | |
3290 | ||
3291 | static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val) | |
3292 | { | |
3293 | struct sd *sd = (struct sd *) gspca_dev; | |
3294 | ||
3295 | *val = sd->autobrightness; | |
3296 | return 0; | |
3297 | } | |
3298 | ||
3299 | static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val) | |
3300 | { | |
3301 | struct sd *sd = (struct sd *) gspca_dev; | |
3302 | ||
3303 | sd->freq = val; | |
3304 | if (gspca_dev->streaming) | |
3305 | setfreq(sd); | |
3306 | return 0; | |
3307 | } | |
3308 | ||
3309 | static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val) | |
3310 | { | |
3311 | struct sd *sd = (struct sd *) gspca_dev; | |
3312 | ||
3313 | *val = sd->freq; | |
3314 | return 0; | |
3315 | } | |
3316 | ||
3317 | static int sd_querymenu(struct gspca_dev *gspca_dev, | |
3318 | struct v4l2_querymenu *menu) | |
3319 | { | |
3320 | struct sd *sd = (struct sd *) gspca_dev; | |
3321 | ||
3322 | switch (menu->id) { | |
3323 | case V4L2_CID_POWER_LINE_FREQUENCY: | |
3324 | switch (menu->index) { | |
3325 | case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */ | |
3326 | strcpy((char *) menu->name, "NoFliker"); | |
3327 | return 0; | |
3328 | case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */ | |
3329 | strcpy((char *) menu->name, "50 Hz"); | |
3330 | return 0; | |
3331 | case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */ | |
3332 | strcpy((char *) menu->name, "60 Hz"); | |
3333 | return 0; | |
3334 | case 3: | |
3335 | if (sd->sensor != SEN_OV7670) | |
3336 | return -EINVAL; | |
3337 | ||
3338 | strcpy((char *) menu->name, "Automatic"); | |
3339 | return 0; | |
3340 | } | |
3341 | break; | |
3342 | } | |
3343 | return -EINVAL; | |
3344 | } | |
3345 | ||
3346 | /* sub-driver description */ | |
3347 | static const struct sd_desc sd_desc = { | |
3348 | .name = MODULE_NAME, | |
3349 | .ctrls = sd_ctrls, | |
3350 | .nctrls = ARRAY_SIZE(sd_ctrls), | |
3351 | .config = sd_config, | |
3352 | .init = sd_init, | |
3353 | .start = sd_start, | |
3354 | .stopN = sd_stopN, | |
3355 | .pkt_scan = sd_pkt_scan, | |
3356 | .querymenu = sd_querymenu, | |
3357 | }; | |
3358 | ||
3359 | /* -- module initialisation -- */ | |
3360 | static const __devinitdata struct usb_device_id device_table[] = { | |
3361 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, | |
3362 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | |
3363 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | |
3364 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | |
3365 | {USB_DEVICE(0x041e, 0x4064), | |
3366 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
3367 | {USB_DEVICE(0x041e, 0x4068), | |
3368 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
3369 | {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, | |
3370 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, | |
3371 | {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 }, | |
3372 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, | |
3373 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, | |
3374 | {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, | |
3375 | {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 }, | |
3376 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, | |
3377 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, | |
3378 | {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS }, | |
3379 | {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS }, | |
3380 | {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS }, | |
3381 | {} | |
3382 | }; | |
3383 | ||
3384 | MODULE_DEVICE_TABLE(usb, device_table); | |
3385 | ||
3386 | /* -- device connect -- */ | |
3387 | static int sd_probe(struct usb_interface *intf, | |
3388 | const struct usb_device_id *id) | |
3389 | { | |
3390 | return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), | |
3391 | THIS_MODULE); | |
3392 | } | |
3393 | ||
3394 | static struct usb_driver sd_driver = { | |
3395 | .name = MODULE_NAME, | |
3396 | .id_table = device_table, | |
3397 | .probe = sd_probe, | |
3398 | .disconnect = gspca_disconnect, | |
3399 | #ifdef CONFIG_PM | |
3400 | .suspend = gspca_suspend, | |
3401 | .resume = gspca_resume, | |
3402 | #endif | |
3403 | }; | |
3404 | ||
3405 | /* -- module insert / remove -- */ | |
3406 | static int __init sd_mod_init(void) | |
3407 | { | |
3408 | int ret; | |
3409 | ret = usb_register(&sd_driver); | |
3410 | if (ret < 0) | |
3411 | return ret; | |
3412 | PDEBUG(D_PROBE, "registered"); | |
3413 | return 0; | |
3414 | } | |
3415 | static void __exit sd_mod_exit(void) | |
3416 | { | |
3417 | usb_deregister(&sd_driver); | |
3418 | PDEBUG(D_PROBE, "deregistered"); | |
3419 | } | |
3420 | ||
3421 | module_init(sd_mod_init); | |
3422 | module_exit(sd_mod_exit); | |
3423 | ||
3424 | module_param(frame_rate, int, 0644); | |
3425 | MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)"); |