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nvme: expose cntrltype and dctype through sysfs
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2011-2014, Intel Corporation.
4 */
5
6#ifndef _NVME_H
7#define _NVME_H
8
9#include <linux/nvme.h>
10#include <linux/cdev.h>
11#include <linux/pci.h>
12#include <linux/kref.h>
13#include <linux/blk-mq.h>
14#include <linux/sed-opal.h>
15#include <linux/fault-inject.h>
16#include <linux/rcupdate.h>
17#include <linux/wait.h>
18#include <linux/t10-pi.h>
19
20#include <trace/events/block.h>
21
22extern unsigned int nvme_io_timeout;
23#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
24
25extern unsigned int admin_timeout;
26#define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
27
28#define NVME_DEFAULT_KATO 5
29
30#ifdef CONFIG_ARCH_NO_SG_CHAIN
31#define NVME_INLINE_SG_CNT 0
32#define NVME_INLINE_METADATA_SG_CNT 0
33#else
34#define NVME_INLINE_SG_CNT 2
35#define NVME_INLINE_METADATA_SG_CNT 1
36#endif
37
38/*
39 * Default to a 4K page size, with the intention to update this
40 * path in the future to accommodate architectures with differing
41 * kernel and IO page sizes.
42 */
43#define NVME_CTRL_PAGE_SHIFT 12
44#define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
45
46extern struct workqueue_struct *nvme_wq;
47extern struct workqueue_struct *nvme_reset_wq;
48extern struct workqueue_struct *nvme_delete_wq;
49
50/*
51 * List of workarounds for devices that required behavior not specified in
52 * the standard.
53 */
54enum nvme_quirks {
55 /*
56 * Prefers I/O aligned to a stripe size specified in a vendor
57 * specific Identify field.
58 */
59 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
60
61 /*
62 * The controller doesn't handle Identify value others than 0 or 1
63 * correctly.
64 */
65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
66
67 /*
68 * The controller deterministically returns O's on reads to
69 * logical blocks that deallocate was called on.
70 */
71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
72
73 /*
74 * The controller needs a delay before starts checking the device
75 * readiness, which is done by reading the NVME_CSTS_RDY bit.
76 */
77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
78
79 /*
80 * APST should not be used.
81 */
82 NVME_QUIRK_NO_APST = (1 << 4),
83
84 /*
85 * The deepest sleep state should not be used.
86 */
87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
88
89 /*
90 * Set MEDIUM priority on SQ creation
91 */
92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
93
94 /*
95 * Ignore device provided subnqn.
96 */
97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
98
99 /*
100 * Broken Write Zeroes.
101 */
102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
103
104 /*
105 * Force simple suspend/resume path.
106 */
107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
108
109 /*
110 * Use only one interrupt vector for all queues
111 */
112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
113
114 /*
115 * Use non-standard 128 bytes SQEs.
116 */
117 NVME_QUIRK_128_BYTES_SQES = (1 << 12),
118
119 /*
120 * Prevent tag overlap between queues
121 */
122 NVME_QUIRK_SHARED_TAGS = (1 << 13),
123
124 /*
125 * Don't change the value of the temperature threshold feature
126 */
127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
128
129 /*
130 * The controller doesn't handle the Identify Namespace
131 * Identification Descriptor list subcommand despite claiming
132 * NVMe 1.3 compliance.
133 */
134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
135
136 /*
137 * The controller does not properly handle DMA addresses over
138 * 48 bits.
139 */
140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
141
142 /*
143 * The controller requires the command_id value be be limited, so skip
144 * encoding the generation sequence number.
145 */
146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
147
148 /*
149 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
150 */
151 NVME_QUIRK_BOGUS_NID = (1 << 18),
152};
153
154/*
155 * Common request structure for NVMe passthrough. All drivers must have
156 * this structure as the first member of their request-private data.
157 */
158struct nvme_request {
159 struct nvme_command *cmd;
160 union nvme_result result;
161 u8 genctr;
162 u8 retries;
163 u8 flags;
164 u16 status;
165 struct nvme_ctrl *ctrl;
166};
167
168/*
169 * Mark a bio as coming in through the mpath node.
170 */
171#define REQ_NVME_MPATH REQ_DRV
172
173enum {
174 NVME_REQ_CANCELLED = (1 << 0),
175 NVME_REQ_USERCMD = (1 << 1),
176};
177
178static inline struct nvme_request *nvme_req(struct request *req)
179{
180 return blk_mq_rq_to_pdu(req);
181}
182
183static inline u16 nvme_req_qid(struct request *req)
184{
185 if (!req->q->queuedata)
186 return 0;
187
188 return req->mq_hctx->queue_num + 1;
189}
190
191/* The below value is the specific amount of delay needed before checking
192 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
193 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
194 * found empirically.
195 */
196#define NVME_QUIRK_DELAY_AMOUNT 2300
197
198/*
199 * enum nvme_ctrl_state: Controller state
200 *
201 * @NVME_CTRL_NEW: New controller just allocated, initial state
202 * @NVME_CTRL_LIVE: Controller is connected and I/O capable
203 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
204 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
205 * transport
206 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
207 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
208 * disabled/failed immediately. This state comes
209 * after all async event processing took place and
210 * before ns removal and the controller deletion
211 * progress
212 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
213 * shutdown or removal. In this case we forcibly
214 * kill all inflight I/O as they have no chance to
215 * complete
216 */
217enum nvme_ctrl_state {
218 NVME_CTRL_NEW,
219 NVME_CTRL_LIVE,
220 NVME_CTRL_RESETTING,
221 NVME_CTRL_CONNECTING,
222 NVME_CTRL_DELETING,
223 NVME_CTRL_DELETING_NOIO,
224 NVME_CTRL_DEAD,
225};
226
227struct nvme_fault_inject {
228#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
229 struct fault_attr attr;
230 struct dentry *parent;
231 bool dont_retry; /* DNR, do not retry */
232 u16 status; /* status code */
233#endif
234};
235
236struct nvme_ctrl {
237 bool comp_seen;
238 enum nvme_ctrl_state state;
239 bool identified;
240 spinlock_t lock;
241 struct mutex scan_lock;
242 const struct nvme_ctrl_ops *ops;
243 struct request_queue *admin_q;
244 struct request_queue *connect_q;
245 struct request_queue *fabrics_q;
246 struct device *dev;
247 int instance;
248 int numa_node;
249 struct blk_mq_tag_set *tagset;
250 struct blk_mq_tag_set *admin_tagset;
251 struct list_head namespaces;
252 struct rw_semaphore namespaces_rwsem;
253 struct device ctrl_device;
254 struct device *device; /* char device */
255#ifdef CONFIG_NVME_HWMON
256 struct device *hwmon_device;
257#endif
258 struct cdev cdev;
259 struct work_struct reset_work;
260 struct work_struct delete_work;
261 wait_queue_head_t state_wq;
262
263 struct nvme_subsystem *subsys;
264 struct list_head subsys_entry;
265
266 struct opal_dev *opal_dev;
267
268 char name[12];
269 u16 cntlid;
270
271 u32 ctrl_config;
272 u16 mtfa;
273 u32 queue_count;
274
275 u64 cap;
276 u32 max_hw_sectors;
277 u32 max_segments;
278 u32 max_integrity_segments;
279 u32 max_discard_sectors;
280 u32 max_discard_segments;
281 u32 max_zeroes_sectors;
282#ifdef CONFIG_BLK_DEV_ZONED
283 u32 max_zone_append;
284#endif
285 u16 crdt[3];
286 u16 oncs;
287 u16 oacs;
288 u16 nssa;
289 u16 nr_streams;
290 u16 sqsize;
291 u32 max_namespaces;
292 atomic_t abort_limit;
293 u8 vwc;
294 u32 vs;
295 u32 sgls;
296 u16 kas;
297 u8 npss;
298 u8 apsta;
299 u16 wctemp;
300 u16 cctemp;
301 u32 oaes;
302 u32 aen_result;
303 u32 ctratt;
304 unsigned int shutdown_timeout;
305 unsigned int kato;
306 bool subsystem;
307 unsigned long quirks;
308 struct nvme_id_power_state psd[32];
309 struct nvme_effects_log *effects;
310 struct xarray cels;
311 struct work_struct scan_work;
312 struct work_struct async_event_work;
313 struct delayed_work ka_work;
314 struct delayed_work failfast_work;
315 struct nvme_command ka_cmd;
316 struct work_struct fw_act_work;
317 unsigned long events;
318
319#ifdef CONFIG_NVME_MULTIPATH
320 /* asymmetric namespace access: */
321 u8 anacap;
322 u8 anatt;
323 u32 anagrpmax;
324 u32 nanagrpid;
325 struct mutex ana_lock;
326 struct nvme_ana_rsp_hdr *ana_log_buf;
327 size_t ana_log_size;
328 struct timer_list anatt_timer;
329 struct work_struct ana_work;
330#endif
331
332 /* Power saving configuration */
333 u64 ps_max_latency_us;
334 bool apst_enabled;
335
336 /* PCIe only: */
337 u32 hmpre;
338 u32 hmmin;
339 u32 hmminds;
340 u16 hmmaxd;
341
342 /* Fabrics only */
343 u32 ioccsz;
344 u32 iorcsz;
345 u16 icdoff;
346 u16 maxcmd;
347 int nr_reconnects;
348 unsigned long flags;
349#define NVME_CTRL_FAILFAST_EXPIRED 0
350 struct nvmf_ctrl_options *opts;
351
352 struct page *discard_page;
353 unsigned long discard_page_busy;
354
355 struct nvme_fault_inject fault_inject;
356
357 enum nvme_ctrl_type cntrltype;
358 enum nvme_dctype dctype;
359};
360
361enum nvme_iopolicy {
362 NVME_IOPOLICY_NUMA,
363 NVME_IOPOLICY_RR,
364};
365
366struct nvme_subsystem {
367 int instance;
368 struct device dev;
369 /*
370 * Because we unregister the device on the last put we need
371 * a separate refcount.
372 */
373 struct kref ref;
374 struct list_head entry;
375 struct mutex lock;
376 struct list_head ctrls;
377 struct list_head nsheads;
378 char subnqn[NVMF_NQN_SIZE];
379 char serial[20];
380 char model[40];
381 char firmware_rev[8];
382 u8 cmic;
383 u16 vendor_id;
384 u16 awupf; /* 0's based awupf value. */
385 struct ida ns_ida;
386#ifdef CONFIG_NVME_MULTIPATH
387 enum nvme_iopolicy iopolicy;
388#endif
389};
390
391/*
392 * Container structure for uniqueue namespace identifiers.
393 */
394struct nvme_ns_ids {
395 u8 eui64[8];
396 u8 nguid[16];
397 uuid_t uuid;
398 u8 csi;
399};
400
401/*
402 * Anchor structure for namespaces. There is one for each namespace in a
403 * NVMe subsystem that any of our controllers can see, and the namespace
404 * structure for each controller is chained of it. For private namespaces
405 * there is a 1:1 relation to our namespace structures, that is ->list
406 * only ever has a single entry for private namespaces.
407 */
408struct nvme_ns_head {
409 struct list_head list;
410 struct srcu_struct srcu;
411 struct nvme_subsystem *subsys;
412 unsigned ns_id;
413 struct nvme_ns_ids ids;
414 struct list_head entry;
415 struct kref ref;
416 bool shared;
417 int instance;
418 struct nvme_effects_log *effects;
419
420 struct cdev cdev;
421 struct device cdev_device;
422
423 struct gendisk *disk;
424#ifdef CONFIG_NVME_MULTIPATH
425 struct bio_list requeue_list;
426 spinlock_t requeue_lock;
427 struct work_struct requeue_work;
428 struct mutex lock;
429 unsigned long flags;
430#define NVME_NSHEAD_DISK_LIVE 0
431 struct nvme_ns __rcu *current_path[];
432#endif
433};
434
435static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
436{
437 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
438}
439
440enum nvme_ns_features {
441 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
442 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
443};
444
445struct nvme_ns {
446 struct list_head list;
447
448 struct nvme_ctrl *ctrl;
449 struct request_queue *queue;
450 struct gendisk *disk;
451#ifdef CONFIG_NVME_MULTIPATH
452 enum nvme_ana_state ana_state;
453 u32 ana_grpid;
454#endif
455 struct list_head siblings;
456 struct kref kref;
457 struct nvme_ns_head *head;
458
459 int lba_shift;
460 u16 ms;
461 u16 sgs;
462 u32 sws;
463 u8 pi_type;
464#ifdef CONFIG_BLK_DEV_ZONED
465 u64 zsze;
466#endif
467 unsigned long features;
468 unsigned long flags;
469#define NVME_NS_REMOVING 0
470#define NVME_NS_DEAD 1
471#define NVME_NS_ANA_PENDING 2
472#define NVME_NS_FORCE_RO 3
473#define NVME_NS_READY 4
474
475 struct cdev cdev;
476 struct device cdev_device;
477
478 struct nvme_fault_inject fault_inject;
479
480};
481
482/* NVMe ns supports metadata actions by the controller (generate/strip) */
483static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
484{
485 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple);
486}
487
488struct nvme_ctrl_ops {
489 const char *name;
490 struct module *module;
491 unsigned int flags;
492#define NVME_F_FABRICS (1 << 0)
493#define NVME_F_METADATA_SUPPORTED (1 << 1)
494#define NVME_F_PCI_P2PDMA (1 << 2)
495 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
496 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
497 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
498 void (*free_ctrl)(struct nvme_ctrl *ctrl);
499 void (*submit_async_event)(struct nvme_ctrl *ctrl);
500 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
501 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
502};
503
504/*
505 * nvme command_id is constructed as such:
506 * | xxxx | xxxxxxxxxxxx |
507 * gen request tag
508 */
509#define nvme_genctr_mask(gen) (gen & 0xf)
510#define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
511#define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
512#define nvme_tag_from_cid(cid) (cid & 0xfff)
513
514static inline u16 nvme_cid(struct request *rq)
515{
516 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
517}
518
519static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
520 u16 command_id)
521{
522 u8 genctr = nvme_genctr_from_cid(command_id);
523 u16 tag = nvme_tag_from_cid(command_id);
524 struct request *rq;
525
526 rq = blk_mq_tag_to_rq(tags, tag);
527 if (unlikely(!rq)) {
528 pr_err("could not locate request for tag %#x\n",
529 tag);
530 return NULL;
531 }
532 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
533 dev_err(nvme_req(rq)->ctrl->device,
534 "request %#x genctr mismatch (got %#x expected %#x)\n",
535 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
536 return NULL;
537 }
538 return rq;
539}
540
541static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
542 u16 command_id)
543{
544 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
545}
546
547#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
548void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
549 const char *dev_name);
550void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
551void nvme_should_fail(struct request *req);
552#else
553static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
554 const char *dev_name)
555{
556}
557static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
558{
559}
560static inline void nvme_should_fail(struct request *req) {}
561#endif
562
563static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
564{
565 if (!ctrl->subsystem)
566 return -ENOTTY;
567 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
568}
569
570/*
571 * Convert a 512B sector number to a device logical block number.
572 */
573static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
574{
575 return sector >> (ns->lba_shift - SECTOR_SHIFT);
576}
577
578/*
579 * Convert a device logical block number to a 512B sector number.
580 */
581static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
582{
583 return lba << (ns->lba_shift - SECTOR_SHIFT);
584}
585
586/*
587 * Convert byte length to nvme's 0-based num dwords
588 */
589static inline u32 nvme_bytes_to_numd(size_t len)
590{
591 return (len >> 2) - 1;
592}
593
594static inline bool nvme_is_ana_error(u16 status)
595{
596 switch (status & 0x7ff) {
597 case NVME_SC_ANA_TRANSITION:
598 case NVME_SC_ANA_INACCESSIBLE:
599 case NVME_SC_ANA_PERSISTENT_LOSS:
600 return true;
601 default:
602 return false;
603 }
604}
605
606static inline bool nvme_is_path_error(u16 status)
607{
608 /* check for a status code type of 'path related status' */
609 return (status & 0x700) == 0x300;
610}
611
612/*
613 * Fill in the status and result information from the CQE, and then figure out
614 * if blk-mq will need to use IPI magic to complete the request, and if yes do
615 * so. If not let the caller complete the request without an indirect function
616 * call.
617 */
618static inline bool nvme_try_complete_req(struct request *req, __le16 status,
619 union nvme_result result)
620{
621 struct nvme_request *rq = nvme_req(req);
622
623 rq->status = le16_to_cpu(status) >> 1;
624 rq->result = result;
625 /* inject error when permitted by fault injection framework */
626 nvme_should_fail(req);
627 if (unlikely(blk_should_fake_timeout(req->q)))
628 return true;
629 return blk_mq_complete_request_remote(req);
630}
631
632static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
633{
634 get_device(ctrl->device);
635}
636
637static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
638{
639 put_device(ctrl->device);
640}
641
642static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
643{
644 return !qid &&
645 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
646}
647
648void nvme_complete_rq(struct request *req);
649blk_status_t nvme_host_path_error(struct request *req);
650bool nvme_cancel_request(struct request *req, void *data, bool reserved);
651void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
652void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
653bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
654 enum nvme_ctrl_state new_state);
655bool nvme_wait_reset(struct nvme_ctrl *ctrl);
656int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
657int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
658int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
659int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
660 const struct nvme_ctrl_ops *ops, unsigned long quirks);
661void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
662void nvme_start_ctrl(struct nvme_ctrl *ctrl);
663void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
664int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl);
665
666void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
667
668int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
669 bool send);
670
671void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
672 volatile union nvme_result *res);
673
674void nvme_stop_queues(struct nvme_ctrl *ctrl);
675void nvme_start_queues(struct nvme_ctrl *ctrl);
676void nvme_kill_queues(struct nvme_ctrl *ctrl);
677void nvme_sync_queues(struct nvme_ctrl *ctrl);
678void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
679void nvme_unfreeze(struct nvme_ctrl *ctrl);
680void nvme_wait_freeze(struct nvme_ctrl *ctrl);
681int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
682void nvme_start_freeze(struct nvme_ctrl *ctrl);
683
684#define NVME_QID_ANY -1
685struct request *nvme_alloc_request(struct request_queue *q,
686 struct nvme_command *cmd, blk_mq_req_flags_t flags);
687void nvme_cleanup_cmd(struct request *req);
688blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
689blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
690 struct request *req);
691bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
692 bool queue_live);
693
694static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
695 bool queue_live)
696{
697 if (likely(ctrl->state == NVME_CTRL_LIVE))
698 return true;
699 if (ctrl->ops->flags & NVME_F_FABRICS &&
700 ctrl->state == NVME_CTRL_DELETING)
701 return true;
702 return __nvme_check_ready(ctrl, rq, queue_live);
703}
704
705/*
706 * NSID shall be unique for all shared namespaces, or if at least one of the
707 * following conditions is met:
708 * 1. Namespace Management is supported by the controller
709 * 2. ANA is supported by the controller
710 * 3. NVM Set are supported by the controller
711 *
712 * In other case, private namespace are not required to report a unique NSID.
713 */
714static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
715 struct nvme_ns_head *head)
716{
717 return head->shared ||
718 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
719 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
720 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
721}
722
723int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
724 void *buf, unsigned bufflen);
725int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
726 union nvme_result *result, void *buffer, unsigned bufflen,
727 unsigned timeout, int qid, int at_head,
728 blk_mq_req_flags_t flags);
729int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
730 unsigned int dword11, void *buffer, size_t buflen,
731 u32 *result);
732int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
733 unsigned int dword11, void *buffer, size_t buflen,
734 u32 *result);
735int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
736void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
737int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
738int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
739int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
740int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
741void nvme_queue_scan(struct nvme_ctrl *ctrl);
742int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
743 void *log, size_t size, u64 offset);
744bool nvme_tryget_ns_head(struct nvme_ns_head *head);
745void nvme_put_ns_head(struct nvme_ns_head *head);
746int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
747 const struct file_operations *fops, struct module *owner);
748void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
749int nvme_ioctl(struct block_device *bdev, fmode_t mode,
750 unsigned int cmd, unsigned long arg);
751long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
752int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
753 unsigned int cmd, unsigned long arg);
754long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
755 unsigned long arg);
756long nvme_dev_ioctl(struct file *file, unsigned int cmd,
757 unsigned long arg);
758int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
759
760extern const struct attribute_group *nvme_ns_id_attr_groups[];
761extern const struct pr_ops nvme_pr_ops;
762extern const struct block_device_operations nvme_ns_head_ops;
763
764struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
765#ifdef CONFIG_NVME_MULTIPATH
766static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
767{
768 return ctrl->ana_log_buf != NULL;
769}
770
771void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
772void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
773void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
774bool nvme_mpath_set_disk_name(struct nvme_ns *ns, char *disk_name, int *flags);
775void nvme_failover_req(struct request *req);
776void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
777int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
778void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
779void nvme_mpath_remove_disk(struct nvme_ns_head *head);
780int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
781void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
782void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
783void nvme_mpath_stop(struct nvme_ctrl *ctrl);
784bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
785void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
786void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
787void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
788
789static inline void nvme_trace_bio_complete(struct request *req)
790{
791 struct nvme_ns *ns = req->q->queuedata;
792
793 if (req->cmd_flags & REQ_NVME_MPATH)
794 trace_block_bio_complete(ns->head->disk->queue, req->bio);
795}
796
797extern struct device_attribute dev_attr_ana_grpid;
798extern struct device_attribute dev_attr_ana_state;
799extern struct device_attribute subsys_attr_iopolicy;
800
801#else
802static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
803{
804 return false;
805}
806static inline bool nvme_mpath_set_disk_name(struct nvme_ns *ns, char *disk_name,
807 int *flags)
808{
809 return false;
810}
811static inline void nvme_failover_req(struct request *req)
812{
813}
814static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
815{
816}
817static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
818 struct nvme_ns_head *head)
819{
820 return 0;
821}
822static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
823 struct nvme_id_ns *id)
824{
825}
826static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
827{
828}
829static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
830{
831 return false;
832}
833static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
834{
835}
836static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
837{
838}
839static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
840{
841}
842static inline void nvme_trace_bio_complete(struct request *req)
843{
844}
845static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
846{
847}
848static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
849 struct nvme_id_ctrl *id)
850{
851 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
852 dev_warn(ctrl->device,
853"Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
854 return 0;
855}
856static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
857{
858}
859static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
860{
861}
862static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
863{
864}
865static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
866{
867}
868static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
869{
870}
871#endif /* CONFIG_NVME_MULTIPATH */
872
873int nvme_revalidate_zones(struct nvme_ns *ns);
874int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
875 unsigned int nr_zones, report_zones_cb cb, void *data);
876#ifdef CONFIG_BLK_DEV_ZONED
877int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
878blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
879 struct nvme_command *cmnd,
880 enum nvme_zone_mgmt_action action);
881#else
882static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
883 struct request *req, struct nvme_command *cmnd,
884 enum nvme_zone_mgmt_action action)
885{
886 return BLK_STS_NOTSUPP;
887}
888
889static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
890{
891 dev_warn(ns->ctrl->device,
892 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
893 return -EPROTONOSUPPORT;
894}
895#endif
896
897static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
898{
899 return dev_to_disk(dev)->private_data;
900}
901
902#ifdef CONFIG_NVME_HWMON
903int nvme_hwmon_init(struct nvme_ctrl *ctrl);
904void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
905#else
906static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
907{
908 return 0;
909}
910
911static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
912{
913}
914#endif
915
916static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
917{
918 return ctrl->sgls & ((1 << 0) | (1 << 1));
919}
920
921u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
922 u8 opcode);
923int nvme_execute_passthru_rq(struct request *rq);
924struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
925struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
926void nvme_put_ns(struct nvme_ns *ns);
927
928static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
929{
930 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
931}
932
933#endif /* _NVME_H */
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