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[mirror_ubuntu-bionic-kernel.git] / drivers / pinctrl / pinctrl-mcp23s08.c
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1/* MCP23S08 SPI/I2C GPIO driver */
2
3#include <linux/kernel.h>
4#include <linux/device.h>
5#include <linux/mutex.h>
6#include <linux/module.h>
7#include <linux/gpio.h>
8#include <linux/i2c.h>
9#include <linux/spi/spi.h>
10#include <linux/spi/mcp23s08.h>
11#include <linux/slab.h>
12#include <asm/byteorder.h>
13#include <linux/interrupt.h>
14#include <linux/of_device.h>
15#include <linux/regmap.h>
16#include <linux/pinctrl/pinctrl.h>
17#include <linux/pinctrl/pinconf.h>
18#include <linux/pinctrl/pinconf-generic.h>
19
20/*
21 * MCP types supported by driver
22 */
23#define MCP_TYPE_S08 0
24#define MCP_TYPE_S17 1
25#define MCP_TYPE_008 2
26#define MCP_TYPE_017 3
27#define MCP_TYPE_S18 4
28#define MCP_TYPE_018 5
29
30#define MCP_MAX_DEV_PER_CS 8
31
32/* Registers are all 8 bits wide.
33 *
34 * The mcp23s17 has twice as many bits, and can be configured to work
35 * with either 16 bit registers or with two adjacent 8 bit banks.
36 */
37#define MCP_IODIR 0x00 /* init/reset: all ones */
38#define MCP_IPOL 0x01
39#define MCP_GPINTEN 0x02
40#define MCP_DEFVAL 0x03
41#define MCP_INTCON 0x04
42#define MCP_IOCON 0x05
43# define IOCON_MIRROR (1 << 6)
44# define IOCON_SEQOP (1 << 5)
45# define IOCON_HAEN (1 << 3)
46# define IOCON_ODR (1 << 2)
47# define IOCON_INTPOL (1 << 1)
48# define IOCON_INTCC (1)
49#define MCP_GPPU 0x06
50#define MCP_INTF 0x07
51#define MCP_INTCAP 0x08
52#define MCP_GPIO 0x09
53#define MCP_OLAT 0x0a
54
55struct mcp23s08;
56
57struct mcp23s08 {
58 u8 addr;
59 bool irq_active_high;
60 bool reg_shift;
61
62 u16 irq_rise;
63 u16 irq_fall;
64 int irq;
65 bool irq_controller;
66 int cached_gpio;
67 /* lock protects regmap access with bypass/cache flags */
68 struct mutex lock;
69
70 struct gpio_chip chip;
71
72 struct regmap *regmap;
73 struct device *dev;
74
75 struct pinctrl_dev *pctldev;
76 struct pinctrl_desc pinctrl_desc;
77};
78
79static const struct reg_default mcp23x08_defaults[] = {
80 {.reg = MCP_IODIR, .def = 0xff},
81 {.reg = MCP_IPOL, .def = 0x00},
82 {.reg = MCP_GPINTEN, .def = 0x00},
83 {.reg = MCP_DEFVAL, .def = 0x00},
84 {.reg = MCP_INTCON, .def = 0x00},
85 {.reg = MCP_IOCON, .def = 0x00},
86 {.reg = MCP_GPPU, .def = 0x00},
87 {.reg = MCP_OLAT, .def = 0x00},
88};
89
90static const struct regmap_range mcp23x08_volatile_range = {
91 .range_min = MCP_INTF,
92 .range_max = MCP_GPIO,
93};
94
95static const struct regmap_access_table mcp23x08_volatile_table = {
96 .yes_ranges = &mcp23x08_volatile_range,
97 .n_yes_ranges = 1,
98};
99
100static const struct regmap_range mcp23x08_precious_range = {
101 .range_min = MCP_GPIO,
102 .range_max = MCP_GPIO,
103};
104
105static const struct regmap_access_table mcp23x08_precious_table = {
106 .yes_ranges = &mcp23x08_precious_range,
107 .n_yes_ranges = 1,
108};
109
110static const struct regmap_config mcp23x08_regmap = {
111 .reg_bits = 8,
112 .val_bits = 8,
113
114 .reg_stride = 1,
115 .volatile_table = &mcp23x08_volatile_table,
116 .precious_table = &mcp23x08_precious_table,
117 .reg_defaults = mcp23x08_defaults,
118 .num_reg_defaults = ARRAY_SIZE(mcp23x08_defaults),
119 .cache_type = REGCACHE_FLAT,
120 .max_register = MCP_OLAT,
121};
122
123static const struct reg_default mcp23x16_defaults[] = {
124 {.reg = MCP_IODIR << 1, .def = 0xffff},
125 {.reg = MCP_IPOL << 1, .def = 0x0000},
126 {.reg = MCP_GPINTEN << 1, .def = 0x0000},
127 {.reg = MCP_DEFVAL << 1, .def = 0x0000},
128 {.reg = MCP_INTCON << 1, .def = 0x0000},
129 {.reg = MCP_IOCON << 1, .def = 0x0000},
130 {.reg = MCP_GPPU << 1, .def = 0x0000},
131 {.reg = MCP_OLAT << 1, .def = 0x0000},
132};
133
134static const struct regmap_range mcp23x16_volatile_range = {
135 .range_min = MCP_INTF << 1,
136 .range_max = MCP_GPIO << 1,
137};
138
139static const struct regmap_access_table mcp23x16_volatile_table = {
140 .yes_ranges = &mcp23x16_volatile_range,
141 .n_yes_ranges = 1,
142};
143
144static const struct regmap_range mcp23x16_precious_range = {
145 .range_min = MCP_GPIO << 1,
146 .range_max = MCP_GPIO << 1,
147};
148
149static const struct regmap_access_table mcp23x16_precious_table = {
150 .yes_ranges = &mcp23x16_precious_range,
151 .n_yes_ranges = 1,
152};
153
154static const struct regmap_config mcp23x17_regmap = {
155 .reg_bits = 8,
156 .val_bits = 16,
157
158 .reg_stride = 2,
159 .max_register = MCP_OLAT << 1,
160 .volatile_table = &mcp23x16_volatile_table,
161 .precious_table = &mcp23x16_precious_table,
162 .reg_defaults = mcp23x16_defaults,
163 .num_reg_defaults = ARRAY_SIZE(mcp23x16_defaults),
164 .cache_type = REGCACHE_FLAT,
165 .val_format_endian = REGMAP_ENDIAN_LITTLE,
166};
167
168static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
169{
170 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
171}
172
173static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
174{
175 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
176}
177
178static int mcp_set_mask(struct mcp23s08 *mcp, unsigned int reg,
179 unsigned int mask, bool enabled)
180{
181 u16 val = enabled ? 0xffff : 0x0000;
182 return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
183 mask, val);
184}
185
186static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
187 unsigned int pin, bool enabled)
188{
189 u16 mask = BIT(pin);
190 return mcp_set_mask(mcp, reg, mask, enabled);
191}
192
193static const struct pinctrl_pin_desc mcp23x08_pins[] = {
194 PINCTRL_PIN(0, "gpio0"),
195 PINCTRL_PIN(1, "gpio1"),
196 PINCTRL_PIN(2, "gpio2"),
197 PINCTRL_PIN(3, "gpio3"),
198 PINCTRL_PIN(4, "gpio4"),
199 PINCTRL_PIN(5, "gpio5"),
200 PINCTRL_PIN(6, "gpio6"),
201 PINCTRL_PIN(7, "gpio7"),
202};
203
204static const struct pinctrl_pin_desc mcp23x17_pins[] = {
205 PINCTRL_PIN(0, "gpio0"),
206 PINCTRL_PIN(1, "gpio1"),
207 PINCTRL_PIN(2, "gpio2"),
208 PINCTRL_PIN(3, "gpio3"),
209 PINCTRL_PIN(4, "gpio4"),
210 PINCTRL_PIN(5, "gpio5"),
211 PINCTRL_PIN(6, "gpio6"),
212 PINCTRL_PIN(7, "gpio7"),
213 PINCTRL_PIN(8, "gpio8"),
214 PINCTRL_PIN(9, "gpio9"),
215 PINCTRL_PIN(10, "gpio10"),
216 PINCTRL_PIN(11, "gpio11"),
217 PINCTRL_PIN(12, "gpio12"),
218 PINCTRL_PIN(13, "gpio13"),
219 PINCTRL_PIN(14, "gpio14"),
220 PINCTRL_PIN(15, "gpio15"),
221};
222
223static int mcp_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
224{
225 return 0;
226}
227
228static const char *mcp_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
229 unsigned int group)
230{
231 return NULL;
232}
233
234static int mcp_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
235 unsigned int group,
236 const unsigned int **pins,
237 unsigned int *num_pins)
238{
239 return -ENOTSUPP;
240}
241
242static const struct pinctrl_ops mcp_pinctrl_ops = {
243 .get_groups_count = mcp_pinctrl_get_groups_count,
244 .get_group_name = mcp_pinctrl_get_group_name,
245 .get_group_pins = mcp_pinctrl_get_group_pins,
246#ifdef CONFIG_OF
247 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
248 .dt_free_map = pinconf_generic_dt_free_map,
249#endif
250};
251
252static int mcp_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
253 unsigned long *config)
254{
255 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
256 enum pin_config_param param = pinconf_to_config_param(*config);
257 unsigned int data, status;
258 int ret;
259
260 switch (param) {
261 case PIN_CONFIG_BIAS_PULL_UP:
262 ret = mcp_read(mcp, MCP_GPPU, &data);
263 if (ret < 0)
264 return ret;
265 status = (data & BIT(pin)) ? 1 : 0;
266 break;
267 default:
268 dev_err(mcp->dev, "Invalid config param %04x\n", param);
269 return -ENOTSUPP;
270 }
271
272 *config = 0;
273
274 return status ? 0 : -EINVAL;
275}
276
277static int mcp_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
278 unsigned long *configs, unsigned int num_configs)
279{
280 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
281 enum pin_config_param param;
282 u32 arg;
283 int ret = 0;
284 int i;
285
286 for (i = 0; i < num_configs; i++) {
287 param = pinconf_to_config_param(configs[i]);
288 arg = pinconf_to_config_argument(configs[i]);
289
290 switch (param) {
291 case PIN_CONFIG_BIAS_PULL_UP:
292 ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
293 break;
294 default:
295 dev_err(mcp->dev, "Invalid config param %04x\n", param);
296 return -ENOTSUPP;
297 }
298 }
299
300 return ret;
301}
302
303static const struct pinconf_ops mcp_pinconf_ops = {
304 .pin_config_get = mcp_pinconf_get,
305 .pin_config_set = mcp_pinconf_set,
306 .is_generic = true,
307};
308
309/*----------------------------------------------------------------------*/
310
311#ifdef CONFIG_SPI_MASTER
312
313static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
314{
315 struct mcp23s08 *mcp = context;
316 struct spi_device *spi = to_spi_device(mcp->dev);
317 struct spi_message m;
318 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
319 { .tx_buf = data, .len = count, }, };
320
321 spi_message_init(&m);
322 spi_message_add_tail(&t[0], &m);
323 spi_message_add_tail(&t[1], &m);
324
325 return spi_sync(spi, &m);
326}
327
328static int mcp23sxx_spi_gather_write(void *context,
329 const void *reg, size_t reg_size,
330 const void *val, size_t val_size)
331{
332 struct mcp23s08 *mcp = context;
333 struct spi_device *spi = to_spi_device(mcp->dev);
334 struct spi_message m;
335 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
336 { .tx_buf = reg, .len = reg_size, },
337 { .tx_buf = val, .len = val_size, }, };
338
339 spi_message_init(&m);
340 spi_message_add_tail(&t[0], &m);
341 spi_message_add_tail(&t[1], &m);
342 spi_message_add_tail(&t[2], &m);
343
344 return spi_sync(spi, &m);
345}
346
347static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
348 void *val, size_t val_size)
349{
350 struct mcp23s08 *mcp = context;
351 struct spi_device *spi = to_spi_device(mcp->dev);
352 u8 tx[2];
353
354 if (reg_size != 1)
355 return -EINVAL;
356
357 tx[0] = mcp->addr | 0x01;
358 tx[1] = *((u8 *) reg);
359
360 return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
361}
362
363static const struct regmap_bus mcp23sxx_spi_regmap = {
364 .write = mcp23sxx_spi_write,
365 .gather_write = mcp23sxx_spi_gather_write,
366 .read = mcp23sxx_spi_read,
367};
368
369#endif /* CONFIG_SPI_MASTER */
370
371/*----------------------------------------------------------------------*/
372
373/* A given spi_device can represent up to eight mcp23sxx chips
374 * sharing the same chipselect but using different addresses
375 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
376 * Driver data holds all the per-chip data.
377 */
378struct mcp23s08_driver_data {
379 unsigned ngpio;
380 struct mcp23s08 *mcp[8];
381 struct mcp23s08 chip[];
382};
383
384
385static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
386{
387 struct mcp23s08 *mcp = gpiochip_get_data(chip);
388 int status;
389
390 mutex_lock(&mcp->lock);
391 status = mcp_set_bit(mcp, MCP_IODIR, offset, true);
392 mutex_unlock(&mcp->lock);
393
394 return status;
395}
396
397static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
398{
399 struct mcp23s08 *mcp = gpiochip_get_data(chip);
400 int status, ret;
401
402 mutex_lock(&mcp->lock);
403
404 /* REVISIT reading this clears any IRQ ... */
405 ret = mcp_read(mcp, MCP_GPIO, &status);
406 if (ret < 0)
407 status = 0;
408 else {
409 mcp->cached_gpio = status;
410 status = !!(status & (1 << offset));
411 }
412
413 mutex_unlock(&mcp->lock);
414 return status;
415}
416
417static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, bool value)
418{
419 return mcp_set_mask(mcp, MCP_OLAT, mask, value);
420}
421
422static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
423{
424 struct mcp23s08 *mcp = gpiochip_get_data(chip);
425 unsigned mask = BIT(offset);
426
427 mutex_lock(&mcp->lock);
428 __mcp23s08_set(mcp, mask, !!value);
429 mutex_unlock(&mcp->lock);
430}
431
432static int
433mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
434{
435 struct mcp23s08 *mcp = gpiochip_get_data(chip);
436 unsigned mask = BIT(offset);
437 int status;
438
439 mutex_lock(&mcp->lock);
440 status = __mcp23s08_set(mcp, mask, value);
441 if (status == 0) {
442 status = mcp_set_mask(mcp, MCP_IODIR, mask, false);
443 }
444 mutex_unlock(&mcp->lock);
445 return status;
446}
447
448/*----------------------------------------------------------------------*/
449static irqreturn_t mcp23s08_irq(int irq, void *data)
450{
451 struct mcp23s08 *mcp = data;
452 int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval;
453 unsigned int child_irq;
454 bool intf_set, intcap_changed, gpio_bit_changed,
455 defval_changed, gpio_set;
456
457 mutex_lock(&mcp->lock);
458 if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
459 mutex_unlock(&mcp->lock);
460 return IRQ_HANDLED;
461 }
462
463 if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
464 mutex_unlock(&mcp->lock);
465 return IRQ_HANDLED;
466 }
467
468 if (mcp_read(mcp, MCP_INTCON, &intcon) < 0) {
469 mutex_unlock(&mcp->lock);
470 return IRQ_HANDLED;
471 }
472
473 if (mcp_read(mcp, MCP_DEFVAL, &defval) < 0) {
474 mutex_unlock(&mcp->lock);
475 return IRQ_HANDLED;
476 }
477
478 /* This clears the interrupt(configurable on S18) */
479 if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) {
480 mutex_unlock(&mcp->lock);
481 return IRQ_HANDLED;
482 }
483 gpio_orig = mcp->cached_gpio;
484 mcp->cached_gpio = gpio;
485 mutex_unlock(&mcp->lock);
486
487 if (intf == 0) {
488 /* There is no interrupt pending */
489 return IRQ_HANDLED;
490 }
491
492 dev_dbg(mcp->chip.parent,
493 "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
494 intcap, intf, gpio_orig, gpio);
495
496 for (i = 0; i < mcp->chip.ngpio; i++) {
497 /* We must check all of the inputs on the chip,
498 * otherwise we may not notice a change on >=2 pins.
499 *
500 * On at least the mcp23s17, INTCAP is only updated
501 * one byte at a time(INTCAPA and INTCAPB are
502 * not written to at the same time - only on a per-bank
503 * basis).
504 *
505 * INTF only contains the single bit that caused the
506 * interrupt per-bank. On the mcp23s17, there is
507 * INTFA and INTFB. If two pins are changed on the A
508 * side at the same time, INTF will only have one bit
509 * set. If one pin on the A side and one pin on the B
510 * side are changed at the same time, INTF will have
511 * two bits set. Thus, INTF can't be the only check
512 * to see if the input has changed.
513 */
514
515 intf_set = intf & BIT(i);
516 if (i < 8 && intf_set)
517 intcap_mask = 0x00FF;
518 else if (i >= 8 && intf_set)
519 intcap_mask = 0xFF00;
520 else
521 intcap_mask = 0x00;
522
523 intcap_changed = (intcap_mask &
524 (intcap & BIT(i))) !=
525 (intcap_mask & (BIT(i) & gpio_orig));
526 gpio_set = BIT(i) & gpio;
527 gpio_bit_changed = (BIT(i) & gpio_orig) !=
528 (BIT(i) & gpio);
529 defval_changed = (BIT(i) & intcon) &&
530 ((BIT(i) & gpio) !=
531 (BIT(i) & defval));
532
533 if (((gpio_bit_changed || intcap_changed) &&
534 (BIT(i) & mcp->irq_rise) && gpio_set) ||
535 ((gpio_bit_changed || intcap_changed) &&
536 (BIT(i) & mcp->irq_fall) && !gpio_set) ||
537 defval_changed) {
538 child_irq = irq_find_mapping(mcp->chip.irq.domain, i);
539 handle_nested_irq(child_irq);
540 }
541 }
542
543 return IRQ_HANDLED;
544}
545
546static void mcp23s08_irq_mask(struct irq_data *data)
547{
548 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
549 struct mcp23s08 *mcp = gpiochip_get_data(gc);
550 unsigned int pos = data->hwirq;
551
552 mcp_set_bit(mcp, MCP_GPINTEN, pos, false);
553}
554
555static void mcp23s08_irq_unmask(struct irq_data *data)
556{
557 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
558 struct mcp23s08 *mcp = gpiochip_get_data(gc);
559 unsigned int pos = data->hwirq;
560
561 mcp_set_bit(mcp, MCP_GPINTEN, pos, true);
562}
563
564static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
565{
566 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
567 struct mcp23s08 *mcp = gpiochip_get_data(gc);
568 unsigned int pos = data->hwirq;
569 int status = 0;
570
571 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
572 mcp_set_bit(mcp, MCP_INTCON, pos, false);
573 mcp->irq_rise |= BIT(pos);
574 mcp->irq_fall |= BIT(pos);
575 } else if (type & IRQ_TYPE_EDGE_RISING) {
576 mcp_set_bit(mcp, MCP_INTCON, pos, false);
577 mcp->irq_rise |= BIT(pos);
578 mcp->irq_fall &= ~BIT(pos);
579 } else if (type & IRQ_TYPE_EDGE_FALLING) {
580 mcp_set_bit(mcp, MCP_INTCON, pos, false);
581 mcp->irq_rise &= ~BIT(pos);
582 mcp->irq_fall |= BIT(pos);
583 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
584 mcp_set_bit(mcp, MCP_INTCON, pos, true);
585 mcp_set_bit(mcp, MCP_DEFVAL, pos, false);
586 } else if (type & IRQ_TYPE_LEVEL_LOW) {
587 mcp_set_bit(mcp, MCP_INTCON, pos, true);
588 mcp_set_bit(mcp, MCP_DEFVAL, pos, true);
589 } else
590 return -EINVAL;
591
592 return status;
593}
594
595static void mcp23s08_irq_bus_lock(struct irq_data *data)
596{
597 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
598 struct mcp23s08 *mcp = gpiochip_get_data(gc);
599
600 mutex_lock(&mcp->lock);
601 regcache_cache_only(mcp->regmap, true);
602}
603
604static void mcp23s08_irq_bus_unlock(struct irq_data *data)
605{
606 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
607 struct mcp23s08 *mcp = gpiochip_get_data(gc);
608
609 regcache_cache_only(mcp->regmap, false);
610 regcache_sync(mcp->regmap);
611
612 mutex_unlock(&mcp->lock);
613}
614
615static struct irq_chip mcp23s08_irq_chip = {
616 .name = "gpio-mcp23xxx",
617 .irq_mask = mcp23s08_irq_mask,
618 .irq_unmask = mcp23s08_irq_unmask,
619 .irq_set_type = mcp23s08_irq_set_type,
620 .irq_bus_lock = mcp23s08_irq_bus_lock,
621 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
622};
623
624static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
625{
626 struct gpio_chip *chip = &mcp->chip;
627 int err;
628 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
629
630 if (mcp->irq_active_high)
631 irqflags |= IRQF_TRIGGER_HIGH;
632 else
633 irqflags |= IRQF_TRIGGER_LOW;
634
635 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
636 mcp23s08_irq,
637 irqflags, dev_name(chip->parent), mcp);
638 if (err != 0) {
639 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
640 mcp->irq, err);
641 return err;
642 }
643
644 return 0;
645}
646
647static int mcp23s08_irqchip_setup(struct mcp23s08 *mcp)
648{
649 struct gpio_chip *chip = &mcp->chip;
650 int err;
651
652 err = gpiochip_irqchip_add_nested(chip,
653 &mcp23s08_irq_chip,
654 0,
655 handle_simple_irq,
656 IRQ_TYPE_NONE);
657 if (err) {
658 dev_err(chip->parent,
659 "could not connect irqchip to gpiochip: %d\n", err);
660 return err;
661 }
662
663 gpiochip_set_nested_irqchip(chip,
664 &mcp23s08_irq_chip,
665 mcp->irq);
666
667 return 0;
668}
669
670/*----------------------------------------------------------------------*/
671
672#ifdef CONFIG_DEBUG_FS
673
674#include <linux/seq_file.h>
675
676/*
677 * This compares the chip's registers with the register
678 * cache and corrects any incorrectly set register. This
679 * can be used to fix state for MCP23xxx, that temporary
680 * lost its power supply.
681 */
682#define MCP23S08_CONFIG_REGS 8
683static int __check_mcp23s08_reg_cache(struct mcp23s08 *mcp)
684{
685 int cached[MCP23S08_CONFIG_REGS];
686 int err = 0, i;
687
688 /* read cached config registers */
689 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
690 err = mcp_read(mcp, i, &cached[i]);
691 if (err)
692 goto out;
693 }
694
695 regcache_cache_bypass(mcp->regmap, true);
696
697 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
698 int uncached;
699 err = mcp_read(mcp, i, &uncached);
700 if (err)
701 goto out;
702
703 if (uncached != cached[i]) {
704 dev_err(mcp->dev, "restoring reg 0x%02x from 0x%04x to 0x%04x (power-loss?)\n",
705 i, uncached, cached[i]);
706 mcp_write(mcp, i, cached[i]);
707 }
708 }
709
710out:
711 if (err)
712 dev_err(mcp->dev, "read error: reg=%02x, err=%d", i, err);
713 regcache_cache_bypass(mcp->regmap, false);
714 return err;
715}
716
717/*
718 * This shows more info than the generic gpio dump code:
719 * pullups, deglitching, open drain drive.
720 */
721static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
722{
723 struct mcp23s08 *mcp;
724 char bank;
725 int t;
726 unsigned mask;
727 int iodir, gpio, gppu;
728
729 mcp = gpiochip_get_data(chip);
730
731 /* NOTE: we only handle one bank for now ... */
732 bank = '0' + ((mcp->addr >> 1) & 0x7);
733
734 mutex_lock(&mcp->lock);
735
736 t = __check_mcp23s08_reg_cache(mcp);
737 if (t) {
738 seq_printf(s, " I/O Error\n");
739 goto done;
740 }
741 t = mcp_read(mcp, MCP_IODIR, &iodir);
742 if (t) {
743 seq_printf(s, " I/O Error\n");
744 goto done;
745 }
746 t = mcp_read(mcp, MCP_GPIO, &gpio);
747 if (t) {
748 seq_printf(s, " I/O Error\n");
749 goto done;
750 }
751 t = mcp_read(mcp, MCP_GPPU, &gppu);
752 if (t) {
753 seq_printf(s, " I/O Error\n");
754 goto done;
755 }
756
757 for (t = 0, mask = BIT(0); t < chip->ngpio; t++, mask <<= 1) {
758 const char *label;
759
760 label = gpiochip_is_requested(chip, t);
761 if (!label)
762 continue;
763
764 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
765 chip->base + t, bank, t, label,
766 (iodir & mask) ? "in " : "out",
767 (gpio & mask) ? "hi" : "lo",
768 (gppu & mask) ? "up" : " ");
769 /* NOTE: ignoring the irq-related registers */
770 seq_puts(s, "\n");
771 }
772done:
773 mutex_unlock(&mcp->lock);
774}
775
776#else
777#define mcp23s08_dbg_show NULL
778#endif
779
780/*----------------------------------------------------------------------*/
781
782static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
783 void *data, unsigned addr, unsigned type,
784 unsigned int base, int cs)
785{
786 int status, ret;
787 bool mirror = false;
788 struct regmap_config *one_regmap_config = NULL;
789
790 mutex_init(&mcp->lock);
791
792 mcp->dev = dev;
793 mcp->addr = addr;
794 mcp->irq_active_high = false;
795
796 mcp->chip.direction_input = mcp23s08_direction_input;
797 mcp->chip.get = mcp23s08_get;
798 mcp->chip.direction_output = mcp23s08_direction_output;
799 mcp->chip.set = mcp23s08_set;
800 mcp->chip.dbg_show = mcp23s08_dbg_show;
801#ifdef CONFIG_OF_GPIO
802 mcp->chip.of_gpio_n_cells = 2;
803 mcp->chip.of_node = dev->of_node;
804#endif
805
806 switch (type) {
807#ifdef CONFIG_SPI_MASTER
808 case MCP_TYPE_S08:
809 case MCP_TYPE_S17:
810 switch (type) {
811 case MCP_TYPE_S08:
812 one_regmap_config =
813 devm_kmemdup(dev, &mcp23x08_regmap,
814 sizeof(struct regmap_config), GFP_KERNEL);
815 mcp->reg_shift = 0;
816 mcp->chip.ngpio = 8;
817 mcp->chip.label = "mcp23s08";
818 break;
819 case MCP_TYPE_S17:
820 one_regmap_config =
821 devm_kmemdup(dev, &mcp23x17_regmap,
822 sizeof(struct regmap_config), GFP_KERNEL);
823 mcp->reg_shift = 1;
824 mcp->chip.ngpio = 16;
825 mcp->chip.label = "mcp23s17";
826 break;
827 }
828 if (!one_regmap_config)
829 return -ENOMEM;
830
831 one_regmap_config->name = devm_kasprintf(dev, GFP_KERNEL, "%d", (addr & ~0x40) >> 1);
832 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
833 one_regmap_config);
834 break;
835
836 case MCP_TYPE_S18:
837 one_regmap_config =
838 devm_kmemdup(dev, &mcp23x17_regmap,
839 sizeof(struct regmap_config), GFP_KERNEL);
840 if (!one_regmap_config)
841 return -ENOMEM;
842 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
843 one_regmap_config);
844 mcp->reg_shift = 1;
845 mcp->chip.ngpio = 16;
846 mcp->chip.label = "mcp23s18";
847 break;
848#endif /* CONFIG_SPI_MASTER */
849
850#if IS_ENABLED(CONFIG_I2C)
851 case MCP_TYPE_008:
852 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
853 mcp->reg_shift = 0;
854 mcp->chip.ngpio = 8;
855 mcp->chip.label = "mcp23008";
856 break;
857
858 case MCP_TYPE_017:
859 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
860 mcp->reg_shift = 1;
861 mcp->chip.ngpio = 16;
862 mcp->chip.label = "mcp23017";
863 break;
864
865 case MCP_TYPE_018:
866 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
867 mcp->reg_shift = 1;
868 mcp->chip.ngpio = 16;
869 mcp->chip.label = "mcp23018";
870 break;
871#endif /* CONFIG_I2C */
872
873 default:
874 dev_err(dev, "invalid device type (%d)\n", type);
875 return -EINVAL;
876 }
877
878 if (IS_ERR(mcp->regmap))
879 return PTR_ERR(mcp->regmap);
880
881 mcp->chip.base = base;
882 mcp->chip.can_sleep = true;
883 mcp->chip.parent = dev;
884 mcp->chip.owner = THIS_MODULE;
885
886 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
887 * and MCP_IOCON.HAEN = 1, so we work with all chips.
888 */
889
890 ret = mcp_read(mcp, MCP_IOCON, &status);
891 if (ret < 0)
892 goto fail;
893
894 ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp);
895 if (ret < 0)
896 goto fail;
897
898 mcp->irq_controller =
899 device_property_read_bool(dev, "interrupt-controller");
900 if (mcp->irq && mcp->irq_controller) {
901 mcp->irq_active_high =
902 device_property_read_bool(dev,
903 "microchip,irq-active-high");
904
905 mirror = device_property_read_bool(dev, "microchip,irq-mirror");
906 }
907
908 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
909 mcp->irq_active_high) {
910 /* mcp23s17 has IOCON twice, make sure they are in sync */
911 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
912 status |= IOCON_HAEN | (IOCON_HAEN << 8);
913 if (mcp->irq_active_high)
914 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
915 else
916 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
917
918 if (mirror)
919 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
920
921 if (type == MCP_TYPE_S18 || type == MCP_TYPE_018)
922 status |= IOCON_INTCC | (IOCON_INTCC << 8);
923
924 ret = mcp_write(mcp, MCP_IOCON, status);
925 if (ret < 0)
926 goto fail;
927 }
928
929 if (mcp->irq && mcp->irq_controller) {
930 ret = mcp23s08_irqchip_setup(mcp);
931 if (ret)
932 goto fail;
933 }
934
935 mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
936 mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
937 mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
938 mcp->pinctrl_desc.npins = mcp->chip.ngpio;
939 if (mcp->pinctrl_desc.npins == 8)
940 mcp->pinctrl_desc.pins = mcp23x08_pins;
941 else if (mcp->pinctrl_desc.npins == 16)
942 mcp->pinctrl_desc.pins = mcp23x17_pins;
943 mcp->pinctrl_desc.owner = THIS_MODULE;
944
945 mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
946 if (IS_ERR(mcp->pctldev)) {
947 ret = PTR_ERR(mcp->pctldev);
948 goto fail;
949 }
950
951 if (mcp->irq)
952 ret = mcp23s08_irq_setup(mcp);
953
954fail:
955 if (ret < 0)
956 dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
957 return ret;
958}
959
960/*----------------------------------------------------------------------*/
961
962#ifdef CONFIG_OF
963#ifdef CONFIG_SPI_MASTER
964static const struct of_device_id mcp23s08_spi_of_match[] = {
965 {
966 .compatible = "microchip,mcp23s08",
967 .data = (void *) MCP_TYPE_S08,
968 },
969 {
970 .compatible = "microchip,mcp23s17",
971 .data = (void *) MCP_TYPE_S17,
972 },
973 {
974 .compatible = "microchip,mcp23s18",
975 .data = (void *) MCP_TYPE_S18,
976 },
977/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
978 {
979 .compatible = "mcp,mcp23s08",
980 .data = (void *) MCP_TYPE_S08,
981 },
982 {
983 .compatible = "mcp,mcp23s17",
984 .data = (void *) MCP_TYPE_S17,
985 },
986 { },
987};
988MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
989#endif
990
991#if IS_ENABLED(CONFIG_I2C)
992static const struct of_device_id mcp23s08_i2c_of_match[] = {
993 {
994 .compatible = "microchip,mcp23008",
995 .data = (void *) MCP_TYPE_008,
996 },
997 {
998 .compatible = "microchip,mcp23017",
999 .data = (void *) MCP_TYPE_017,
1000 },
1001 {
1002 .compatible = "microchip,mcp23018",
1003 .data = (void *) MCP_TYPE_018,
1004 },
1005/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
1006 {
1007 .compatible = "mcp,mcp23008",
1008 .data = (void *) MCP_TYPE_008,
1009 },
1010 {
1011 .compatible = "mcp,mcp23017",
1012 .data = (void *) MCP_TYPE_017,
1013 },
1014 { },
1015};
1016MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
1017#endif
1018#endif /* CONFIG_OF */
1019
1020
1021#if IS_ENABLED(CONFIG_I2C)
1022
1023static int mcp230xx_probe(struct i2c_client *client,
1024 const struct i2c_device_id *id)
1025{
1026 struct mcp23s08_platform_data *pdata, local_pdata;
1027 struct mcp23s08 *mcp;
1028 int status;
1029
1030 pdata = dev_get_platdata(&client->dev);
1031 if (!pdata) {
1032 pdata = &local_pdata;
1033 pdata->base = -1;
1034 }
1035
1036 mcp = devm_kzalloc(&client->dev, sizeof(*mcp), GFP_KERNEL);
1037 if (!mcp)
1038 return -ENOMEM;
1039
1040 mcp->irq = client->irq;
1041 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
1042 id->driver_data, pdata->base, 0);
1043 if (status)
1044 return status;
1045
1046 i2c_set_clientdata(client, mcp);
1047
1048 return 0;
1049}
1050
1051static const struct i2c_device_id mcp230xx_id[] = {
1052 { "mcp23008", MCP_TYPE_008 },
1053 { "mcp23017", MCP_TYPE_017 },
1054 { "mcp23018", MCP_TYPE_018 },
1055 { },
1056};
1057MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
1058
1059static struct i2c_driver mcp230xx_driver = {
1060 .driver = {
1061 .name = "mcp230xx",
1062 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
1063 },
1064 .probe = mcp230xx_probe,
1065 .id_table = mcp230xx_id,
1066};
1067
1068static int __init mcp23s08_i2c_init(void)
1069{
1070 return i2c_add_driver(&mcp230xx_driver);
1071}
1072
1073static void mcp23s08_i2c_exit(void)
1074{
1075 i2c_del_driver(&mcp230xx_driver);
1076}
1077
1078#else
1079
1080static int __init mcp23s08_i2c_init(void) { return 0; }
1081static void mcp23s08_i2c_exit(void) { }
1082
1083#endif /* CONFIG_I2C */
1084
1085/*----------------------------------------------------------------------*/
1086
1087#ifdef CONFIG_SPI_MASTER
1088
1089static int mcp23s08_probe(struct spi_device *spi)
1090{
1091 struct mcp23s08_platform_data *pdata, local_pdata;
1092 unsigned addr;
1093 int chips = 0;
1094 struct mcp23s08_driver_data *data;
1095 int status, type;
1096 unsigned ngpio = 0;
1097 const struct of_device_id *match;
1098
1099 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
1100 if (match)
1101 type = (int)(uintptr_t)match->data;
1102 else
1103 type = spi_get_device_id(spi)->driver_data;
1104
1105 pdata = dev_get_platdata(&spi->dev);
1106 if (!pdata) {
1107 pdata = &local_pdata;
1108 pdata->base = -1;
1109
1110 status = device_property_read_u32(&spi->dev,
1111 "microchip,spi-present-mask", &pdata->spi_present_mask);
1112 if (status) {
1113 status = device_property_read_u32(&spi->dev,
1114 "mcp,spi-present-mask",
1115 &pdata->spi_present_mask);
1116
1117 if (status) {
1118 dev_err(&spi->dev, "missing spi-present-mask");
1119 return -ENODEV;
1120 }
1121 }
1122 }
1123
1124 if (!pdata->spi_present_mask || pdata->spi_present_mask > 0xff) {
1125 dev_err(&spi->dev, "invalid spi-present-mask");
1126 return -ENODEV;
1127 }
1128
1129 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1130 if (pdata->spi_present_mask & BIT(addr))
1131 chips++;
1132 }
1133
1134 if (!chips)
1135 return -ENODEV;
1136
1137 data = devm_kzalloc(&spi->dev,
1138 sizeof(*data) + chips * sizeof(struct mcp23s08),
1139 GFP_KERNEL);
1140 if (!data)
1141 return -ENOMEM;
1142
1143 spi_set_drvdata(spi, data);
1144
1145 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1146 if (!(pdata->spi_present_mask & BIT(addr)))
1147 continue;
1148 chips--;
1149 data->mcp[addr] = &data->chip[chips];
1150 data->mcp[addr]->irq = spi->irq;
1151 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
1152 0x40 | (addr << 1), type,
1153 pdata->base, addr);
1154 if (status < 0)
1155 return status;
1156
1157 if (pdata->base != -1)
1158 pdata->base += data->mcp[addr]->chip.ngpio;
1159 ngpio += data->mcp[addr]->chip.ngpio;
1160 }
1161 data->ngpio = ngpio;
1162
1163 return 0;
1164}
1165
1166static const struct spi_device_id mcp23s08_ids[] = {
1167 { "mcp23s08", MCP_TYPE_S08 },
1168 { "mcp23s17", MCP_TYPE_S17 },
1169 { "mcp23s18", MCP_TYPE_S18 },
1170 { },
1171};
1172MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1173
1174static struct spi_driver mcp23s08_driver = {
1175 .probe = mcp23s08_probe,
1176 .id_table = mcp23s08_ids,
1177 .driver = {
1178 .name = "mcp23s08",
1179 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1180 },
1181};
1182
1183static int __init mcp23s08_spi_init(void)
1184{
1185 return spi_register_driver(&mcp23s08_driver);
1186}
1187
1188static void mcp23s08_spi_exit(void)
1189{
1190 spi_unregister_driver(&mcp23s08_driver);
1191}
1192
1193#else
1194
1195static int __init mcp23s08_spi_init(void) { return 0; }
1196static void mcp23s08_spi_exit(void) { }
1197
1198#endif /* CONFIG_SPI_MASTER */
1199
1200/*----------------------------------------------------------------------*/
1201
1202static int __init mcp23s08_init(void)
1203{
1204 int ret;
1205
1206 ret = mcp23s08_spi_init();
1207 if (ret)
1208 goto spi_fail;
1209
1210 ret = mcp23s08_i2c_init();
1211 if (ret)
1212 goto i2c_fail;
1213
1214 return 0;
1215
1216 i2c_fail:
1217 mcp23s08_spi_exit();
1218 spi_fail:
1219 return ret;
1220}
1221/* register after spi/i2c postcore initcall and before
1222 * subsys initcalls that may rely on these GPIOs
1223 */
1224subsys_initcall(mcp23s08_init);
1225
1226static void __exit mcp23s08_exit(void)
1227{
1228 mcp23s08_spi_exit();
1229 mcp23s08_i2c_exit();
1230}
1231module_exit(mcp23s08_exit);
1232
1233MODULE_LICENSE("GPL");
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