]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * CXL Flash Device Driver | |
3 | * | |
4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation | |
5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation | |
6 | * | |
7 | * Copyright (C) 2015 IBM Corporation | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #ifndef _CXLFLASH_COMMON_H | |
16 | #define _CXLFLASH_COMMON_H | |
17 | ||
18 | #include <linux/irq_poll.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/rwsem.h> | |
21 | #include <linux/types.h> | |
22 | #include <scsi/scsi.h> | |
23 | #include <scsi/scsi_cmnd.h> | |
24 | #include <scsi/scsi_device.h> | |
25 | ||
26 | extern const struct file_operations cxlflash_cxl_fops; | |
27 | ||
28 | #define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */ | |
29 | #define MAX_FC_PORTS CXLFLASH_MAX_FC_PORTS /* max ports per AFU */ | |
30 | #define LEGACY_FC_PORTS 2 /* legacy ports per AFU */ | |
31 | ||
32 | #define CHAN2PORTBANK(_x) ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK)) | |
33 | #define CHAN2BANKPORT(_x) ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1)) | |
34 | ||
35 | #define CHAN2PORTMASK(_x) (1 << (_x)) /* channel to port mask */ | |
36 | #define PORTMASK2CHAN(_x) (ilog2((_x))) /* port mask to channel */ | |
37 | #define PORTNUM2CHAN(_x) ((_x) - 1) /* port number to channel */ | |
38 | ||
39 | #define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */ | |
40 | #define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */ | |
41 | #define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants | |
42 | max_sectors | |
43 | in units of | |
44 | 512 byte | |
45 | sectors | |
46 | */ | |
47 | ||
48 | #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry)) | |
49 | ||
50 | /* AFU command retry limit */ | |
51 | #define MC_RETRY_CNT 5 /* sufficient for SCSI check and | |
52 | certain AFU errors */ | |
53 | ||
54 | /* Command management definitions */ | |
55 | #define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for | |
56 | alignment and more | |
57 | efficient array | |
58 | index derivation | |
59 | */ | |
60 | ||
61 | #define CXLFLASH_MAX_CMDS 256 | |
62 | #define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS | |
63 | ||
64 | /* RRQ for master issued cmds */ | |
65 | #define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS | |
66 | ||
67 | /* SQ for master issued cmds */ | |
68 | #define NUM_SQ_ENTRY CXLFLASH_MAX_CMDS | |
69 | ||
70 | ||
71 | static inline void check_sizes(void) | |
72 | { | |
73 | BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK); | |
74 | } | |
75 | ||
76 | /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */ | |
77 | #define CMD_BUFSIZE SIZE_4K | |
78 | ||
79 | enum cxlflash_lr_state { | |
80 | LINK_RESET_INVALID, | |
81 | LINK_RESET_REQUIRED, | |
82 | LINK_RESET_COMPLETE | |
83 | }; | |
84 | ||
85 | enum cxlflash_init_state { | |
86 | INIT_STATE_NONE, | |
87 | INIT_STATE_PCI, | |
88 | INIT_STATE_AFU, | |
89 | INIT_STATE_SCSI | |
90 | }; | |
91 | ||
92 | enum cxlflash_state { | |
93 | STATE_NORMAL, /* Normal running state, everything good */ | |
94 | STATE_RESET, /* Reset state, trying to reset/recover */ | |
95 | STATE_FAILTERM /* Failed/terminating state, error out users/threads */ | |
96 | }; | |
97 | ||
98 | /* | |
99 | * Each context has its own set of resource handles that is visible | |
100 | * only from that context. | |
101 | */ | |
102 | ||
103 | struct cxlflash_cfg { | |
104 | struct afu *afu; | |
105 | struct cxl_context *mcctx; | |
106 | ||
107 | struct pci_dev *dev; | |
108 | struct pci_device_id *dev_id; | |
109 | struct Scsi_Host *host; | |
110 | int num_fc_ports; | |
111 | ||
112 | ulong cxlflash_regs_pci; | |
113 | ||
114 | struct work_struct work_q; | |
115 | enum cxlflash_init_state init_state; | |
116 | enum cxlflash_lr_state lr_state; | |
117 | int lr_port; | |
118 | atomic_t scan_host_needed; | |
119 | ||
120 | struct cxl_afu *cxl_afu; | |
121 | ||
122 | atomic_t recovery_threads; | |
123 | struct mutex ctx_recovery_mutex; | |
124 | struct mutex ctx_tbl_list_mutex; | |
125 | struct rw_semaphore ioctl_rwsem; | |
126 | struct ctx_info *ctx_tbl[MAX_CONTEXT]; | |
127 | struct list_head ctx_err_recovery; /* contexts w/ recovery pending */ | |
128 | struct file_operations cxl_fops; | |
129 | ||
130 | /* Parameters that are LUN table related */ | |
131 | int last_lun_index[MAX_FC_PORTS]; | |
132 | int promote_lun_index; | |
133 | struct list_head lluns; /* list of llun_info structs */ | |
134 | ||
135 | wait_queue_head_t tmf_waitq; | |
136 | spinlock_t tmf_slock; | |
137 | bool tmf_active; | |
138 | wait_queue_head_t reset_waitq; | |
139 | enum cxlflash_state state; | |
140 | }; | |
141 | ||
142 | struct afu_cmd { | |
143 | struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */ | |
144 | struct sisl_ioasa sa; /* IOASA must follow IOARCB */ | |
145 | struct afu *parent; | |
146 | struct scsi_cmnd *scp; | |
147 | struct completion cevent; | |
148 | struct list_head queue; | |
149 | ||
150 | u8 cmd_tmf:1; | |
151 | ||
152 | /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned. | |
153 | * However for performance reasons the IOARCB/IOASA should be | |
154 | * cache line aligned. | |
155 | */ | |
156 | } __aligned(cache_line_size()); | |
157 | ||
158 | static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc) | |
159 | { | |
160 | return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd)); | |
161 | } | |
162 | ||
163 | static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc) | |
164 | { | |
165 | struct afu_cmd *afuc = sc_to_afuc(sc); | |
166 | ||
167 | memset(afuc, 0, sizeof(*afuc)); | |
168 | return afuc; | |
169 | } | |
170 | ||
171 | struct afu { | |
172 | /* Stuff requiring alignment go first. */ | |
173 | struct sisl_ioarcb sq[NUM_SQ_ENTRY]; /* 16K SQ */ | |
174 | u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */ | |
175 | ||
176 | /* Beware of alignment till here. Preferably introduce new | |
177 | * fields after this point | |
178 | */ | |
179 | ||
180 | int (*send_cmd)(struct afu *, struct afu_cmd *); | |
181 | void (*context_reset)(struct afu_cmd *); | |
182 | ||
183 | /* AFU HW */ | |
184 | struct cxl_ioctl_start_work work; | |
185 | struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */ | |
186 | struct sisl_host_map __iomem *host_map; /* MC host map */ | |
187 | struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */ | |
188 | ||
189 | ctx_hndl_t ctx_hndl; /* master's context handle */ | |
190 | ||
191 | atomic_t hsq_credits; | |
192 | spinlock_t hsq_slock; | |
193 | struct sisl_ioarcb *hsq_start; | |
194 | struct sisl_ioarcb *hsq_end; | |
195 | struct sisl_ioarcb *hsq_curr; | |
196 | spinlock_t hrrq_slock; | |
197 | u64 *hrrq_start; | |
198 | u64 *hrrq_end; | |
199 | u64 *hrrq_curr; | |
200 | bool toggle; | |
201 | atomic_t cmds_active; /* Number of currently active AFU commands */ | |
202 | s64 room; | |
203 | spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */ | |
204 | u64 hb; | |
205 | u32 internal_lun; /* User-desired LUN mode for this AFU */ | |
206 | ||
207 | char version[16]; | |
208 | u64 interface_version; | |
209 | ||
210 | u32 irqpoll_weight; | |
211 | struct irq_poll irqpoll; | |
212 | struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */ | |
213 | ||
214 | }; | |
215 | ||
216 | static inline bool afu_is_irqpoll_enabled(struct afu *afu) | |
217 | { | |
218 | return !!afu->irqpoll_weight; | |
219 | } | |
220 | ||
221 | static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode) | |
222 | { | |
223 | u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT; | |
224 | ||
225 | return afu_cap & cmd_mode; | |
226 | } | |
227 | ||
228 | static inline bool afu_is_sq_cmd_mode(struct afu *afu) | |
229 | { | |
230 | return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE); | |
231 | } | |
232 | ||
233 | static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu) | |
234 | { | |
235 | return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE); | |
236 | } | |
237 | ||
238 | static inline u64 lun_to_lunid(u64 lun) | |
239 | { | |
240 | __be64 lun_id; | |
241 | ||
242 | int_to_scsilun(lun, (struct scsi_lun *)&lun_id); | |
243 | return be64_to_cpu(lun_id); | |
244 | } | |
245 | ||
246 | static inline struct fc_port_bank __iomem *get_fc_port_bank( | |
247 | struct cxlflash_cfg *cfg, int i) | |
248 | { | |
249 | struct afu *afu = cfg->afu; | |
250 | ||
251 | return &afu->afu_map->global.bank[CHAN2PORTBANK(i)]; | |
252 | } | |
253 | ||
254 | static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i) | |
255 | { | |
256 | struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i); | |
257 | ||
258 | return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0]; | |
259 | } | |
260 | ||
261 | static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i) | |
262 | { | |
263 | struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i); | |
264 | ||
265 | return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0]; | |
266 | } | |
267 | ||
268 | int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8); | |
269 | void cxlflash_list_init(void); | |
270 | void cxlflash_term_global_luns(void); | |
271 | void cxlflash_free_errpage(void); | |
272 | int cxlflash_ioctl(struct scsi_device *, int, void __user *); | |
273 | void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *); | |
274 | int cxlflash_mark_contexts_error(struct cxlflash_cfg *); | |
275 | void cxlflash_term_local_luns(struct cxlflash_cfg *); | |
276 | void cxlflash_restore_luntable(struct cxlflash_cfg *); | |
277 | ||
278 | #endif /* ifndef _CXLFLASH_COMMON_H */ |