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1 | /* | |
2 | * libata-core.c - helper library for ATA | |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
33 | */ | |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
51 | #include <linux/jiffies.h> | |
52 | #include <scsi/scsi.h> | |
53 | #include "scsi.h" | |
54 | #include "scsi_priv.h" | |
55 | #include <scsi/scsi_host.h> | |
56 | #include <linux/libata.h> | |
57 | #include <asm/io.h> | |
58 | #include <asm/semaphore.h> | |
59 | #include <asm/byteorder.h> | |
60 | ||
61 | #include "libata.h" | |
62 | ||
63 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
64 | unsigned long tmout_pat, | |
65 | unsigned long tmout); | |
66 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev); | |
67 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); | |
68 | static void ata_set_mode(struct ata_port *ap); | |
69 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
70 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); | |
71 | static int fgb(u32 bitmap); | |
72 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
73 | u8 *xfer_mode_out, | |
74 | unsigned int *xfer_shift_out); | |
75 | static void __ata_qc_complete(struct ata_queued_cmd *qc); | |
76 | ||
77 | static unsigned int ata_unique_id = 1; | |
78 | static struct workqueue_struct *ata_wq; | |
79 | ||
80 | int atapi_enabled = 0; | |
81 | module_param(atapi_enabled, int, 0444); | |
82 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
83 | ||
84 | MODULE_AUTHOR("Jeff Garzik"); | |
85 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(DRV_VERSION); | |
88 | ||
89 | /** | |
90 | * ata_tf_load - send taskfile registers to host controller | |
91 | * @ap: Port to which output is sent | |
92 | * @tf: ATA taskfile register set | |
93 | * | |
94 | * Outputs ATA taskfile to standard ATA host controller. | |
95 | * | |
96 | * LOCKING: | |
97 | * Inherited from caller. | |
98 | */ | |
99 | ||
100 | static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
101 | { | |
102 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
103 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
104 | ||
105 | if (tf->ctl != ap->last_ctl) { | |
106 | outb(tf->ctl, ioaddr->ctl_addr); | |
107 | ap->last_ctl = tf->ctl; | |
108 | ata_wait_idle(ap); | |
109 | } | |
110 | ||
111 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
112 | outb(tf->hob_feature, ioaddr->feature_addr); | |
113 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
114 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
115 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
116 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
117 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
118 | tf->hob_feature, | |
119 | tf->hob_nsect, | |
120 | tf->hob_lbal, | |
121 | tf->hob_lbam, | |
122 | tf->hob_lbah); | |
123 | } | |
124 | ||
125 | if (is_addr) { | |
126 | outb(tf->feature, ioaddr->feature_addr); | |
127 | outb(tf->nsect, ioaddr->nsect_addr); | |
128 | outb(tf->lbal, ioaddr->lbal_addr); | |
129 | outb(tf->lbam, ioaddr->lbam_addr); | |
130 | outb(tf->lbah, ioaddr->lbah_addr); | |
131 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
132 | tf->feature, | |
133 | tf->nsect, | |
134 | tf->lbal, | |
135 | tf->lbam, | |
136 | tf->lbah); | |
137 | } | |
138 | ||
139 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
140 | outb(tf->device, ioaddr->device_addr); | |
141 | VPRINTK("device 0x%X\n", tf->device); | |
142 | } | |
143 | ||
144 | ata_wait_idle(ap); | |
145 | } | |
146 | ||
147 | /** | |
148 | * ata_tf_load_mmio - send taskfile registers to host controller | |
149 | * @ap: Port to which output is sent | |
150 | * @tf: ATA taskfile register set | |
151 | * | |
152 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
153 | * | |
154 | * LOCKING: | |
155 | * Inherited from caller. | |
156 | */ | |
157 | ||
158 | static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
159 | { | |
160 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
161 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
162 | ||
163 | if (tf->ctl != ap->last_ctl) { | |
164 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
165 | ap->last_ctl = tf->ctl; | |
166 | ata_wait_idle(ap); | |
167 | } | |
168 | ||
169 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
170 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
171 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
172 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
173 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
174 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
175 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
176 | tf->hob_feature, | |
177 | tf->hob_nsect, | |
178 | tf->hob_lbal, | |
179 | tf->hob_lbam, | |
180 | tf->hob_lbah); | |
181 | } | |
182 | ||
183 | if (is_addr) { | |
184 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
185 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
186 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
187 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
188 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
189 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
190 | tf->feature, | |
191 | tf->nsect, | |
192 | tf->lbal, | |
193 | tf->lbam, | |
194 | tf->lbah); | |
195 | } | |
196 | ||
197 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
198 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
199 | VPRINTK("device 0x%X\n", tf->device); | |
200 | } | |
201 | ||
202 | ata_wait_idle(ap); | |
203 | } | |
204 | ||
205 | ||
206 | /** | |
207 | * ata_tf_load - send taskfile registers to host controller | |
208 | * @ap: Port to which output is sent | |
209 | * @tf: ATA taskfile register set | |
210 | * | |
211 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
212 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
213 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
214 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
215 | * hob_lbal, hob_lbam, and hob_lbah. | |
216 | * | |
217 | * This function waits for idle (!BUSY and !DRQ) after writing | |
218 | * registers. If the control register has a new value, this | |
219 | * function also waits for idle after writing control and before | |
220 | * writing the remaining registers. | |
221 | * | |
222 | * May be used as the tf_load() entry in ata_port_operations. | |
223 | * | |
224 | * LOCKING: | |
225 | * Inherited from caller. | |
226 | */ | |
227 | void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) | |
228 | { | |
229 | if (ap->flags & ATA_FLAG_MMIO) | |
230 | ata_tf_load_mmio(ap, tf); | |
231 | else | |
232 | ata_tf_load_pio(ap, tf); | |
233 | } | |
234 | ||
235 | /** | |
236 | * ata_exec_command_pio - issue ATA command to host controller | |
237 | * @ap: port to which command is being issued | |
238 | * @tf: ATA taskfile register set | |
239 | * | |
240 | * Issues PIO write to ATA command register, with proper | |
241 | * synchronization with interrupt handler / other threads. | |
242 | * | |
243 | * LOCKING: | |
244 | * spin_lock_irqsave(host_set lock) | |
245 | */ | |
246 | ||
247 | static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
248 | { | |
249 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
250 | ||
251 | outb(tf->command, ap->ioaddr.command_addr); | |
252 | ata_pause(ap); | |
253 | } | |
254 | ||
255 | ||
256 | /** | |
257 | * ata_exec_command_mmio - issue ATA command to host controller | |
258 | * @ap: port to which command is being issued | |
259 | * @tf: ATA taskfile register set | |
260 | * | |
261 | * Issues MMIO write to ATA command register, with proper | |
262 | * synchronization with interrupt handler / other threads. | |
263 | * | |
264 | * LOCKING: | |
265 | * spin_lock_irqsave(host_set lock) | |
266 | */ | |
267 | ||
268 | static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
269 | { | |
270 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
271 | ||
272 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
273 | ata_pause(ap); | |
274 | } | |
275 | ||
276 | ||
277 | /** | |
278 | * ata_exec_command - issue ATA command to host controller | |
279 | * @ap: port to which command is being issued | |
280 | * @tf: ATA taskfile register set | |
281 | * | |
282 | * Issues PIO/MMIO write to ATA command register, with proper | |
283 | * synchronization with interrupt handler / other threads. | |
284 | * | |
285 | * LOCKING: | |
286 | * spin_lock_irqsave(host_set lock) | |
287 | */ | |
288 | void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) | |
289 | { | |
290 | if (ap->flags & ATA_FLAG_MMIO) | |
291 | ata_exec_command_mmio(ap, tf); | |
292 | else | |
293 | ata_exec_command_pio(ap, tf); | |
294 | } | |
295 | ||
296 | /** | |
297 | * ata_exec - issue ATA command to host controller | |
298 | * @ap: port to which command is being issued | |
299 | * @tf: ATA taskfile register set | |
300 | * | |
301 | * Issues PIO/MMIO write to ATA command register, with proper | |
302 | * synchronization with interrupt handler / other threads. | |
303 | * | |
304 | * LOCKING: | |
305 | * Obtains host_set lock. | |
306 | */ | |
307 | ||
308 | static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) | |
309 | { | |
310 | unsigned long flags; | |
311 | ||
312 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
313 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
314 | ap->ops->exec_command(ap, tf); | |
315 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
316 | } | |
317 | ||
318 | /** | |
319 | * ata_tf_to_host - issue ATA taskfile to host controller | |
320 | * @ap: port to which command is being issued | |
321 | * @tf: ATA taskfile register set | |
322 | * | |
323 | * Issues ATA taskfile register set to ATA host controller, | |
324 | * with proper synchronization with interrupt handler and | |
325 | * other threads. | |
326 | * | |
327 | * LOCKING: | |
328 | * Obtains host_set lock. | |
329 | */ | |
330 | ||
331 | static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) | |
332 | { | |
333 | ap->ops->tf_load(ap, tf); | |
334 | ||
335 | ata_exec(ap, tf); | |
336 | } | |
337 | ||
338 | /** | |
339 | * ata_tf_to_host_nolock - issue ATA taskfile to host controller | |
340 | * @ap: port to which command is being issued | |
341 | * @tf: ATA taskfile register set | |
342 | * | |
343 | * Issues ATA taskfile register set to ATA host controller, | |
344 | * with proper synchronization with interrupt handler and | |
345 | * other threads. | |
346 | * | |
347 | * LOCKING: | |
348 | * spin_lock_irqsave(host_set lock) | |
349 | */ | |
350 | ||
351 | void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) | |
352 | { | |
353 | ap->ops->tf_load(ap, tf); | |
354 | ap->ops->exec_command(ap, tf); | |
355 | } | |
356 | ||
357 | /** | |
358 | * ata_tf_read_pio - input device's ATA taskfile shadow registers | |
359 | * @ap: Port from which input is read | |
360 | * @tf: ATA taskfile register set for storing input | |
361 | * | |
362 | * Reads ATA taskfile registers for currently-selected device | |
363 | * into @tf. | |
364 | * | |
365 | * LOCKING: | |
366 | * Inherited from caller. | |
367 | */ | |
368 | ||
369 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
370 | { | |
371 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
372 | ||
373 | tf->nsect = inb(ioaddr->nsect_addr); | |
374 | tf->lbal = inb(ioaddr->lbal_addr); | |
375 | tf->lbam = inb(ioaddr->lbam_addr); | |
376 | tf->lbah = inb(ioaddr->lbah_addr); | |
377 | tf->device = inb(ioaddr->device_addr); | |
378 | ||
379 | if (tf->flags & ATA_TFLAG_LBA48) { | |
380 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
381 | tf->hob_feature = inb(ioaddr->error_addr); | |
382 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
383 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
384 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
385 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
386 | } | |
387 | } | |
388 | ||
389 | /** | |
390 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
391 | * @ap: Port from which input is read | |
392 | * @tf: ATA taskfile register set for storing input | |
393 | * | |
394 | * Reads ATA taskfile registers for currently-selected device | |
395 | * into @tf via MMIO. | |
396 | * | |
397 | * LOCKING: | |
398 | * Inherited from caller. | |
399 | */ | |
400 | ||
401 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
402 | { | |
403 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
404 | ||
405 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
406 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
407 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
408 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
409 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
410 | ||
411 | if (tf->flags & ATA_TFLAG_LBA48) { | |
412 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
413 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
414 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
415 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
416 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
417 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
418 | } | |
419 | } | |
420 | ||
421 | ||
422 | /** | |
423 | * ata_tf_read - input device's ATA taskfile shadow registers | |
424 | * @ap: Port from which input is read | |
425 | * @tf: ATA taskfile register set for storing input | |
426 | * | |
427 | * Reads ATA taskfile registers for currently-selected device | |
428 | * into @tf. | |
429 | * | |
430 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
431 | * is set, also reads the hob registers. | |
432 | * | |
433 | * May be used as the tf_read() entry in ata_port_operations. | |
434 | * | |
435 | * LOCKING: | |
436 | * Inherited from caller. | |
437 | */ | |
438 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | |
439 | { | |
440 | if (ap->flags & ATA_FLAG_MMIO) | |
441 | ata_tf_read_mmio(ap, tf); | |
442 | else | |
443 | ata_tf_read_pio(ap, tf); | |
444 | } | |
445 | ||
446 | /** | |
447 | * ata_check_status_pio - Read device status reg & clear interrupt | |
448 | * @ap: port where the device is | |
449 | * | |
450 | * Reads ATA taskfile status register for currently-selected device | |
451 | * and return its value. This also clears pending interrupts | |
452 | * from this device | |
453 | * | |
454 | * LOCKING: | |
455 | * Inherited from caller. | |
456 | */ | |
457 | static u8 ata_check_status_pio(struct ata_port *ap) | |
458 | { | |
459 | return inb(ap->ioaddr.status_addr); | |
460 | } | |
461 | ||
462 | /** | |
463 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
464 | * @ap: port where the device is | |
465 | * | |
466 | * Reads ATA taskfile status register for currently-selected device | |
467 | * via MMIO and return its value. This also clears pending interrupts | |
468 | * from this device | |
469 | * | |
470 | * LOCKING: | |
471 | * Inherited from caller. | |
472 | */ | |
473 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
474 | { | |
475 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
476 | } | |
477 | ||
478 | ||
479 | /** | |
480 | * ata_check_status - Read device status reg & clear interrupt | |
481 | * @ap: port where the device is | |
482 | * | |
483 | * Reads ATA taskfile status register for currently-selected device | |
484 | * and return its value. This also clears pending interrupts | |
485 | * from this device | |
486 | * | |
487 | * May be used as the check_status() entry in ata_port_operations. | |
488 | * | |
489 | * LOCKING: | |
490 | * Inherited from caller. | |
491 | */ | |
492 | u8 ata_check_status(struct ata_port *ap) | |
493 | { | |
494 | if (ap->flags & ATA_FLAG_MMIO) | |
495 | return ata_check_status_mmio(ap); | |
496 | return ata_check_status_pio(ap); | |
497 | } | |
498 | ||
499 | ||
500 | /** | |
501 | * ata_altstatus - Read device alternate status reg | |
502 | * @ap: port where the device is | |
503 | * | |
504 | * Reads ATA taskfile alternate status register for | |
505 | * currently-selected device and return its value. | |
506 | * | |
507 | * Note: may NOT be used as the check_altstatus() entry in | |
508 | * ata_port_operations. | |
509 | * | |
510 | * LOCKING: | |
511 | * Inherited from caller. | |
512 | */ | |
513 | u8 ata_altstatus(struct ata_port *ap) | |
514 | { | |
515 | if (ap->ops->check_altstatus) | |
516 | return ap->ops->check_altstatus(ap); | |
517 | ||
518 | if (ap->flags & ATA_FLAG_MMIO) | |
519 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
520 | return inb(ap->ioaddr.altstatus_addr); | |
521 | } | |
522 | ||
523 | ||
524 | /** | |
525 | * ata_chk_err - Read device error reg | |
526 | * @ap: port where the device is | |
527 | * | |
528 | * Reads ATA taskfile error register for | |
529 | * currently-selected device and return its value. | |
530 | * | |
531 | * Note: may NOT be used as the check_err() entry in | |
532 | * ata_port_operations. | |
533 | * | |
534 | * LOCKING: | |
535 | * Inherited from caller. | |
536 | */ | |
537 | u8 ata_chk_err(struct ata_port *ap) | |
538 | { | |
539 | if (ap->ops->check_err) | |
540 | return ap->ops->check_err(ap); | |
541 | ||
542 | if (ap->flags & ATA_FLAG_MMIO) { | |
543 | return readb((void __iomem *) ap->ioaddr.error_addr); | |
544 | } | |
545 | return inb(ap->ioaddr.error_addr); | |
546 | } | |
547 | ||
548 | /** | |
549 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
550 | * @tf: Taskfile to convert | |
551 | * @fis: Buffer into which data will output | |
552 | * @pmp: Port multiplier port | |
553 | * | |
554 | * Converts a standard ATA taskfile to a Serial ATA | |
555 | * FIS structure (Register - Host to Device). | |
556 | * | |
557 | * LOCKING: | |
558 | * Inherited from caller. | |
559 | */ | |
560 | ||
561 | void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
562 | { | |
563 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
564 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
565 | bit 7 indicates Command FIS */ | |
566 | fis[2] = tf->command; | |
567 | fis[3] = tf->feature; | |
568 | ||
569 | fis[4] = tf->lbal; | |
570 | fis[5] = tf->lbam; | |
571 | fis[6] = tf->lbah; | |
572 | fis[7] = tf->device; | |
573 | ||
574 | fis[8] = tf->hob_lbal; | |
575 | fis[9] = tf->hob_lbam; | |
576 | fis[10] = tf->hob_lbah; | |
577 | fis[11] = tf->hob_feature; | |
578 | ||
579 | fis[12] = tf->nsect; | |
580 | fis[13] = tf->hob_nsect; | |
581 | fis[14] = 0; | |
582 | fis[15] = tf->ctl; | |
583 | ||
584 | fis[16] = 0; | |
585 | fis[17] = 0; | |
586 | fis[18] = 0; | |
587 | fis[19] = 0; | |
588 | } | |
589 | ||
590 | /** | |
591 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
592 | * @fis: Buffer from which data will be input | |
593 | * @tf: Taskfile to output | |
594 | * | |
595 | * Converts a standard ATA taskfile to a Serial ATA | |
596 | * FIS structure (Register - Host to Device). | |
597 | * | |
598 | * LOCKING: | |
599 | * Inherited from caller. | |
600 | */ | |
601 | ||
602 | void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) | |
603 | { | |
604 | tf->command = fis[2]; /* status */ | |
605 | tf->feature = fis[3]; /* error */ | |
606 | ||
607 | tf->lbal = fis[4]; | |
608 | tf->lbam = fis[5]; | |
609 | tf->lbah = fis[6]; | |
610 | tf->device = fis[7]; | |
611 | ||
612 | tf->hob_lbal = fis[8]; | |
613 | tf->hob_lbam = fis[9]; | |
614 | tf->hob_lbah = fis[10]; | |
615 | ||
616 | tf->nsect = fis[12]; | |
617 | tf->hob_nsect = fis[13]; | |
618 | } | |
619 | ||
620 | static const u8 ata_rw_cmds[] = { | |
621 | /* pio multi */ | |
622 | ATA_CMD_READ_MULTI, | |
623 | ATA_CMD_WRITE_MULTI, | |
624 | ATA_CMD_READ_MULTI_EXT, | |
625 | ATA_CMD_WRITE_MULTI_EXT, | |
626 | /* pio */ | |
627 | ATA_CMD_PIO_READ, | |
628 | ATA_CMD_PIO_WRITE, | |
629 | ATA_CMD_PIO_READ_EXT, | |
630 | ATA_CMD_PIO_WRITE_EXT, | |
631 | /* dma */ | |
632 | ATA_CMD_READ, | |
633 | ATA_CMD_WRITE, | |
634 | ATA_CMD_READ_EXT, | |
635 | ATA_CMD_WRITE_EXT | |
636 | }; | |
637 | ||
638 | /** | |
639 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol | |
640 | * @qc: command to examine and configure | |
641 | * | |
642 | * Examine the device configuration and tf->flags to calculate | |
643 | * the proper read/write commands and protocol to use. | |
644 | * | |
645 | * LOCKING: | |
646 | * caller. | |
647 | */ | |
648 | void ata_rwcmd_protocol(struct ata_queued_cmd *qc) | |
649 | { | |
650 | struct ata_taskfile *tf = &qc->tf; | |
651 | struct ata_device *dev = qc->dev; | |
652 | ||
653 | int index, lba48, write; | |
654 | ||
655 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; | |
656 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
657 | ||
658 | if (dev->flags & ATA_DFLAG_PIO) { | |
659 | tf->protocol = ATA_PROT_PIO; | |
660 | index = dev->multi_count ? 0 : 4; | |
661 | } else { | |
662 | tf->protocol = ATA_PROT_DMA; | |
663 | index = 8; | |
664 | } | |
665 | ||
666 | tf->command = ata_rw_cmds[index + lba48 + write]; | |
667 | } | |
668 | ||
669 | static const char * xfer_mode_str[] = { | |
670 | "UDMA/16", | |
671 | "UDMA/25", | |
672 | "UDMA/33", | |
673 | "UDMA/44", | |
674 | "UDMA/66", | |
675 | "UDMA/100", | |
676 | "UDMA/133", | |
677 | "UDMA7", | |
678 | "MWDMA0", | |
679 | "MWDMA1", | |
680 | "MWDMA2", | |
681 | "PIO0", | |
682 | "PIO1", | |
683 | "PIO2", | |
684 | "PIO3", | |
685 | "PIO4", | |
686 | }; | |
687 | ||
688 | /** | |
689 | * ata_udma_string - convert UDMA bit offset to string | |
690 | * @mask: mask of bits supported; only highest bit counts. | |
691 | * | |
692 | * Determine string which represents the highest speed | |
693 | * (highest bit in @udma_mask). | |
694 | * | |
695 | * LOCKING: | |
696 | * None. | |
697 | * | |
698 | * RETURNS: | |
699 | * Constant C string representing highest speed listed in | |
700 | * @udma_mask, or the constant C string "<n/a>". | |
701 | */ | |
702 | ||
703 | static const char *ata_mode_string(unsigned int mask) | |
704 | { | |
705 | int i; | |
706 | ||
707 | for (i = 7; i >= 0; i--) | |
708 | if (mask & (1 << i)) | |
709 | goto out; | |
710 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
711 | if (mask & (1 << i)) | |
712 | goto out; | |
713 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
714 | if (mask & (1 << i)) | |
715 | goto out; | |
716 | ||
717 | return "<n/a>"; | |
718 | ||
719 | out: | |
720 | return xfer_mode_str[i]; | |
721 | } | |
722 | ||
723 | /** | |
724 | * ata_pio_devchk - PATA device presence detection | |
725 | * @ap: ATA channel to examine | |
726 | * @device: Device to examine (starting at zero) | |
727 | * | |
728 | * This technique was originally described in | |
729 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
730 | * later found its way into the ATA/ATAPI spec. | |
731 | * | |
732 | * Write a pattern to the ATA shadow registers, | |
733 | * and if a device is present, it will respond by | |
734 | * correctly storing and echoing back the | |
735 | * ATA shadow register contents. | |
736 | * | |
737 | * LOCKING: | |
738 | * caller. | |
739 | */ | |
740 | ||
741 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
742 | unsigned int device) | |
743 | { | |
744 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
745 | u8 nsect, lbal; | |
746 | ||
747 | ap->ops->dev_select(ap, device); | |
748 | ||
749 | outb(0x55, ioaddr->nsect_addr); | |
750 | outb(0xaa, ioaddr->lbal_addr); | |
751 | ||
752 | outb(0xaa, ioaddr->nsect_addr); | |
753 | outb(0x55, ioaddr->lbal_addr); | |
754 | ||
755 | outb(0x55, ioaddr->nsect_addr); | |
756 | outb(0xaa, ioaddr->lbal_addr); | |
757 | ||
758 | nsect = inb(ioaddr->nsect_addr); | |
759 | lbal = inb(ioaddr->lbal_addr); | |
760 | ||
761 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
762 | return 1; /* we found a device */ | |
763 | ||
764 | return 0; /* nothing found */ | |
765 | } | |
766 | ||
767 | /** | |
768 | * ata_mmio_devchk - PATA device presence detection | |
769 | * @ap: ATA channel to examine | |
770 | * @device: Device to examine (starting at zero) | |
771 | * | |
772 | * This technique was originally described in | |
773 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
774 | * later found its way into the ATA/ATAPI spec. | |
775 | * | |
776 | * Write a pattern to the ATA shadow registers, | |
777 | * and if a device is present, it will respond by | |
778 | * correctly storing and echoing back the | |
779 | * ATA shadow register contents. | |
780 | * | |
781 | * LOCKING: | |
782 | * caller. | |
783 | */ | |
784 | ||
785 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
786 | unsigned int device) | |
787 | { | |
788 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
789 | u8 nsect, lbal; | |
790 | ||
791 | ap->ops->dev_select(ap, device); | |
792 | ||
793 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
794 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
795 | ||
796 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
797 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
798 | ||
799 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
800 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
801 | ||
802 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
803 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
804 | ||
805 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
806 | return 1; /* we found a device */ | |
807 | ||
808 | return 0; /* nothing found */ | |
809 | } | |
810 | ||
811 | /** | |
812 | * ata_devchk - PATA device presence detection | |
813 | * @ap: ATA channel to examine | |
814 | * @device: Device to examine (starting at zero) | |
815 | * | |
816 | * Dispatch ATA device presence detection, depending | |
817 | * on whether we are using PIO or MMIO to talk to the | |
818 | * ATA shadow registers. | |
819 | * | |
820 | * LOCKING: | |
821 | * caller. | |
822 | */ | |
823 | ||
824 | static unsigned int ata_devchk(struct ata_port *ap, | |
825 | unsigned int device) | |
826 | { | |
827 | if (ap->flags & ATA_FLAG_MMIO) | |
828 | return ata_mmio_devchk(ap, device); | |
829 | return ata_pio_devchk(ap, device); | |
830 | } | |
831 | ||
832 | /** | |
833 | * ata_dev_classify - determine device type based on ATA-spec signature | |
834 | * @tf: ATA taskfile register set for device to be identified | |
835 | * | |
836 | * Determine from taskfile register contents whether a device is | |
837 | * ATA or ATAPI, as per "Signature and persistence" section | |
838 | * of ATA/PI spec (volume 1, sect 5.14). | |
839 | * | |
840 | * LOCKING: | |
841 | * None. | |
842 | * | |
843 | * RETURNS: | |
844 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
845 | * the event of failure. | |
846 | */ | |
847 | ||
848 | unsigned int ata_dev_classify(struct ata_taskfile *tf) | |
849 | { | |
850 | /* Apple's open source Darwin code hints that some devices only | |
851 | * put a proper signature into the LBA mid/high registers, | |
852 | * So, we only check those. It's sufficient for uniqueness. | |
853 | */ | |
854 | ||
855 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
856 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
857 | DPRINTK("found ATA device by sig\n"); | |
858 | return ATA_DEV_ATA; | |
859 | } | |
860 | ||
861 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
862 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
863 | DPRINTK("found ATAPI device by sig\n"); | |
864 | return ATA_DEV_ATAPI; | |
865 | } | |
866 | ||
867 | DPRINTK("unknown device\n"); | |
868 | return ATA_DEV_UNKNOWN; | |
869 | } | |
870 | ||
871 | /** | |
872 | * ata_dev_try_classify - Parse returned ATA device signature | |
873 | * @ap: ATA channel to examine | |
874 | * @device: Device to examine (starting at zero) | |
875 | * | |
876 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
877 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
878 | * shadow registers, indicating the results of device detection | |
879 | * and diagnostics. | |
880 | * | |
881 | * Select the ATA device, and read the values from the ATA shadow | |
882 | * registers. Then parse according to the Error register value, | |
883 | * and the spec-defined values examined by ata_dev_classify(). | |
884 | * | |
885 | * LOCKING: | |
886 | * caller. | |
887 | */ | |
888 | ||
889 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
890 | { | |
891 | struct ata_device *dev = &ap->device[device]; | |
892 | struct ata_taskfile tf; | |
893 | unsigned int class; | |
894 | u8 err; | |
895 | ||
896 | ap->ops->dev_select(ap, device); | |
897 | ||
898 | memset(&tf, 0, sizeof(tf)); | |
899 | ||
900 | err = ata_chk_err(ap); | |
901 | ap->ops->tf_read(ap, &tf); | |
902 | ||
903 | dev->class = ATA_DEV_NONE; | |
904 | ||
905 | /* see if device passed diags */ | |
906 | if (err == 1) | |
907 | /* do nothing */ ; | |
908 | else if ((device == 0) && (err == 0x81)) | |
909 | /* do nothing */ ; | |
910 | else | |
911 | return err; | |
912 | ||
913 | /* determine if device if ATA or ATAPI */ | |
914 | class = ata_dev_classify(&tf); | |
915 | if (class == ATA_DEV_UNKNOWN) | |
916 | return err; | |
917 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
918 | return err; | |
919 | ||
920 | dev->class = class; | |
921 | ||
922 | return err; | |
923 | } | |
924 | ||
925 | /** | |
926 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
927 | * @id: IDENTIFY DEVICE results we will examine | |
928 | * @s: string into which data is output | |
929 | * @ofs: offset into identify device page | |
930 | * @len: length of string to return. must be an even number. | |
931 | * | |
932 | * The strings in the IDENTIFY DEVICE page are broken up into | |
933 | * 16-bit chunks. Run through the string, and output each | |
934 | * 8-bit chunk linearly, regardless of platform. | |
935 | * | |
936 | * LOCKING: | |
937 | * caller. | |
938 | */ | |
939 | ||
940 | void ata_dev_id_string(u16 *id, unsigned char *s, | |
941 | unsigned int ofs, unsigned int len) | |
942 | { | |
943 | unsigned int c; | |
944 | ||
945 | while (len > 0) { | |
946 | c = id[ofs] >> 8; | |
947 | *s = c; | |
948 | s++; | |
949 | ||
950 | c = id[ofs] & 0xff; | |
951 | *s = c; | |
952 | s++; | |
953 | ||
954 | ofs++; | |
955 | len -= 2; | |
956 | } | |
957 | } | |
958 | ||
959 | ||
960 | /** | |
961 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
962 | * @ap: ATA channel to manipulate | |
963 | * @device: ATA device (numbered from zero) to select | |
964 | * | |
965 | * This function performs no actual function. | |
966 | * | |
967 | * May be used as the dev_select() entry in ata_port_operations. | |
968 | * | |
969 | * LOCKING: | |
970 | * caller. | |
971 | */ | |
972 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) | |
973 | { | |
974 | } | |
975 | ||
976 | ||
977 | /** | |
978 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
979 | * @ap: ATA channel to manipulate | |
980 | * @device: ATA device (numbered from zero) to select | |
981 | * | |
982 | * Use the method defined in the ATA specification to | |
983 | * make either device 0, or device 1, active on the | |
984 | * ATA channel. Works with both PIO and MMIO. | |
985 | * | |
986 | * May be used as the dev_select() entry in ata_port_operations. | |
987 | * | |
988 | * LOCKING: | |
989 | * caller. | |
990 | */ | |
991 | ||
992 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
993 | { | |
994 | u8 tmp; | |
995 | ||
996 | if (device == 0) | |
997 | tmp = ATA_DEVICE_OBS; | |
998 | else | |
999 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1000 | ||
1001 | if (ap->flags & ATA_FLAG_MMIO) { | |
1002 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
1003 | } else { | |
1004 | outb(tmp, ap->ioaddr.device_addr); | |
1005 | } | |
1006 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
1007 | } | |
1008 | ||
1009 | /** | |
1010 | * ata_dev_select - Select device 0/1 on ATA bus | |
1011 | * @ap: ATA channel to manipulate | |
1012 | * @device: ATA device (numbered from zero) to select | |
1013 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1014 | * @can_sleep: non-zero if context allows sleeping | |
1015 | * | |
1016 | * Use the method defined in the ATA specification to | |
1017 | * make either device 0, or device 1, active on the | |
1018 | * ATA channel. | |
1019 | * | |
1020 | * This is a high-level version of ata_std_dev_select(), | |
1021 | * which additionally provides the services of inserting | |
1022 | * the proper pauses and status polling, where needed. | |
1023 | * | |
1024 | * LOCKING: | |
1025 | * caller. | |
1026 | */ | |
1027 | ||
1028 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1029 | unsigned int wait, unsigned int can_sleep) | |
1030 | { | |
1031 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
1032 | ap->id, device, wait); | |
1033 | ||
1034 | if (wait) | |
1035 | ata_wait_idle(ap); | |
1036 | ||
1037 | ap->ops->dev_select(ap, device); | |
1038 | ||
1039 | if (wait) { | |
1040 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1041 | msleep(150); | |
1042 | ata_wait_idle(ap); | |
1043 | } | |
1044 | } | |
1045 | ||
1046 | /** | |
1047 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1048 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1049 | * | |
1050 | * Dump selected 16-bit words from a detected device's | |
1051 | * IDENTIFY PAGE page. | |
1052 | * | |
1053 | * LOCKING: | |
1054 | * caller. | |
1055 | */ | |
1056 | ||
1057 | static inline void ata_dump_id(struct ata_device *dev) | |
1058 | { | |
1059 | DPRINTK("49==0x%04x " | |
1060 | "53==0x%04x " | |
1061 | "63==0x%04x " | |
1062 | "64==0x%04x " | |
1063 | "75==0x%04x \n", | |
1064 | dev->id[49], | |
1065 | dev->id[53], | |
1066 | dev->id[63], | |
1067 | dev->id[64], | |
1068 | dev->id[75]); | |
1069 | DPRINTK("80==0x%04x " | |
1070 | "81==0x%04x " | |
1071 | "82==0x%04x " | |
1072 | "83==0x%04x " | |
1073 | "84==0x%04x \n", | |
1074 | dev->id[80], | |
1075 | dev->id[81], | |
1076 | dev->id[82], | |
1077 | dev->id[83], | |
1078 | dev->id[84]); | |
1079 | DPRINTK("88==0x%04x " | |
1080 | "93==0x%04x\n", | |
1081 | dev->id[88], | |
1082 | dev->id[93]); | |
1083 | } | |
1084 | ||
1085 | /* | |
1086 | * Compute the PIO modes available for this device. This is not as | |
1087 | * trivial as it seems if we must consider early devices correctly. | |
1088 | * | |
1089 | * FIXME: pre IDE drive timing (do we care ?). | |
1090 | */ | |
1091 | ||
1092 | static unsigned int ata_pio_modes(struct ata_device *adev) | |
1093 | { | |
1094 | u16 modes; | |
1095 | ||
1096 | /* Usual case. Word 53 indicates word 88 is valid */ | |
1097 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) { | |
1098 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; | |
1099 | modes <<= 3; | |
1100 | modes |= 0x7; | |
1101 | return modes; | |
1102 | } | |
1103 | ||
1104 | /* If word 88 isn't valid then Word 51 holds the PIO timing number | |
1105 | for the maximum. Turn it into a mask and return it */ | |
1106 | modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
1107 | return modes; | |
1108 | } | |
1109 | ||
1110 | /** | |
1111 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1112 | * @ap: port on which device we wish to probe resides | |
1113 | * @device: device bus address, starting at zero | |
1114 | * | |
1115 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1116 | * command, and read back the 512-byte device information page. | |
1117 | * The device information page is fed to us via the standard | |
1118 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1119 | * using standard PIO-IN paths) | |
1120 | * | |
1121 | * After reading the device information page, we use several | |
1122 | * bits of information from it to initialize data structures | |
1123 | * that will be used during the lifetime of the ata_device. | |
1124 | * Other data from the info page is used to disqualify certain | |
1125 | * older ATA devices we do not wish to support. | |
1126 | * | |
1127 | * LOCKING: | |
1128 | * Inherited from caller. Some functions called by this function | |
1129 | * obtain the host_set lock. | |
1130 | */ | |
1131 | ||
1132 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1133 | { | |
1134 | struct ata_device *dev = &ap->device[device]; | |
1135 | unsigned int major_version; | |
1136 | u16 tmp; | |
1137 | unsigned long xfer_modes; | |
1138 | u8 status; | |
1139 | unsigned int using_edd; | |
1140 | DECLARE_COMPLETION(wait); | |
1141 | struct ata_queued_cmd *qc; | |
1142 | unsigned long flags; | |
1143 | int rc; | |
1144 | ||
1145 | if (!ata_dev_present(dev)) { | |
1146 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1147 | ap->id, device); | |
1148 | return; | |
1149 | } | |
1150 | ||
1151 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1152 | using_edd = 0; | |
1153 | else | |
1154 | using_edd = 1; | |
1155 | ||
1156 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1157 | ||
1158 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1159 | dev->class == ATA_DEV_NONE); | |
1160 | ||
1161 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1162 | ||
1163 | qc = ata_qc_new_init(ap, dev); | |
1164 | BUG_ON(qc == NULL); | |
1165 | ||
1166 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1167 | qc->dma_dir = DMA_FROM_DEVICE; | |
1168 | qc->tf.protocol = ATA_PROT_PIO; | |
1169 | qc->nsect = 1; | |
1170 | ||
1171 | retry: | |
1172 | if (dev->class == ATA_DEV_ATA) { | |
1173 | qc->tf.command = ATA_CMD_ID_ATA; | |
1174 | DPRINTK("do ATA identify\n"); | |
1175 | } else { | |
1176 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1177 | DPRINTK("do ATAPI identify\n"); | |
1178 | } | |
1179 | ||
1180 | qc->waiting = &wait; | |
1181 | qc->complete_fn = ata_qc_complete_noop; | |
1182 | ||
1183 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1184 | rc = ata_qc_issue(qc); | |
1185 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1186 | ||
1187 | if (rc) | |
1188 | goto err_out; | |
1189 | else | |
1190 | wait_for_completion(&wait); | |
1191 | ||
1192 | status = ata_chk_status(ap); | |
1193 | if (status & ATA_ERR) { | |
1194 | /* | |
1195 | * arg! EDD works for all test cases, but seems to return | |
1196 | * the ATA signature for some ATAPI devices. Until the | |
1197 | * reason for this is found and fixed, we fix up the mess | |
1198 | * here. If IDENTIFY DEVICE returns command aborted | |
1199 | * (as ATAPI devices do), then we issue an | |
1200 | * IDENTIFY PACKET DEVICE. | |
1201 | * | |
1202 | * ATA software reset (SRST, the default) does not appear | |
1203 | * to have this problem. | |
1204 | */ | |
1205 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
1206 | u8 err = ata_chk_err(ap); | |
1207 | if (err & ATA_ABORTED) { | |
1208 | dev->class = ATA_DEV_ATAPI; | |
1209 | qc->cursg = 0; | |
1210 | qc->cursg_ofs = 0; | |
1211 | qc->cursect = 0; | |
1212 | qc->nsect = 1; | |
1213 | goto retry; | |
1214 | } | |
1215 | } | |
1216 | goto err_out; | |
1217 | } | |
1218 | ||
1219 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1220 | ||
1221 | /* print device capabilities */ | |
1222 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1223 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1224 | ap->id, device, dev->id[49], | |
1225 | dev->id[82], dev->id[83], dev->id[84], | |
1226 | dev->id[85], dev->id[86], dev->id[87], | |
1227 | dev->id[88]); | |
1228 | ||
1229 | /* | |
1230 | * common ATA, ATAPI feature tests | |
1231 | */ | |
1232 | ||
1233 | /* we require DMA support (bits 8 of word 49) */ | |
1234 | if (!ata_id_has_dma(dev->id)) { | |
1235 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1236 | goto err_out_nosup; | |
1237 | } | |
1238 | ||
1239 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1240 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1241 | if (!xfer_modes) | |
1242 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
1243 | if (!xfer_modes) | |
1244 | xfer_modes = ata_pio_modes(dev); | |
1245 | ||
1246 | ata_dump_id(dev); | |
1247 | ||
1248 | /* ATA-specific feature tests */ | |
1249 | if (dev->class == ATA_DEV_ATA) { | |
1250 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1251 | goto err_out_nosup; | |
1252 | ||
1253 | /* get major version */ | |
1254 | tmp = dev->id[ATA_ID_MAJOR_VER]; | |
1255 | for (major_version = 14; major_version >= 1; major_version--) | |
1256 | if (tmp & (1 << major_version)) | |
1257 | break; | |
1258 | ||
1259 | /* | |
1260 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1261 | * SRST RESET | |
1262 | * IDENTIFY | |
1263 | * INITIALIZE DEVICE PARAMETERS | |
1264 | * anything else.. | |
1265 | * Some drives were very specific about that exact sequence. | |
1266 | */ | |
1267 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) { | |
1268 | ata_dev_init_params(ap, dev); | |
1269 | ||
1270 | /* current CHS translation info (id[53-58]) might be | |
1271 | * changed. reread the identify device info. | |
1272 | */ | |
1273 | ata_dev_reread_id(ap, dev); | |
1274 | } | |
1275 | ||
1276 | if (ata_id_has_lba(dev->id)) { | |
1277 | dev->flags |= ATA_DFLAG_LBA; | |
1278 | ||
1279 | if (ata_id_has_lba48(dev->id)) { | |
1280 | dev->flags |= ATA_DFLAG_LBA48; | |
1281 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1282 | } else { | |
1283 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1284 | } | |
1285 | ||
1286 | /* print device info to dmesg */ | |
1287 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1288 | ap->id, device, | |
1289 | major_version, | |
1290 | ata_mode_string(xfer_modes), | |
1291 | (unsigned long long)dev->n_sectors, | |
1292 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1293 | } else { | |
1294 | /* CHS */ | |
1295 | ||
1296 | /* Default translation */ | |
1297 | dev->cylinders = dev->id[1]; | |
1298 | dev->heads = dev->id[3]; | |
1299 | dev->sectors = dev->id[6]; | |
1300 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1301 | ||
1302 | if (ata_id_current_chs_valid(dev->id)) { | |
1303 | /* Current CHS translation is valid. */ | |
1304 | dev->cylinders = dev->id[54]; | |
1305 | dev->heads = dev->id[55]; | |
1306 | dev->sectors = dev->id[56]; | |
1307 | ||
1308 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1309 | } | |
1310 | ||
1311 | /* print device info to dmesg */ | |
1312 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1313 | ap->id, device, | |
1314 | major_version, | |
1315 | ata_mode_string(xfer_modes), | |
1316 | (unsigned long long)dev->n_sectors, | |
1317 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1318 | ||
1319 | } | |
1320 | ||
1321 | ap->host->max_cmd_len = 16; | |
1322 | } | |
1323 | ||
1324 | /* ATAPI-specific feature tests */ | |
1325 | else { | |
1326 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1327 | goto err_out_nosup; | |
1328 | ||
1329 | rc = atapi_cdb_len(dev->id); | |
1330 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1331 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1332 | goto err_out_nosup; | |
1333 | } | |
1334 | ap->cdb_len = (unsigned int) rc; | |
1335 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1336 | ||
1337 | /* print device info to dmesg */ | |
1338 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1339 | ap->id, device, | |
1340 | ata_mode_string(xfer_modes)); | |
1341 | } | |
1342 | ||
1343 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1344 | return; | |
1345 | ||
1346 | err_out_nosup: | |
1347 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1348 | ap->id, device); | |
1349 | err_out: | |
1350 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1351 | DPRINTK("EXIT, err\n"); | |
1352 | } | |
1353 | ||
1354 | ||
1355 | static inline u8 ata_dev_knobble(struct ata_port *ap) | |
1356 | { | |
1357 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1358 | } | |
1359 | ||
1360 | /** | |
1361 | * ata_dev_config - Run device specific handlers and check for | |
1362 | * SATA->PATA bridges | |
1363 | * @ap: Bus | |
1364 | * @i: Device | |
1365 | * | |
1366 | * LOCKING: | |
1367 | */ | |
1368 | ||
1369 | void ata_dev_config(struct ata_port *ap, unsigned int i) | |
1370 | { | |
1371 | /* limit bridge transfers to udma5, 200 sectors */ | |
1372 | if (ata_dev_knobble(ap)) { | |
1373 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1374 | ap->id, ap->device->devno); | |
1375 | ap->udma_mask &= ATA_UDMA5; | |
1376 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1377 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1378 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1379 | } | |
1380 | ||
1381 | if (ap->ops->dev_config) | |
1382 | ap->ops->dev_config(ap, &ap->device[i]); | |
1383 | } | |
1384 | ||
1385 | /** | |
1386 | * ata_bus_probe - Reset and probe ATA bus | |
1387 | * @ap: Bus to probe | |
1388 | * | |
1389 | * Master ATA bus probing function. Initiates a hardware-dependent | |
1390 | * bus reset, then attempts to identify any devices found on | |
1391 | * the bus. | |
1392 | * | |
1393 | * LOCKING: | |
1394 | * PCI/etc. bus probe sem. | |
1395 | * | |
1396 | * RETURNS: | |
1397 | * Zero on success, non-zero on error. | |
1398 | */ | |
1399 | ||
1400 | static int ata_bus_probe(struct ata_port *ap) | |
1401 | { | |
1402 | unsigned int i, found = 0; | |
1403 | ||
1404 | ap->ops->phy_reset(ap); | |
1405 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1406 | goto err_out; | |
1407 | ||
1408 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1409 | ata_dev_identify(ap, i); | |
1410 | if (ata_dev_present(&ap->device[i])) { | |
1411 | found = 1; | |
1412 | ata_dev_config(ap,i); | |
1413 | } | |
1414 | } | |
1415 | ||
1416 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1417 | goto err_out_disable; | |
1418 | ||
1419 | ata_set_mode(ap); | |
1420 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1421 | goto err_out_disable; | |
1422 | ||
1423 | return 0; | |
1424 | ||
1425 | err_out_disable: | |
1426 | ap->ops->port_disable(ap); | |
1427 | err_out: | |
1428 | return -1; | |
1429 | } | |
1430 | ||
1431 | /** | |
1432 | * ata_port_probe - Mark port as enabled | |
1433 | * @ap: Port for which we indicate enablement | |
1434 | * | |
1435 | * Modify @ap data structure such that the system | |
1436 | * thinks that the entire port is enabled. | |
1437 | * | |
1438 | * LOCKING: host_set lock, or some other form of | |
1439 | * serialization. | |
1440 | */ | |
1441 | ||
1442 | void ata_port_probe(struct ata_port *ap) | |
1443 | { | |
1444 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1445 | } | |
1446 | ||
1447 | /** | |
1448 | * __sata_phy_reset - Wake/reset a low-level SATA PHY | |
1449 | * @ap: SATA port associated with target SATA PHY. | |
1450 | * | |
1451 | * This function issues commands to standard SATA Sxxx | |
1452 | * PHY registers, to wake up the phy (and device), and | |
1453 | * clear any reset condition. | |
1454 | * | |
1455 | * LOCKING: | |
1456 | * PCI/etc. bus probe sem. | |
1457 | * | |
1458 | */ | |
1459 | void __sata_phy_reset(struct ata_port *ap) | |
1460 | { | |
1461 | u32 sstatus; | |
1462 | unsigned long timeout = jiffies + (HZ * 5); | |
1463 | ||
1464 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
1465 | /* issue phy wake/reset */ | |
1466 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
1467 | /* Couldn't find anything in SATA I/II specs, but | |
1468 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1469 | mdelay(1); | |
1470 | } | |
1471 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ | |
1472 | ||
1473 | /* wait for phy to become ready, if necessary */ | |
1474 | do { | |
1475 | msleep(200); | |
1476 | sstatus = scr_read(ap, SCR_STATUS); | |
1477 | if ((sstatus & 0xf) != 1) | |
1478 | break; | |
1479 | } while (time_before(jiffies, timeout)); | |
1480 | ||
1481 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1482 | if (sata_dev_present(ap)) | |
1483 | ata_port_probe(ap); | |
1484 | else { | |
1485 | sstatus = scr_read(ap, SCR_STATUS); | |
1486 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1487 | ap->id, sstatus); | |
1488 | ata_port_disable(ap); | |
1489 | } | |
1490 | ||
1491 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1492 | return; | |
1493 | ||
1494 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1495 | ata_port_disable(ap); | |
1496 | return; | |
1497 | } | |
1498 | ||
1499 | ap->cbl = ATA_CBL_SATA; | |
1500 | } | |
1501 | ||
1502 | /** | |
1503 | * sata_phy_reset - Reset SATA bus. | |
1504 | * @ap: SATA port associated with target SATA PHY. | |
1505 | * | |
1506 | * This function resets the SATA bus, and then probes | |
1507 | * the bus for devices. | |
1508 | * | |
1509 | * LOCKING: | |
1510 | * PCI/etc. bus probe sem. | |
1511 | * | |
1512 | */ | |
1513 | void sata_phy_reset(struct ata_port *ap) | |
1514 | { | |
1515 | __sata_phy_reset(ap); | |
1516 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1517 | return; | |
1518 | ata_bus_reset(ap); | |
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * ata_port_disable - Disable port. | |
1523 | * @ap: Port to be disabled. | |
1524 | * | |
1525 | * Modify @ap data structure such that the system | |
1526 | * thinks that the entire port is disabled, and should | |
1527 | * never attempt to probe or communicate with devices | |
1528 | * on this port. | |
1529 | * | |
1530 | * LOCKING: host_set lock, or some other form of | |
1531 | * serialization. | |
1532 | */ | |
1533 | ||
1534 | void ata_port_disable(struct ata_port *ap) | |
1535 | { | |
1536 | ap->device[0].class = ATA_DEV_NONE; | |
1537 | ap->device[1].class = ATA_DEV_NONE; | |
1538 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1539 | } | |
1540 | ||
1541 | static struct { | |
1542 | unsigned int shift; | |
1543 | u8 base; | |
1544 | } xfer_mode_classes[] = { | |
1545 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1546 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1547 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1548 | }; | |
1549 | ||
1550 | static inline u8 base_from_shift(unsigned int shift) | |
1551 | { | |
1552 | int i; | |
1553 | ||
1554 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1555 | if (xfer_mode_classes[i].shift == shift) | |
1556 | return xfer_mode_classes[i].base; | |
1557 | ||
1558 | return 0xff; | |
1559 | } | |
1560 | ||
1561 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1562 | { | |
1563 | int ofs, idx; | |
1564 | u8 base; | |
1565 | ||
1566 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1567 | return; | |
1568 | ||
1569 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1570 | dev->flags |= ATA_DFLAG_PIO; | |
1571 | ||
1572 | ata_dev_set_xfermode(ap, dev); | |
1573 | ||
1574 | base = base_from_shift(dev->xfer_shift); | |
1575 | ofs = dev->xfer_mode - base; | |
1576 | idx = ofs + dev->xfer_shift; | |
1577 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1578 | ||
1579 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1580 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1581 | ||
1582 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1583 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1584 | } | |
1585 | ||
1586 | static int ata_host_set_pio(struct ata_port *ap) | |
1587 | { | |
1588 | unsigned int mask; | |
1589 | int x, i; | |
1590 | u8 base, xfer_mode; | |
1591 | ||
1592 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1593 | x = fgb(mask); | |
1594 | if (x < 0) { | |
1595 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1596 | return -1; | |
1597 | } | |
1598 | ||
1599 | base = base_from_shift(ATA_SHIFT_PIO); | |
1600 | xfer_mode = base + x; | |
1601 | ||
1602 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1603 | (int)base, (int)xfer_mode, mask, x); | |
1604 | ||
1605 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1606 | struct ata_device *dev = &ap->device[i]; | |
1607 | if (ata_dev_present(dev)) { | |
1608 | dev->pio_mode = xfer_mode; | |
1609 | dev->xfer_mode = xfer_mode; | |
1610 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1611 | if (ap->ops->set_piomode) | |
1612 | ap->ops->set_piomode(ap, dev); | |
1613 | } | |
1614 | } | |
1615 | ||
1616 | return 0; | |
1617 | } | |
1618 | ||
1619 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1620 | unsigned int xfer_shift) | |
1621 | { | |
1622 | int i; | |
1623 | ||
1624 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1625 | struct ata_device *dev = &ap->device[i]; | |
1626 | if (ata_dev_present(dev)) { | |
1627 | dev->dma_mode = xfer_mode; | |
1628 | dev->xfer_mode = xfer_mode; | |
1629 | dev->xfer_shift = xfer_shift; | |
1630 | if (ap->ops->set_dmamode) | |
1631 | ap->ops->set_dmamode(ap, dev); | |
1632 | } | |
1633 | } | |
1634 | } | |
1635 | ||
1636 | /** | |
1637 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1638 | * @ap: port on which timings will be programmed | |
1639 | * | |
1640 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). | |
1641 | * | |
1642 | * LOCKING: | |
1643 | * PCI/etc. bus probe sem. | |
1644 | * | |
1645 | */ | |
1646 | static void ata_set_mode(struct ata_port *ap) | |
1647 | { | |
1648 | unsigned int xfer_shift; | |
1649 | u8 xfer_mode; | |
1650 | int rc; | |
1651 | ||
1652 | /* step 1: always set host PIO timings */ | |
1653 | rc = ata_host_set_pio(ap); | |
1654 | if (rc) | |
1655 | goto err_out; | |
1656 | ||
1657 | /* step 2: choose the best data xfer mode */ | |
1658 | xfer_mode = xfer_shift = 0; | |
1659 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1660 | if (rc) | |
1661 | goto err_out; | |
1662 | ||
1663 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1664 | if (xfer_shift != ATA_SHIFT_PIO) | |
1665 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1666 | ||
1667 | /* step 4: update devices' xfer mode */ | |
1668 | ata_dev_set_mode(ap, &ap->device[0]); | |
1669 | ata_dev_set_mode(ap, &ap->device[1]); | |
1670 | ||
1671 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1672 | return; | |
1673 | ||
1674 | if (ap->ops->post_set_mode) | |
1675 | ap->ops->post_set_mode(ap); | |
1676 | ||
1677 | return; | |
1678 | ||
1679 | err_out: | |
1680 | ata_port_disable(ap); | |
1681 | } | |
1682 | ||
1683 | /** | |
1684 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1685 | * @ap: port containing status register to be polled | |
1686 | * @tmout_pat: impatience timeout | |
1687 | * @tmout: overall timeout | |
1688 | * | |
1689 | * Sleep until ATA Status register bit BSY clears, | |
1690 | * or a timeout occurs. | |
1691 | * | |
1692 | * LOCKING: None. | |
1693 | * | |
1694 | */ | |
1695 | ||
1696 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1697 | unsigned long tmout_pat, | |
1698 | unsigned long tmout) | |
1699 | { | |
1700 | unsigned long timer_start, timeout; | |
1701 | u8 status; | |
1702 | ||
1703 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1704 | timer_start = jiffies; | |
1705 | timeout = timer_start + tmout_pat; | |
1706 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1707 | msleep(50); | |
1708 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1709 | } | |
1710 | ||
1711 | if (status & ATA_BUSY) | |
1712 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1713 | "please be patient\n", ap->id); | |
1714 | ||
1715 | timeout = timer_start + tmout; | |
1716 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1717 | msleep(50); | |
1718 | status = ata_chk_status(ap); | |
1719 | } | |
1720 | ||
1721 | if (status & ATA_BUSY) { | |
1722 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1723 | ap->id, tmout / HZ); | |
1724 | return 1; | |
1725 | } | |
1726 | ||
1727 | return 0; | |
1728 | } | |
1729 | ||
1730 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1731 | { | |
1732 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1733 | unsigned int dev0 = devmask & (1 << 0); | |
1734 | unsigned int dev1 = devmask & (1 << 1); | |
1735 | unsigned long timeout; | |
1736 | ||
1737 | /* if device 0 was found in ata_devchk, wait for its | |
1738 | * BSY bit to clear | |
1739 | */ | |
1740 | if (dev0) | |
1741 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1742 | ||
1743 | /* if device 1 was found in ata_devchk, wait for | |
1744 | * register access, then wait for BSY to clear | |
1745 | */ | |
1746 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1747 | while (dev1) { | |
1748 | u8 nsect, lbal; | |
1749 | ||
1750 | ap->ops->dev_select(ap, 1); | |
1751 | if (ap->flags & ATA_FLAG_MMIO) { | |
1752 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1753 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1754 | } else { | |
1755 | nsect = inb(ioaddr->nsect_addr); | |
1756 | lbal = inb(ioaddr->lbal_addr); | |
1757 | } | |
1758 | if ((nsect == 1) && (lbal == 1)) | |
1759 | break; | |
1760 | if (time_after(jiffies, timeout)) { | |
1761 | dev1 = 0; | |
1762 | break; | |
1763 | } | |
1764 | msleep(50); /* give drive a breather */ | |
1765 | } | |
1766 | if (dev1) | |
1767 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1768 | ||
1769 | /* is all this really necessary? */ | |
1770 | ap->ops->dev_select(ap, 0); | |
1771 | if (dev1) | |
1772 | ap->ops->dev_select(ap, 1); | |
1773 | if (dev0) | |
1774 | ap->ops->dev_select(ap, 0); | |
1775 | } | |
1776 | ||
1777 | /** | |
1778 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. | |
1779 | * @ap: Port to reset and probe | |
1780 | * | |
1781 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1782 | * probe the bus. Not often used these days. | |
1783 | * | |
1784 | * LOCKING: | |
1785 | * PCI/etc. bus probe sem. | |
1786 | * | |
1787 | */ | |
1788 | ||
1789 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1790 | { | |
1791 | struct ata_taskfile tf; | |
1792 | ||
1793 | /* set up execute-device-diag (bus reset) taskfile */ | |
1794 | /* also, take interrupts to a known state (disabled) */ | |
1795 | DPRINTK("execute-device-diag\n"); | |
1796 | ata_tf_init(ap, &tf, 0); | |
1797 | tf.ctl |= ATA_NIEN; | |
1798 | tf.command = ATA_CMD_EDD; | |
1799 | tf.protocol = ATA_PROT_NODATA; | |
1800 | ||
1801 | /* do bus reset */ | |
1802 | ata_tf_to_host(ap, &tf); | |
1803 | ||
1804 | /* spec says at least 2ms. but who knows with those | |
1805 | * crazy ATAPI devices... | |
1806 | */ | |
1807 | msleep(150); | |
1808 | ||
1809 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1810 | } | |
1811 | ||
1812 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1813 | unsigned int devmask) | |
1814 | { | |
1815 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1816 | ||
1817 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1818 | ||
1819 | /* software reset. causes dev0 to be selected */ | |
1820 | if (ap->flags & ATA_FLAG_MMIO) { | |
1821 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1822 | udelay(20); /* FIXME: flush */ | |
1823 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1824 | udelay(20); /* FIXME: flush */ | |
1825 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1826 | } else { | |
1827 | outb(ap->ctl, ioaddr->ctl_addr); | |
1828 | udelay(10); | |
1829 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1830 | udelay(10); | |
1831 | outb(ap->ctl, ioaddr->ctl_addr); | |
1832 | } | |
1833 | ||
1834 | /* spec mandates ">= 2ms" before checking status. | |
1835 | * We wait 150ms, because that was the magic delay used for | |
1836 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1837 | * between when the ATA command register is written, and then | |
1838 | * status is checked. Because waiting for "a while" before | |
1839 | * checking status is fine, post SRST, we perform this magic | |
1840 | * delay here as well. | |
1841 | */ | |
1842 | msleep(150); | |
1843 | ||
1844 | ata_bus_post_reset(ap, devmask); | |
1845 | ||
1846 | return 0; | |
1847 | } | |
1848 | ||
1849 | /** | |
1850 | * ata_bus_reset - reset host port and associated ATA channel | |
1851 | * @ap: port to reset | |
1852 | * | |
1853 | * This is typically the first time we actually start issuing | |
1854 | * commands to the ATA channel. We wait for BSY to clear, then | |
1855 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
1856 | * result. Determine what devices, if any, are on the channel | |
1857 | * by looking at the device 0/1 error register. Look at the signature | |
1858 | * stored in each device's taskfile registers, to determine if | |
1859 | * the device is ATA or ATAPI. | |
1860 | * | |
1861 | * LOCKING: | |
1862 | * PCI/etc. bus probe sem. | |
1863 | * Obtains host_set lock. | |
1864 | * | |
1865 | * SIDE EFFECTS: | |
1866 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
1867 | */ | |
1868 | ||
1869 | void ata_bus_reset(struct ata_port *ap) | |
1870 | { | |
1871 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1872 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
1873 | u8 err; | |
1874 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
1875 | ||
1876 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
1877 | ||
1878 | /* determine if device 0/1 are present */ | |
1879 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
1880 | dev0 = 1; | |
1881 | else { | |
1882 | dev0 = ata_devchk(ap, 0); | |
1883 | if (slave_possible) | |
1884 | dev1 = ata_devchk(ap, 1); | |
1885 | } | |
1886 | ||
1887 | if (dev0) | |
1888 | devmask |= (1 << 0); | |
1889 | if (dev1) | |
1890 | devmask |= (1 << 1); | |
1891 | ||
1892 | /* select device 0 again */ | |
1893 | ap->ops->dev_select(ap, 0); | |
1894 | ||
1895 | /* issue bus reset */ | |
1896 | if (ap->flags & ATA_FLAG_SRST) | |
1897 | rc = ata_bus_softreset(ap, devmask); | |
1898 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
1899 | /* set up device control */ | |
1900 | if (ap->flags & ATA_FLAG_MMIO) | |
1901 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1902 | else | |
1903 | outb(ap->ctl, ioaddr->ctl_addr); | |
1904 | rc = ata_bus_edd(ap); | |
1905 | } | |
1906 | ||
1907 | if (rc) | |
1908 | goto err_out; | |
1909 | ||
1910 | /* | |
1911 | * determine by signature whether we have ATA or ATAPI devices | |
1912 | */ | |
1913 | err = ata_dev_try_classify(ap, 0); | |
1914 | if ((slave_possible) && (err != 0x81)) | |
1915 | ata_dev_try_classify(ap, 1); | |
1916 | ||
1917 | /* re-enable interrupts */ | |
1918 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
1919 | ata_irq_on(ap); | |
1920 | ||
1921 | /* is double-select really necessary? */ | |
1922 | if (ap->device[1].class != ATA_DEV_NONE) | |
1923 | ap->ops->dev_select(ap, 1); | |
1924 | if (ap->device[0].class != ATA_DEV_NONE) | |
1925 | ap->ops->dev_select(ap, 0); | |
1926 | ||
1927 | /* if no devices were detected, disable this port */ | |
1928 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
1929 | (ap->device[1].class == ATA_DEV_NONE)) | |
1930 | goto err_out; | |
1931 | ||
1932 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
1933 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
1934 | if (ap->flags & ATA_FLAG_MMIO) | |
1935 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1936 | else | |
1937 | outb(ap->ctl, ioaddr->ctl_addr); | |
1938 | } | |
1939 | ||
1940 | DPRINTK("EXIT\n"); | |
1941 | return; | |
1942 | ||
1943 | err_out: | |
1944 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
1945 | ap->ops->port_disable(ap); | |
1946 | ||
1947 | DPRINTK("EXIT\n"); | |
1948 | } | |
1949 | ||
1950 | static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1951 | { | |
1952 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
1953 | ap->id, dev->devno); | |
1954 | } | |
1955 | ||
1956 | static const char * ata_dma_blacklist [] = { | |
1957 | "WDC AC11000H", | |
1958 | "WDC AC22100H", | |
1959 | "WDC AC32500H", | |
1960 | "WDC AC33100H", | |
1961 | "WDC AC31600H", | |
1962 | "WDC AC32100H", | |
1963 | "WDC AC23200L", | |
1964 | "Compaq CRD-8241B", | |
1965 | "CRD-8400B", | |
1966 | "CRD-8480B", | |
1967 | "CRD-8482B", | |
1968 | "CRD-84", | |
1969 | "SanDisk SDP3B", | |
1970 | "SanDisk SDP3B-64", | |
1971 | "SANYO CD-ROM CRD", | |
1972 | "HITACHI CDR-8", | |
1973 | "HITACHI CDR-8335", | |
1974 | "HITACHI CDR-8435", | |
1975 | "Toshiba CD-ROM XM-6202B", | |
1976 | "TOSHIBA CD-ROM XM-1702BC", | |
1977 | "CD-532E-A", | |
1978 | "E-IDE CD-ROM CR-840", | |
1979 | "CD-ROM Drive/F5A", | |
1980 | "WPI CDD-820", | |
1981 | "SAMSUNG CD-ROM SC-148C", | |
1982 | "SAMSUNG CD-ROM SC", | |
1983 | "SanDisk SDP3B-64", | |
1984 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", | |
1985 | "_NEC DV5800A", | |
1986 | }; | |
1987 | ||
1988 | static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1989 | { | |
1990 | unsigned char model_num[40]; | |
1991 | char *s; | |
1992 | unsigned int len; | |
1993 | int i; | |
1994 | ||
1995 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
1996 | sizeof(model_num)); | |
1997 | s = &model_num[0]; | |
1998 | len = strnlen(s, sizeof(model_num)); | |
1999 | ||
2000 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2001 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2002 | len--; | |
2003 | s[len] = 0; | |
2004 | } | |
2005 | ||
2006 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2007 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2008 | return 1; | |
2009 | ||
2010 | return 0; | |
2011 | } | |
2012 | ||
2013 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) | |
2014 | { | |
2015 | struct ata_device *master, *slave; | |
2016 | unsigned int mask; | |
2017 | ||
2018 | master = &ap->device[0]; | |
2019 | slave = &ap->device[1]; | |
2020 | ||
2021 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2022 | ||
2023 | if (shift == ATA_SHIFT_UDMA) { | |
2024 | mask = ap->udma_mask; | |
2025 | if (ata_dev_present(master)) { | |
2026 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
2027 | if (ata_dma_blacklisted(ap, master)) { | |
2028 | mask = 0; | |
2029 | ata_pr_blacklisted(ap, master); | |
2030 | } | |
2031 | } | |
2032 | if (ata_dev_present(slave)) { | |
2033 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
2034 | if (ata_dma_blacklisted(ap, slave)) { | |
2035 | mask = 0; | |
2036 | ata_pr_blacklisted(ap, slave); | |
2037 | } | |
2038 | } | |
2039 | } | |
2040 | else if (shift == ATA_SHIFT_MWDMA) { | |
2041 | mask = ap->mwdma_mask; | |
2042 | if (ata_dev_present(master)) { | |
2043 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2044 | if (ata_dma_blacklisted(ap, master)) { | |
2045 | mask = 0; | |
2046 | ata_pr_blacklisted(ap, master); | |
2047 | } | |
2048 | } | |
2049 | if (ata_dev_present(slave)) { | |
2050 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
2051 | if (ata_dma_blacklisted(ap, slave)) { | |
2052 | mask = 0; | |
2053 | ata_pr_blacklisted(ap, slave); | |
2054 | } | |
2055 | } | |
2056 | } | |
2057 | else if (shift == ATA_SHIFT_PIO) { | |
2058 | mask = ap->pio_mask; | |
2059 | if (ata_dev_present(master)) { | |
2060 | /* spec doesn't return explicit support for | |
2061 | * PIO0-2, so we fake it | |
2062 | */ | |
2063 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2064 | tmp_mode <<= 3; | |
2065 | tmp_mode |= 0x7; | |
2066 | mask &= tmp_mode; | |
2067 | } | |
2068 | if (ata_dev_present(slave)) { | |
2069 | /* spec doesn't return explicit support for | |
2070 | * PIO0-2, so we fake it | |
2071 | */ | |
2072 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2073 | tmp_mode <<= 3; | |
2074 | tmp_mode |= 0x7; | |
2075 | mask &= tmp_mode; | |
2076 | } | |
2077 | } | |
2078 | else { | |
2079 | mask = 0xffffffff; /* shut up compiler warning */ | |
2080 | BUG(); | |
2081 | } | |
2082 | ||
2083 | return mask; | |
2084 | } | |
2085 | ||
2086 | /* find greatest bit */ | |
2087 | static int fgb(u32 bitmap) | |
2088 | { | |
2089 | unsigned int i; | |
2090 | int x = -1; | |
2091 | ||
2092 | for (i = 0; i < 32; i++) | |
2093 | if (bitmap & (1 << i)) | |
2094 | x = i; | |
2095 | ||
2096 | return x; | |
2097 | } | |
2098 | ||
2099 | /** | |
2100 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2101 | * @ap: Port for which an xfer mode will be selected | |
2102 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2103 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2104 | * | |
2105 | * Based on host and device capabilities, determine the | |
2106 | * maximum transfer mode that is amenable to all. | |
2107 | * | |
2108 | * LOCKING: | |
2109 | * PCI/etc. bus probe sem. | |
2110 | * | |
2111 | * RETURNS: | |
2112 | * Zero on success, negative on error. | |
2113 | */ | |
2114 | ||
2115 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
2116 | u8 *xfer_mode_out, | |
2117 | unsigned int *xfer_shift_out) | |
2118 | { | |
2119 | unsigned int mask, shift; | |
2120 | int x, i; | |
2121 | ||
2122 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2123 | shift = xfer_mode_classes[i].shift; | |
2124 | mask = ata_get_mode_mask(ap, shift); | |
2125 | ||
2126 | x = fgb(mask); | |
2127 | if (x >= 0) { | |
2128 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2129 | *xfer_shift_out = shift; | |
2130 | return 0; | |
2131 | } | |
2132 | } | |
2133 | ||
2134 | return -1; | |
2135 | } | |
2136 | ||
2137 | /** | |
2138 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2139 | * @ap: Port associated with device @dev | |
2140 | * @dev: Device to which command will be sent | |
2141 | * | |
2142 | * Issue SET FEATURES - XFER MODE command to device @dev | |
2143 | * on port @ap. | |
2144 | * | |
2145 | * LOCKING: | |
2146 | * PCI/etc. bus probe sem. | |
2147 | */ | |
2148 | ||
2149 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2150 | { | |
2151 | DECLARE_COMPLETION(wait); | |
2152 | struct ata_queued_cmd *qc; | |
2153 | int rc; | |
2154 | unsigned long flags; | |
2155 | ||
2156 | /* set up set-features taskfile */ | |
2157 | DPRINTK("set features - xfer mode\n"); | |
2158 | ||
2159 | qc = ata_qc_new_init(ap, dev); | |
2160 | BUG_ON(qc == NULL); | |
2161 | ||
2162 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2163 | qc->tf.feature = SETFEATURES_XFER; | |
2164 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2165 | qc->tf.protocol = ATA_PROT_NODATA; | |
2166 | qc->tf.nsect = dev->xfer_mode; | |
2167 | ||
2168 | qc->waiting = &wait; | |
2169 | qc->complete_fn = ata_qc_complete_noop; | |
2170 | ||
2171 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2172 | rc = ata_qc_issue(qc); | |
2173 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2174 | ||
2175 | if (rc) | |
2176 | ata_port_disable(ap); | |
2177 | else | |
2178 | wait_for_completion(&wait); | |
2179 | ||
2180 | DPRINTK("EXIT\n"); | |
2181 | } | |
2182 | ||
2183 | /** | |
2184 | * ata_dev_reread_id - Reread the device identify device info | |
2185 | * @ap: port where the device is | |
2186 | * @dev: device to reread the identify device info | |
2187 | * | |
2188 | * LOCKING: | |
2189 | */ | |
2190 | ||
2191 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) | |
2192 | { | |
2193 | DECLARE_COMPLETION(wait); | |
2194 | struct ata_queued_cmd *qc; | |
2195 | unsigned long flags; | |
2196 | int rc; | |
2197 | ||
2198 | qc = ata_qc_new_init(ap, dev); | |
2199 | BUG_ON(qc == NULL); | |
2200 | ||
2201 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
2202 | qc->dma_dir = DMA_FROM_DEVICE; | |
2203 | ||
2204 | if (dev->class == ATA_DEV_ATA) { | |
2205 | qc->tf.command = ATA_CMD_ID_ATA; | |
2206 | DPRINTK("do ATA identify\n"); | |
2207 | } else { | |
2208 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
2209 | DPRINTK("do ATAPI identify\n"); | |
2210 | } | |
2211 | ||
2212 | qc->tf.flags |= ATA_TFLAG_DEVICE; | |
2213 | qc->tf.protocol = ATA_PROT_PIO; | |
2214 | qc->nsect = 1; | |
2215 | ||
2216 | qc->waiting = &wait; | |
2217 | qc->complete_fn = ata_qc_complete_noop; | |
2218 | ||
2219 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2220 | rc = ata_qc_issue(qc); | |
2221 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2222 | ||
2223 | if (rc) | |
2224 | goto err_out; | |
2225 | ||
2226 | wait_for_completion(&wait); | |
2227 | ||
2228 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
2229 | ||
2230 | ata_dump_id(dev); | |
2231 | ||
2232 | DPRINTK("EXIT\n"); | |
2233 | ||
2234 | return; | |
2235 | err_out: | |
2236 | ata_port_disable(ap); | |
2237 | } | |
2238 | ||
2239 | /** | |
2240 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2241 | * @ap: Port associated with device @dev | |
2242 | * @dev: Device to which command will be sent | |
2243 | * | |
2244 | * LOCKING: | |
2245 | */ | |
2246 | ||
2247 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2248 | { | |
2249 | DECLARE_COMPLETION(wait); | |
2250 | struct ata_queued_cmd *qc; | |
2251 | int rc; | |
2252 | unsigned long flags; | |
2253 | u16 sectors = dev->id[6]; | |
2254 | u16 heads = dev->id[3]; | |
2255 | ||
2256 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2257 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2258 | return; | |
2259 | ||
2260 | /* set up init dev params taskfile */ | |
2261 | DPRINTK("init dev params \n"); | |
2262 | ||
2263 | qc = ata_qc_new_init(ap, dev); | |
2264 | BUG_ON(qc == NULL); | |
2265 | ||
2266 | qc->tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2267 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2268 | qc->tf.protocol = ATA_PROT_NODATA; | |
2269 | qc->tf.nsect = sectors; | |
2270 | qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
2271 | ||
2272 | qc->waiting = &wait; | |
2273 | qc->complete_fn = ata_qc_complete_noop; | |
2274 | ||
2275 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2276 | rc = ata_qc_issue(qc); | |
2277 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2278 | ||
2279 | if (rc) | |
2280 | ata_port_disable(ap); | |
2281 | else | |
2282 | wait_for_completion(&wait); | |
2283 | ||
2284 | DPRINTK("EXIT\n"); | |
2285 | } | |
2286 | ||
2287 | /** | |
2288 | * ata_sg_clean - Unmap DMA memory associated with command | |
2289 | * @qc: Command containing DMA memory to be released | |
2290 | * | |
2291 | * Unmap all mapped DMA memory associated with this command. | |
2292 | * | |
2293 | * LOCKING: | |
2294 | * spin_lock_irqsave(host_set lock) | |
2295 | */ | |
2296 | ||
2297 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2298 | { | |
2299 | struct ata_port *ap = qc->ap; | |
2300 | struct scatterlist *sg = qc->sg; | |
2301 | int dir = qc->dma_dir; | |
2302 | ||
2303 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2304 | assert(sg != NULL); | |
2305 | ||
2306 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2307 | assert(qc->n_elem == 1); | |
2308 | ||
2309 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2310 | ||
2311 | if (qc->flags & ATA_QCFLAG_SG) | |
2312 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2313 | else | |
2314 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), | |
2315 | sg_dma_len(&sg[0]), dir); | |
2316 | ||
2317 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
2318 | qc->sg = NULL; | |
2319 | } | |
2320 | ||
2321 | /** | |
2322 | * ata_fill_sg - Fill PCI IDE PRD table | |
2323 | * @qc: Metadata associated with taskfile to be transferred | |
2324 | * | |
2325 | * Fill PCI IDE PRD (scatter-gather) table with segments | |
2326 | * associated with the current disk command. | |
2327 | * | |
2328 | * LOCKING: | |
2329 | * spin_lock_irqsave(host_set lock) | |
2330 | * | |
2331 | */ | |
2332 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2333 | { | |
2334 | struct scatterlist *sg = qc->sg; | |
2335 | struct ata_port *ap = qc->ap; | |
2336 | unsigned int idx, nelem; | |
2337 | ||
2338 | assert(sg != NULL); | |
2339 | assert(qc->n_elem > 0); | |
2340 | ||
2341 | idx = 0; | |
2342 | for (nelem = qc->n_elem; nelem; nelem--,sg++) { | |
2343 | u32 addr, offset; | |
2344 | u32 sg_len, len; | |
2345 | ||
2346 | /* determine if physical DMA addr spans 64K boundary. | |
2347 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2348 | * truncate dma_addr_t to u32. | |
2349 | */ | |
2350 | addr = (u32) sg_dma_address(sg); | |
2351 | sg_len = sg_dma_len(sg); | |
2352 | ||
2353 | while (sg_len) { | |
2354 | offset = addr & 0xffff; | |
2355 | len = sg_len; | |
2356 | if ((offset + sg_len) > 0x10000) | |
2357 | len = 0x10000 - offset; | |
2358 | ||
2359 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2360 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2361 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2362 | ||
2363 | idx++; | |
2364 | sg_len -= len; | |
2365 | addr += len; | |
2366 | } | |
2367 | } | |
2368 | ||
2369 | if (idx) | |
2370 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2371 | } | |
2372 | /** | |
2373 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2374 | * @qc: Metadata associated with taskfile to check | |
2375 | * | |
2376 | * Allow low-level driver to filter ATA PACKET commands, returning | |
2377 | * a status indicating whether or not it is OK to use DMA for the | |
2378 | * supplied PACKET command. | |
2379 | * | |
2380 | * LOCKING: | |
2381 | * spin_lock_irqsave(host_set lock) | |
2382 | * | |
2383 | * RETURNS: 0 when ATAPI DMA can be used | |
2384 | * nonzero otherwise | |
2385 | */ | |
2386 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2387 | { | |
2388 | struct ata_port *ap = qc->ap; | |
2389 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2390 | ||
2391 | if (ap->ops->check_atapi_dma) | |
2392 | rc = ap->ops->check_atapi_dma(qc); | |
2393 | ||
2394 | return rc; | |
2395 | } | |
2396 | /** | |
2397 | * ata_qc_prep - Prepare taskfile for submission | |
2398 | * @qc: Metadata associated with taskfile to be prepared | |
2399 | * | |
2400 | * Prepare ATA taskfile for submission. | |
2401 | * | |
2402 | * LOCKING: | |
2403 | * spin_lock_irqsave(host_set lock) | |
2404 | */ | |
2405 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2406 | { | |
2407 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2408 | return; | |
2409 | ||
2410 | ata_fill_sg(qc); | |
2411 | } | |
2412 | ||
2413 | /** | |
2414 | * ata_sg_init_one - Associate command with memory buffer | |
2415 | * @qc: Command to be associated | |
2416 | * @buf: Memory buffer | |
2417 | * @buflen: Length of memory buffer, in bytes. | |
2418 | * | |
2419 | * Initialize the data-related elements of queued_cmd @qc | |
2420 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2421 | * | |
2422 | * LOCKING: | |
2423 | * spin_lock_irqsave(host_set lock) | |
2424 | */ | |
2425 | ||
2426 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) | |
2427 | { | |
2428 | struct scatterlist *sg; | |
2429 | ||
2430 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2431 | ||
2432 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
2433 | qc->sg = &qc->sgent; | |
2434 | qc->n_elem = 1; | |
2435 | qc->buf_virt = buf; | |
2436 | ||
2437 | sg = qc->sg; | |
2438 | sg->page = virt_to_page(buf); | |
2439 | sg->offset = (unsigned long) buf & ~PAGE_MASK; | |
2440 | sg->length = buflen; | |
2441 | } | |
2442 | ||
2443 | /** | |
2444 | * ata_sg_init - Associate command with scatter-gather table. | |
2445 | * @qc: Command to be associated | |
2446 | * @sg: Scatter-gather table. | |
2447 | * @n_elem: Number of elements in s/g table. | |
2448 | * | |
2449 | * Initialize the data-related elements of queued_cmd @qc | |
2450 | * to point to a scatter-gather table @sg, containing @n_elem | |
2451 | * elements. | |
2452 | * | |
2453 | * LOCKING: | |
2454 | * spin_lock_irqsave(host_set lock) | |
2455 | */ | |
2456 | ||
2457 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, | |
2458 | unsigned int n_elem) | |
2459 | { | |
2460 | qc->flags |= ATA_QCFLAG_SG; | |
2461 | qc->sg = sg; | |
2462 | qc->n_elem = n_elem; | |
2463 | } | |
2464 | ||
2465 | /** | |
2466 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. | |
2467 | * @qc: Command with memory buffer to be mapped. | |
2468 | * | |
2469 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
2470 | * | |
2471 | * LOCKING: | |
2472 | * spin_lock_irqsave(host_set lock) | |
2473 | * | |
2474 | * RETURNS: | |
2475 | * Zero on success, negative on error. | |
2476 | */ | |
2477 | ||
2478 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2479 | { | |
2480 | struct ata_port *ap = qc->ap; | |
2481 | int dir = qc->dma_dir; | |
2482 | struct scatterlist *sg = qc->sg; | |
2483 | dma_addr_t dma_address; | |
2484 | ||
2485 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, | |
2486 | sg->length, dir); | |
2487 | if (dma_mapping_error(dma_address)) | |
2488 | return -1; | |
2489 | ||
2490 | sg_dma_address(sg) = dma_address; | |
2491 | sg_dma_len(sg) = sg->length; | |
2492 | ||
2493 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2494 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2495 | ||
2496 | return 0; | |
2497 | } | |
2498 | ||
2499 | /** | |
2500 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. | |
2501 | * @qc: Command with scatter-gather table to be mapped. | |
2502 | * | |
2503 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
2504 | * | |
2505 | * LOCKING: | |
2506 | * spin_lock_irqsave(host_set lock) | |
2507 | * | |
2508 | * RETURNS: | |
2509 | * Zero on success, negative on error. | |
2510 | * | |
2511 | */ | |
2512 | ||
2513 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2514 | { | |
2515 | struct ata_port *ap = qc->ap; | |
2516 | struct scatterlist *sg = qc->sg; | |
2517 | int n_elem, dir; | |
2518 | ||
2519 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2520 | assert(qc->flags & ATA_QCFLAG_SG); | |
2521 | ||
2522 | dir = qc->dma_dir; | |
2523 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2524 | if (n_elem < 1) | |
2525 | return -1; | |
2526 | ||
2527 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2528 | ||
2529 | qc->n_elem = n_elem; | |
2530 | ||
2531 | return 0; | |
2532 | } | |
2533 | ||
2534 | /** | |
2535 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2536 | * @qc: Command to complete | |
2537 | * @drv_stat: ATA status register content | |
2538 | * | |
2539 | * LOCKING: | |
2540 | * None. (grabs host lock) | |
2541 | */ | |
2542 | ||
2543 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
2544 | { | |
2545 | struct ata_port *ap = qc->ap; | |
2546 | unsigned long flags; | |
2547 | ||
2548 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2549 | ap->flags &= ~ATA_FLAG_NOINTR; | |
2550 | ata_irq_on(ap); | |
2551 | ata_qc_complete(qc, drv_stat); | |
2552 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2553 | } | |
2554 | ||
2555 | /** | |
2556 | * ata_pio_poll - | |
2557 | * @ap: | |
2558 | * | |
2559 | * LOCKING: | |
2560 | * None. (executing in kernel thread context) | |
2561 | * | |
2562 | * RETURNS: | |
2563 | * | |
2564 | */ | |
2565 | ||
2566 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2567 | { | |
2568 | u8 status; | |
2569 | unsigned int poll_state = HSM_ST_UNKNOWN; | |
2570 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
2571 | const unsigned int tmout_state = HSM_ST_TMOUT; | |
2572 | ||
2573 | switch (ap->hsm_task_state) { | |
2574 | case HSM_ST: | |
2575 | case HSM_ST_POLL: | |
2576 | poll_state = HSM_ST_POLL; | |
2577 | reg_state = HSM_ST; | |
2578 | break; | |
2579 | case HSM_ST_LAST: | |
2580 | case HSM_ST_LAST_POLL: | |
2581 | poll_state = HSM_ST_LAST_POLL; | |
2582 | reg_state = HSM_ST_LAST; | |
2583 | break; | |
2584 | default: | |
2585 | BUG(); | |
2586 | break; | |
2587 | } | |
2588 | ||
2589 | status = ata_chk_status(ap); | |
2590 | if (status & ATA_BUSY) { | |
2591 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
2592 | ap->hsm_task_state = tmout_state; | |
2593 | return 0; | |
2594 | } | |
2595 | ap->hsm_task_state = poll_state; | |
2596 | return ATA_SHORT_PAUSE; | |
2597 | } | |
2598 | ||
2599 | ap->hsm_task_state = reg_state; | |
2600 | return 0; | |
2601 | } | |
2602 | ||
2603 | /** | |
2604 | * ata_pio_complete - | |
2605 | * @ap: | |
2606 | * | |
2607 | * LOCKING: | |
2608 | * None. (executing in kernel thread context) | |
2609 | * | |
2610 | * RETURNS: | |
2611 | * Non-zero if qc completed, zero otherwise. | |
2612 | */ | |
2613 | ||
2614 | static int ata_pio_complete (struct ata_port *ap) | |
2615 | { | |
2616 | struct ata_queued_cmd *qc; | |
2617 | u8 drv_stat; | |
2618 | ||
2619 | /* | |
2620 | * This is purely heuristic. This is a fast path. Sometimes when | |
2621 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2622 | * the drive is probably seeking or something. Snooze for a couple | |
2623 | * msecs, then chk-status again. If still busy, fall back to | |
2624 | * HSM_ST_POLL state. | |
2625 | */ | |
2626 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2627 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2628 | msleep(2); | |
2629 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2630 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2631 | ap->hsm_task_state = HSM_ST_LAST_POLL; | |
2632 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2633 | return 0; | |
2634 | } | |
2635 | } | |
2636 | ||
2637 | drv_stat = ata_wait_idle(ap); | |
2638 | if (!ata_ok(drv_stat)) { | |
2639 | ap->hsm_task_state = HSM_ST_ERR; | |
2640 | return 0; | |
2641 | } | |
2642 | ||
2643 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2644 | assert(qc != NULL); | |
2645 | ||
2646 | ap->hsm_task_state = HSM_ST_IDLE; | |
2647 | ||
2648 | ata_poll_qc_complete(qc, drv_stat); | |
2649 | ||
2650 | /* another command may start at this point */ | |
2651 | ||
2652 | return 1; | |
2653 | } | |
2654 | ||
2655 | ||
2656 | /** | |
2657 | * swap_buf_le16 - | |
2658 | * @buf: Buffer to swap | |
2659 | * @buf_words: Number of 16-bit words in buffer. | |
2660 | * | |
2661 | * Swap halves of 16-bit words if needed to convert from | |
2662 | * little-endian byte order to native cpu byte order, or | |
2663 | * vice-versa. | |
2664 | * | |
2665 | * LOCKING: | |
2666 | */ | |
2667 | void swap_buf_le16(u16 *buf, unsigned int buf_words) | |
2668 | { | |
2669 | #ifdef __BIG_ENDIAN | |
2670 | unsigned int i; | |
2671 | ||
2672 | for (i = 0; i < buf_words; i++) | |
2673 | buf[i] = le16_to_cpu(buf[i]); | |
2674 | #endif /* __BIG_ENDIAN */ | |
2675 | } | |
2676 | ||
2677 | /** | |
2678 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2679 | * @ap: port to read/write | |
2680 | * @buf: data buffer | |
2681 | * @buflen: buffer length | |
2682 | * @write_data: read/write | |
2683 | * | |
2684 | * Transfer data from/to the device data register by MMIO. | |
2685 | * | |
2686 | * LOCKING: | |
2687 | * Inherited from caller. | |
2688 | * | |
2689 | */ | |
2690 | ||
2691 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2692 | unsigned int buflen, int write_data) | |
2693 | { | |
2694 | unsigned int i; | |
2695 | unsigned int words = buflen >> 1; | |
2696 | u16 *buf16 = (u16 *) buf; | |
2697 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2698 | ||
2699 | /* Transfer multiple of 2 bytes */ | |
2700 | if (write_data) { | |
2701 | for (i = 0; i < words; i++) | |
2702 | writew(le16_to_cpu(buf16[i]), mmio); | |
2703 | } else { | |
2704 | for (i = 0; i < words; i++) | |
2705 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2706 | } | |
2707 | ||
2708 | /* Transfer trailing 1 byte, if any. */ | |
2709 | if (unlikely(buflen & 0x01)) { | |
2710 | u16 align_buf[1] = { 0 }; | |
2711 | unsigned char *trailing_buf = buf + buflen - 1; | |
2712 | ||
2713 | if (write_data) { | |
2714 | memcpy(align_buf, trailing_buf, 1); | |
2715 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2716 | } else { | |
2717 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2718 | memcpy(trailing_buf, align_buf, 1); | |
2719 | } | |
2720 | } | |
2721 | } | |
2722 | ||
2723 | /** | |
2724 | * ata_pio_data_xfer - Transfer data by PIO | |
2725 | * @ap: port to read/write | |
2726 | * @buf: data buffer | |
2727 | * @buflen: buffer length | |
2728 | * @write_data: read/write | |
2729 | * | |
2730 | * Transfer data from/to the device data register by PIO. | |
2731 | * | |
2732 | * LOCKING: | |
2733 | * Inherited from caller. | |
2734 | * | |
2735 | */ | |
2736 | ||
2737 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2738 | unsigned int buflen, int write_data) | |
2739 | { | |
2740 | unsigned int words = buflen >> 1; | |
2741 | ||
2742 | /* Transfer multiple of 2 bytes */ | |
2743 | if (write_data) | |
2744 | outsw(ap->ioaddr.data_addr, buf, words); | |
2745 | else | |
2746 | insw(ap->ioaddr.data_addr, buf, words); | |
2747 | ||
2748 | /* Transfer trailing 1 byte, if any. */ | |
2749 | if (unlikely(buflen & 0x01)) { | |
2750 | u16 align_buf[1] = { 0 }; | |
2751 | unsigned char *trailing_buf = buf + buflen - 1; | |
2752 | ||
2753 | if (write_data) { | |
2754 | memcpy(align_buf, trailing_buf, 1); | |
2755 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
2756 | } else { | |
2757 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
2758 | memcpy(trailing_buf, align_buf, 1); | |
2759 | } | |
2760 | } | |
2761 | } | |
2762 | ||
2763 | /** | |
2764 | * ata_data_xfer - Transfer data from/to the data register. | |
2765 | * @ap: port to read/write | |
2766 | * @buf: data buffer | |
2767 | * @buflen: buffer length | |
2768 | * @do_write: read/write | |
2769 | * | |
2770 | * Transfer data from/to the device data register. | |
2771 | * | |
2772 | * LOCKING: | |
2773 | * Inherited from caller. | |
2774 | * | |
2775 | */ | |
2776 | ||
2777 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2778 | unsigned int buflen, int do_write) | |
2779 | { | |
2780 | if (ap->flags & ATA_FLAG_MMIO) | |
2781 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2782 | else | |
2783 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2784 | } | |
2785 | ||
2786 | /** | |
2787 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
2788 | * @qc: Command on going | |
2789 | * | |
2790 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
2791 | * | |
2792 | * LOCKING: | |
2793 | * Inherited from caller. | |
2794 | */ | |
2795 | ||
2796 | static void ata_pio_sector(struct ata_queued_cmd *qc) | |
2797 | { | |
2798 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2799 | struct scatterlist *sg = qc->sg; | |
2800 | struct ata_port *ap = qc->ap; | |
2801 | struct page *page; | |
2802 | unsigned int offset; | |
2803 | unsigned char *buf; | |
2804 | ||
2805 | if (qc->cursect == (qc->nsect - 1)) | |
2806 | ap->hsm_task_state = HSM_ST_LAST; | |
2807 | ||
2808 | page = sg[qc->cursg].page; | |
2809 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2810 | ||
2811 | /* get the current page and offset */ | |
2812 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2813 | offset %= PAGE_SIZE; | |
2814 | ||
2815 | buf = kmap(page) + offset; | |
2816 | ||
2817 | qc->cursect++; | |
2818 | qc->cursg_ofs++; | |
2819 | ||
2820 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { | |
2821 | qc->cursg++; | |
2822 | qc->cursg_ofs = 0; | |
2823 | } | |
2824 | ||
2825 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2826 | ||
2827 | /* do the actual data transfer */ | |
2828 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2829 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
2830 | ||
2831 | kunmap(page); | |
2832 | } | |
2833 | ||
2834 | /** | |
2835 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2836 | * @qc: Command on going | |
2837 | * @bytes: number of bytes | |
2838 | * | |
2839 | * Transfer Transfer data from/to the ATAPI device. | |
2840 | * | |
2841 | * LOCKING: | |
2842 | * Inherited from caller. | |
2843 | * | |
2844 | */ | |
2845 | ||
2846 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | |
2847 | { | |
2848 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2849 | struct scatterlist *sg = qc->sg; | |
2850 | struct ata_port *ap = qc->ap; | |
2851 | struct page *page; | |
2852 | unsigned char *buf; | |
2853 | unsigned int offset, count; | |
2854 | ||
2855 | if (qc->curbytes + bytes >= qc->nbytes) | |
2856 | ap->hsm_task_state = HSM_ST_LAST; | |
2857 | ||
2858 | next_sg: | |
2859 | if (unlikely(qc->cursg >= qc->n_elem)) { | |
2860 | /* | |
2861 | * The end of qc->sg is reached and the device expects | |
2862 | * more data to transfer. In order not to overrun qc->sg | |
2863 | * and fulfill length specified in the byte count register, | |
2864 | * - for read case, discard trailing data from the device | |
2865 | * - for write case, padding zero data to the device | |
2866 | */ | |
2867 | u16 pad_buf[1] = { 0 }; | |
2868 | unsigned int words = bytes >> 1; | |
2869 | unsigned int i; | |
2870 | ||
2871 | if (words) /* warning if bytes > 1 */ | |
2872 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", | |
2873 | ap->id, bytes); | |
2874 | ||
2875 | for (i = 0; i < words; i++) | |
2876 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
2877 | ||
2878 | ap->hsm_task_state = HSM_ST_LAST; | |
2879 | return; | |
2880 | } | |
2881 | ||
2882 | sg = &qc->sg[qc->cursg]; | |
2883 | ||
2884 | page = sg->page; | |
2885 | offset = sg->offset + qc->cursg_ofs; | |
2886 | ||
2887 | /* get the current page and offset */ | |
2888 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2889 | offset %= PAGE_SIZE; | |
2890 | ||
2891 | /* don't overrun current sg */ | |
2892 | count = min(sg->length - qc->cursg_ofs, bytes); | |
2893 | ||
2894 | /* don't cross page boundaries */ | |
2895 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
2896 | ||
2897 | buf = kmap(page) + offset; | |
2898 | ||
2899 | bytes -= count; | |
2900 | qc->curbytes += count; | |
2901 | qc->cursg_ofs += count; | |
2902 | ||
2903 | if (qc->cursg_ofs == sg->length) { | |
2904 | qc->cursg++; | |
2905 | qc->cursg_ofs = 0; | |
2906 | } | |
2907 | ||
2908 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2909 | ||
2910 | /* do the actual data transfer */ | |
2911 | ata_data_xfer(ap, buf, count, do_write); | |
2912 | ||
2913 | kunmap(page); | |
2914 | ||
2915 | if (bytes) | |
2916 | goto next_sg; | |
2917 | } | |
2918 | ||
2919 | /** | |
2920 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
2921 | * @qc: Command on going | |
2922 | * | |
2923 | * Transfer Transfer data from/to the ATAPI device. | |
2924 | * | |
2925 | * LOCKING: | |
2926 | * Inherited from caller. | |
2927 | * | |
2928 | */ | |
2929 | ||
2930 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) | |
2931 | { | |
2932 | struct ata_port *ap = qc->ap; | |
2933 | struct ata_device *dev = qc->dev; | |
2934 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
2935 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
2936 | ||
2937 | ap->ops->tf_read(ap, &qc->tf); | |
2938 | ireason = qc->tf.nsect; | |
2939 | bc_lo = qc->tf.lbam; | |
2940 | bc_hi = qc->tf.lbah; | |
2941 | bytes = (bc_hi << 8) | bc_lo; | |
2942 | ||
2943 | /* shall be cleared to zero, indicating xfer of data */ | |
2944 | if (ireason & (1 << 0)) | |
2945 | goto err_out; | |
2946 | ||
2947 | /* make sure transfer direction matches expected */ | |
2948 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
2949 | if (do_write != i_write) | |
2950 | goto err_out; | |
2951 | ||
2952 | __atapi_pio_bytes(qc, bytes); | |
2953 | ||
2954 | return; | |
2955 | ||
2956 | err_out: | |
2957 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
2958 | ap->id, dev->devno); | |
2959 | ap->hsm_task_state = HSM_ST_ERR; | |
2960 | } | |
2961 | ||
2962 | /** | |
2963 | * ata_pio_sector - | |
2964 | * @ap: | |
2965 | * | |
2966 | * LOCKING: | |
2967 | * None. (executing in kernel thread context) | |
2968 | */ | |
2969 | ||
2970 | static void ata_pio_block(struct ata_port *ap) | |
2971 | { | |
2972 | struct ata_queued_cmd *qc; | |
2973 | u8 status; | |
2974 | ||
2975 | /* | |
2976 | * This is purely hueristic. This is a fast path. | |
2977 | * Sometimes when we enter, BSY will be cleared in | |
2978 | * a chk-status or two. If not, the drive is probably seeking | |
2979 | * or something. Snooze for a couple msecs, then | |
2980 | * chk-status again. If still busy, fall back to | |
2981 | * HSM_ST_POLL state. | |
2982 | */ | |
2983 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
2984 | if (status & ATA_BUSY) { | |
2985 | msleep(2); | |
2986 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
2987 | if (status & ATA_BUSY) { | |
2988 | ap->hsm_task_state = HSM_ST_POLL; | |
2989 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2990 | return; | |
2991 | } | |
2992 | } | |
2993 | ||
2994 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2995 | assert(qc != NULL); | |
2996 | ||
2997 | if (is_atapi_taskfile(&qc->tf)) { | |
2998 | /* no more data to transfer or unsupported ATAPI command */ | |
2999 | if ((status & ATA_DRQ) == 0) { | |
3000 | ap->hsm_task_state = HSM_ST_LAST; | |
3001 | return; | |
3002 | } | |
3003 | ||
3004 | atapi_pio_bytes(qc); | |
3005 | } else { | |
3006 | /* handle BSY=0, DRQ=0 as error */ | |
3007 | if ((status & ATA_DRQ) == 0) { | |
3008 | ap->hsm_task_state = HSM_ST_ERR; | |
3009 | return; | |
3010 | } | |
3011 | ||
3012 | ata_pio_sector(qc); | |
3013 | } | |
3014 | } | |
3015 | ||
3016 | static void ata_pio_error(struct ata_port *ap) | |
3017 | { | |
3018 | struct ata_queued_cmd *qc; | |
3019 | u8 drv_stat; | |
3020 | ||
3021 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3022 | assert(qc != NULL); | |
3023 | ||
3024 | drv_stat = ata_chk_status(ap); | |
3025 | printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", | |
3026 | ap->id, drv_stat); | |
3027 | ||
3028 | ap->hsm_task_state = HSM_ST_IDLE; | |
3029 | ||
3030 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); | |
3031 | } | |
3032 | ||
3033 | static void ata_pio_task(void *_data) | |
3034 | { | |
3035 | struct ata_port *ap = _data; | |
3036 | unsigned long timeout; | |
3037 | int qc_completed; | |
3038 | ||
3039 | fsm_start: | |
3040 | timeout = 0; | |
3041 | qc_completed = 0; | |
3042 | ||
3043 | switch (ap->hsm_task_state) { | |
3044 | case HSM_ST_IDLE: | |
3045 | return; | |
3046 | ||
3047 | case HSM_ST: | |
3048 | ata_pio_block(ap); | |
3049 | break; | |
3050 | ||
3051 | case HSM_ST_LAST: | |
3052 | qc_completed = ata_pio_complete(ap); | |
3053 | break; | |
3054 | ||
3055 | case HSM_ST_POLL: | |
3056 | case HSM_ST_LAST_POLL: | |
3057 | timeout = ata_pio_poll(ap); | |
3058 | break; | |
3059 | ||
3060 | case HSM_ST_TMOUT: | |
3061 | case HSM_ST_ERR: | |
3062 | ata_pio_error(ap); | |
3063 | return; | |
3064 | } | |
3065 | ||
3066 | if (timeout) | |
3067 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); | |
3068 | else if (!qc_completed) | |
3069 | goto fsm_start; | |
3070 | } | |
3071 | ||
3072 | /** | |
3073 | * ata_qc_timeout - Handle timeout of queued command | |
3074 | * @qc: Command that timed out | |
3075 | * | |
3076 | * Some part of the kernel (currently, only the SCSI layer) | |
3077 | * has noticed that the active command on port @ap has not | |
3078 | * completed after a specified length of time. Handle this | |
3079 | * condition by disabling DMA (if necessary) and completing | |
3080 | * transactions, with error if necessary. | |
3081 | * | |
3082 | * This also handles the case of the "lost interrupt", where | |
3083 | * for some reason (possibly hardware bug, possibly driver bug) | |
3084 | * an interrupt was not delivered to the driver, even though the | |
3085 | * transaction completed successfully. | |
3086 | * | |
3087 | * LOCKING: | |
3088 | * Inherited from SCSI layer (none, can sleep) | |
3089 | */ | |
3090 | ||
3091 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3092 | { | |
3093 | struct ata_port *ap = qc->ap; | |
3094 | struct ata_host_set *host_set = ap->host_set; | |
3095 | struct ata_device *dev = qc->dev; | |
3096 | u8 host_stat = 0, drv_stat; | |
3097 | unsigned long flags; | |
3098 | ||
3099 | DPRINTK("ENTER\n"); | |
3100 | ||
3101 | /* FIXME: doesn't this conflict with timeout handling? */ | |
3102 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
3103 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3104 | ||
3105 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { | |
3106 | ||
3107 | /* finish completing original command */ | |
3108 | spin_lock_irqsave(&host_set->lock, flags); | |
3109 | __ata_qc_complete(qc); | |
3110 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3111 | ||
3112 | atapi_request_sense(ap, dev, cmd); | |
3113 | ||
3114 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
3115 | scsi_finish_command(cmd); | |
3116 | ||
3117 | goto out; | |
3118 | } | |
3119 | } | |
3120 | ||
3121 | spin_lock_irqsave(&host_set->lock, flags); | |
3122 | ||
3123 | /* hack alert! We cannot use the supplied completion | |
3124 | * function from inside the ->eh_strategy_handler() thread. | |
3125 | * libata is the only user of ->eh_strategy_handler() in | |
3126 | * any kernel, so the default scsi_done() assumes it is | |
3127 | * not being called from the SCSI EH. | |
3128 | */ | |
3129 | qc->scsidone = scsi_finish_command; | |
3130 | ||
3131 | switch (qc->tf.protocol) { | |
3132 | ||
3133 | case ATA_PROT_DMA: | |
3134 | case ATA_PROT_ATAPI_DMA: | |
3135 | host_stat = ap->ops->bmdma_status(ap); | |
3136 | ||
3137 | /* before we do anything else, clear DMA-Start bit */ | |
3138 | ap->ops->bmdma_stop(qc); | |
3139 | ||
3140 | /* fall through */ | |
3141 | ||
3142 | default: | |
3143 | ata_altstatus(ap); | |
3144 | drv_stat = ata_chk_status(ap); | |
3145 | ||
3146 | /* ack bmdma irq events */ | |
3147 | ap->ops->irq_clear(ap); | |
3148 | ||
3149 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3150 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3151 | ||
3152 | /* complete taskfile transaction */ | |
3153 | ata_qc_complete(qc, drv_stat); | |
3154 | break; | |
3155 | } | |
3156 | ||
3157 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3158 | ||
3159 | out: | |
3160 | DPRINTK("EXIT\n"); | |
3161 | } | |
3162 | ||
3163 | /** | |
3164 | * ata_eng_timeout - Handle timeout of queued command | |
3165 | * @ap: Port on which timed-out command is active | |
3166 | * | |
3167 | * Some part of the kernel (currently, only the SCSI layer) | |
3168 | * has noticed that the active command on port @ap has not | |
3169 | * completed after a specified length of time. Handle this | |
3170 | * condition by disabling DMA (if necessary) and completing | |
3171 | * transactions, with error if necessary. | |
3172 | * | |
3173 | * This also handles the case of the "lost interrupt", where | |
3174 | * for some reason (possibly hardware bug, possibly driver bug) | |
3175 | * an interrupt was not delivered to the driver, even though the | |
3176 | * transaction completed successfully. | |
3177 | * | |
3178 | * LOCKING: | |
3179 | * Inherited from SCSI layer (none, can sleep) | |
3180 | */ | |
3181 | ||
3182 | void ata_eng_timeout(struct ata_port *ap) | |
3183 | { | |
3184 | struct ata_queued_cmd *qc; | |
3185 | ||
3186 | DPRINTK("ENTER\n"); | |
3187 | ||
3188 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3189 | if (qc) | |
3190 | ata_qc_timeout(qc); | |
3191 | else { | |
3192 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", | |
3193 | ap->id); | |
3194 | goto out; | |
3195 | } | |
3196 | ||
3197 | out: | |
3198 | DPRINTK("EXIT\n"); | |
3199 | } | |
3200 | ||
3201 | /** | |
3202 | * ata_qc_new - Request an available ATA command, for queueing | |
3203 | * @ap: Port associated with device @dev | |
3204 | * @dev: Device from whom we request an available command structure | |
3205 | * | |
3206 | * LOCKING: | |
3207 | * None. | |
3208 | */ | |
3209 | ||
3210 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3211 | { | |
3212 | struct ata_queued_cmd *qc = NULL; | |
3213 | unsigned int i; | |
3214 | ||
3215 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3216 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3217 | qc = ata_qc_from_tag(ap, i); | |
3218 | break; | |
3219 | } | |
3220 | ||
3221 | if (qc) | |
3222 | qc->tag = i; | |
3223 | ||
3224 | return qc; | |
3225 | } | |
3226 | ||
3227 | /** | |
3228 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3229 | * @ap: Port associated with device @dev | |
3230 | * @dev: Device from whom we request an available command structure | |
3231 | * | |
3232 | * LOCKING: | |
3233 | * None. | |
3234 | */ | |
3235 | ||
3236 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3237 | struct ata_device *dev) | |
3238 | { | |
3239 | struct ata_queued_cmd *qc; | |
3240 | ||
3241 | qc = ata_qc_new(ap); | |
3242 | if (qc) { | |
3243 | qc->sg = NULL; | |
3244 | qc->flags = 0; | |
3245 | qc->scsicmd = NULL; | |
3246 | qc->ap = ap; | |
3247 | qc->dev = dev; | |
3248 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
3249 | qc->nsect = 0; | |
3250 | qc->nbytes = qc->curbytes = 0; | |
3251 | ||
3252 | ata_tf_init(ap, &qc->tf, dev->devno); | |
3253 | } | |
3254 | ||
3255 | return qc; | |
3256 | } | |
3257 | ||
3258 | int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) | |
3259 | { | |
3260 | return 0; | |
3261 | } | |
3262 | ||
3263 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
3264 | { | |
3265 | struct ata_port *ap = qc->ap; | |
3266 | unsigned int tag, do_clear = 0; | |
3267 | ||
3268 | qc->flags = 0; | |
3269 | tag = qc->tag; | |
3270 | if (likely(ata_tag_valid(tag))) { | |
3271 | if (tag == ap->active_tag) | |
3272 | ap->active_tag = ATA_TAG_POISON; | |
3273 | qc->tag = ATA_TAG_POISON; | |
3274 | do_clear = 1; | |
3275 | } | |
3276 | ||
3277 | if (qc->waiting) { | |
3278 | struct completion *waiting = qc->waiting; | |
3279 | qc->waiting = NULL; | |
3280 | complete(waiting); | |
3281 | } | |
3282 | ||
3283 | if (likely(do_clear)) | |
3284 | clear_bit(tag, &ap->qactive); | |
3285 | } | |
3286 | ||
3287 | /** | |
3288 | * ata_qc_free - free unused ata_queued_cmd | |
3289 | * @qc: Command to complete | |
3290 | * | |
3291 | * Designed to free unused ata_queued_cmd object | |
3292 | * in case something prevents using it. | |
3293 | * | |
3294 | * LOCKING: | |
3295 | * spin_lock_irqsave(host_set lock) | |
3296 | * | |
3297 | */ | |
3298 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3299 | { | |
3300 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3301 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3302 | ||
3303 | __ata_qc_complete(qc); | |
3304 | } | |
3305 | ||
3306 | /** | |
3307 | * ata_qc_complete - Complete an active ATA command | |
3308 | * @qc: Command to complete | |
3309 | * @drv_stat: ATA Status register contents | |
3310 | * | |
3311 | * Indicate to the mid and upper layers that an ATA | |
3312 | * command has completed, with either an ok or not-ok status. | |
3313 | * | |
3314 | * LOCKING: | |
3315 | * spin_lock_irqsave(host_set lock) | |
3316 | * | |
3317 | */ | |
3318 | ||
3319 | void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
3320 | { | |
3321 | int rc; | |
3322 | ||
3323 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3324 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3325 | ||
3326 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3327 | ata_sg_clean(qc); | |
3328 | ||
3329 | /* atapi: mark qc as inactive to prevent the interrupt handler | |
3330 | * from completing the command twice later, before the error handler | |
3331 | * is called. (when rc != 0 and atapi request sense is needed) | |
3332 | */ | |
3333 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3334 | ||
3335 | /* call completion callback */ | |
3336 | rc = qc->complete_fn(qc, drv_stat); | |
3337 | ||
3338 | /* if callback indicates not to complete command (non-zero), | |
3339 | * return immediately | |
3340 | */ | |
3341 | if (rc != 0) | |
3342 | return; | |
3343 | ||
3344 | __ata_qc_complete(qc); | |
3345 | ||
3346 | VPRINTK("EXIT\n"); | |
3347 | } | |
3348 | ||
3349 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3350 | { | |
3351 | struct ata_port *ap = qc->ap; | |
3352 | ||
3353 | switch (qc->tf.protocol) { | |
3354 | case ATA_PROT_DMA: | |
3355 | case ATA_PROT_ATAPI_DMA: | |
3356 | return 1; | |
3357 | ||
3358 | case ATA_PROT_ATAPI: | |
3359 | case ATA_PROT_PIO: | |
3360 | case ATA_PROT_PIO_MULT: | |
3361 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3362 | return 1; | |
3363 | ||
3364 | /* fall through */ | |
3365 | ||
3366 | default: | |
3367 | return 0; | |
3368 | } | |
3369 | ||
3370 | /* never reached */ | |
3371 | } | |
3372 | ||
3373 | /** | |
3374 | * ata_qc_issue - issue taskfile to device | |
3375 | * @qc: command to issue to device | |
3376 | * | |
3377 | * Prepare an ATA command to submission to device. | |
3378 | * This includes mapping the data into a DMA-able | |
3379 | * area, filling in the S/G table, and finally | |
3380 | * writing the taskfile to hardware, starting the command. | |
3381 | * | |
3382 | * LOCKING: | |
3383 | * spin_lock_irqsave(host_set lock) | |
3384 | * | |
3385 | * RETURNS: | |
3386 | * Zero on success, negative on error. | |
3387 | */ | |
3388 | ||
3389 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3390 | { | |
3391 | struct ata_port *ap = qc->ap; | |
3392 | ||
3393 | if (ata_should_dma_map(qc)) { | |
3394 | if (qc->flags & ATA_QCFLAG_SG) { | |
3395 | if (ata_sg_setup(qc)) | |
3396 | goto err_out; | |
3397 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3398 | if (ata_sg_setup_one(qc)) | |
3399 | goto err_out; | |
3400 | } | |
3401 | } else { | |
3402 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3403 | } | |
3404 | ||
3405 | ap->ops->qc_prep(qc); | |
3406 | ||
3407 | qc->ap->active_tag = qc->tag; | |
3408 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3409 | ||
3410 | return ap->ops->qc_issue(qc); | |
3411 | ||
3412 | err_out: | |
3413 | return -1; | |
3414 | } | |
3415 | ||
3416 | ||
3417 | /** | |
3418 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3419 | * @qc: command to issue to device | |
3420 | * | |
3421 | * Using various libata functions and hooks, this function | |
3422 | * starts an ATA command. ATA commands are grouped into | |
3423 | * classes called "protocols", and issuing each type of protocol | |
3424 | * is slightly different. | |
3425 | * | |
3426 | * May be used as the qc_issue() entry in ata_port_operations. | |
3427 | * | |
3428 | * LOCKING: | |
3429 | * spin_lock_irqsave(host_set lock) | |
3430 | * | |
3431 | * RETURNS: | |
3432 | * Zero on success, negative on error. | |
3433 | */ | |
3434 | ||
3435 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3436 | { | |
3437 | struct ata_port *ap = qc->ap; | |
3438 | ||
3439 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3440 | ||
3441 | switch (qc->tf.protocol) { | |
3442 | case ATA_PROT_NODATA: | |
3443 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3444 | break; | |
3445 | ||
3446 | case ATA_PROT_DMA: | |
3447 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3448 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3449 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3450 | break; | |
3451 | ||
3452 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3453 | ata_qc_set_polling(qc); | |
3454 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3455 | ap->hsm_task_state = HSM_ST; | |
3456 | queue_work(ata_wq, &ap->pio_task); | |
3457 | break; | |
3458 | ||
3459 | case ATA_PROT_ATAPI: | |
3460 | ata_qc_set_polling(qc); | |
3461 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3462 | queue_work(ata_wq, &ap->packet_task); | |
3463 | break; | |
3464 | ||
3465 | case ATA_PROT_ATAPI_NODATA: | |
3466 | ap->flags |= ATA_FLAG_NOINTR; | |
3467 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3468 | queue_work(ata_wq, &ap->packet_task); | |
3469 | break; | |
3470 | ||
3471 | case ATA_PROT_ATAPI_DMA: | |
3472 | ap->flags |= ATA_FLAG_NOINTR; | |
3473 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3474 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3475 | queue_work(ata_wq, &ap->packet_task); | |
3476 | break; | |
3477 | ||
3478 | default: | |
3479 | WARN_ON(1); | |
3480 | return -1; | |
3481 | } | |
3482 | ||
3483 | return 0; | |
3484 | } | |
3485 | ||
3486 | /** | |
3487 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction | |
3488 | * @qc: Info associated with this ATA transaction. | |
3489 | * | |
3490 | * LOCKING: | |
3491 | * spin_lock_irqsave(host_set lock) | |
3492 | */ | |
3493 | ||
3494 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3495 | { | |
3496 | struct ata_port *ap = qc->ap; | |
3497 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3498 | u8 dmactl; | |
3499 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3500 | ||
3501 | /* load PRD table addr. */ | |
3502 | mb(); /* make sure PRD table writes are visible to controller */ | |
3503 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3504 | ||
3505 | /* specify data direction, triple-check start bit is clear */ | |
3506 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3507 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3508 | if (!rw) | |
3509 | dmactl |= ATA_DMA_WR; | |
3510 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3511 | ||
3512 | /* issue r/w command */ | |
3513 | ap->ops->exec_command(ap, &qc->tf); | |
3514 | } | |
3515 | ||
3516 | /** | |
3517 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction | |
3518 | * @qc: Info associated with this ATA transaction. | |
3519 | * | |
3520 | * LOCKING: | |
3521 | * spin_lock_irqsave(host_set lock) | |
3522 | */ | |
3523 | ||
3524 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3525 | { | |
3526 | struct ata_port *ap = qc->ap; | |
3527 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3528 | u8 dmactl; | |
3529 | ||
3530 | /* start host DMA transaction */ | |
3531 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3532 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3533 | ||
3534 | /* Strictly, one may wish to issue a readb() here, to | |
3535 | * flush the mmio write. However, control also passes | |
3536 | * to the hardware at this point, and it will interrupt | |
3537 | * us when we are to resume control. So, in effect, | |
3538 | * we don't care when the mmio write flushes. | |
3539 | * Further, a read of the DMA status register _immediately_ | |
3540 | * following the write may not be what certain flaky hardware | |
3541 | * is expected, so I think it is best to not add a readb() | |
3542 | * without first all the MMIO ATA cards/mobos. | |
3543 | * Or maybe I'm just being paranoid. | |
3544 | */ | |
3545 | } | |
3546 | ||
3547 | /** | |
3548 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3549 | * @qc: Info associated with this ATA transaction. | |
3550 | * | |
3551 | * LOCKING: | |
3552 | * spin_lock_irqsave(host_set lock) | |
3553 | */ | |
3554 | ||
3555 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3556 | { | |
3557 | struct ata_port *ap = qc->ap; | |
3558 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3559 | u8 dmactl; | |
3560 | ||
3561 | /* load PRD table addr. */ | |
3562 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3563 | ||
3564 | /* specify data direction, triple-check start bit is clear */ | |
3565 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3566 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3567 | if (!rw) | |
3568 | dmactl |= ATA_DMA_WR; | |
3569 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3570 | ||
3571 | /* issue r/w command */ | |
3572 | ap->ops->exec_command(ap, &qc->tf); | |
3573 | } | |
3574 | ||
3575 | /** | |
3576 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3577 | * @qc: Info associated with this ATA transaction. | |
3578 | * | |
3579 | * LOCKING: | |
3580 | * spin_lock_irqsave(host_set lock) | |
3581 | */ | |
3582 | ||
3583 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3584 | { | |
3585 | struct ata_port *ap = qc->ap; | |
3586 | u8 dmactl; | |
3587 | ||
3588 | /* start host DMA transaction */ | |
3589 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3590 | outb(dmactl | ATA_DMA_START, | |
3591 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3592 | } | |
3593 | ||
3594 | ||
3595 | /** | |
3596 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3597 | * @qc: Info associated with this ATA transaction. | |
3598 | * | |
3599 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3600 | * | |
3601 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3602 | * | |
3603 | * LOCKING: | |
3604 | * spin_lock_irqsave(host_set lock) | |
3605 | */ | |
3606 | void ata_bmdma_start(struct ata_queued_cmd *qc) | |
3607 | { | |
3608 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3609 | ata_bmdma_start_mmio(qc); | |
3610 | else | |
3611 | ata_bmdma_start_pio(qc); | |
3612 | } | |
3613 | ||
3614 | ||
3615 | /** | |
3616 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3617 | * @qc: Info associated with this ATA transaction. | |
3618 | * | |
3619 | * Writes address of PRD table to device's PRD Table Address | |
3620 | * register, sets the DMA control register, and calls | |
3621 | * ops->exec_command() to start the transfer. | |
3622 | * | |
3623 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3624 | * | |
3625 | * LOCKING: | |
3626 | * spin_lock_irqsave(host_set lock) | |
3627 | */ | |
3628 | void ata_bmdma_setup(struct ata_queued_cmd *qc) | |
3629 | { | |
3630 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3631 | ata_bmdma_setup_mmio(qc); | |
3632 | else | |
3633 | ata_bmdma_setup_pio(qc); | |
3634 | } | |
3635 | ||
3636 | ||
3637 | /** | |
3638 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
3639 | * @ap: Port associated with this ATA transaction. | |
3640 | * | |
3641 | * Clear interrupt and error flags in DMA status register. | |
3642 | * | |
3643 | * May be used as the irq_clear() entry in ata_port_operations. | |
3644 | * | |
3645 | * LOCKING: | |
3646 | * spin_lock_irqsave(host_set lock) | |
3647 | */ | |
3648 | ||
3649 | void ata_bmdma_irq_clear(struct ata_port *ap) | |
3650 | { | |
3651 | if (ap->flags & ATA_FLAG_MMIO) { | |
3652 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3653 | writeb(readb(mmio), mmio); | |
3654 | } else { | |
3655 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3656 | outb(inb(addr), addr); | |
3657 | } | |
3658 | ||
3659 | } | |
3660 | ||
3661 | ||
3662 | /** | |
3663 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
3664 | * @ap: Port associated with this ATA transaction. | |
3665 | * | |
3666 | * Read and return BMDMA status register. | |
3667 | * | |
3668 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3669 | * | |
3670 | * LOCKING: | |
3671 | * spin_lock_irqsave(host_set lock) | |
3672 | */ | |
3673 | ||
3674 | u8 ata_bmdma_status(struct ata_port *ap) | |
3675 | { | |
3676 | u8 host_stat; | |
3677 | if (ap->flags & ATA_FLAG_MMIO) { | |
3678 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3679 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3680 | } else | |
3681 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
3682 | return host_stat; | |
3683 | } | |
3684 | ||
3685 | ||
3686 | /** | |
3687 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
3688 | * @qc: Command we are ending DMA for | |
3689 | * | |
3690 | * Clears the ATA_DMA_START flag in the dma control register | |
3691 | * | |
3692 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3693 | * | |
3694 | * LOCKING: | |
3695 | * spin_lock_irqsave(host_set lock) | |
3696 | */ | |
3697 | ||
3698 | void ata_bmdma_stop(struct ata_queued_cmd *qc) | |
3699 | { | |
3700 | struct ata_port *ap = qc->ap; | |
3701 | if (ap->flags & ATA_FLAG_MMIO) { | |
3702 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3703 | ||
3704 | /* clear start/stop bit */ | |
3705 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3706 | mmio + ATA_DMA_CMD); | |
3707 | } else { | |
3708 | /* clear start/stop bit */ | |
3709 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3710 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3711 | } | |
3712 | ||
3713 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3714 | ata_altstatus(ap); /* dummy read */ | |
3715 | } | |
3716 | ||
3717 | /** | |
3718 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3719 | * @ap: Port on which interrupt arrived (possibly...) | |
3720 | * @qc: Taskfile currently active in engine | |
3721 | * | |
3722 | * Handle host interrupt for given queued command. Currently, | |
3723 | * only DMA interrupts are handled. All other commands are | |
3724 | * handled via polling with interrupts disabled (nIEN bit). | |
3725 | * | |
3726 | * LOCKING: | |
3727 | * spin_lock_irqsave(host_set lock) | |
3728 | * | |
3729 | * RETURNS: | |
3730 | * One if interrupt was handled, zero if not (shared irq). | |
3731 | */ | |
3732 | ||
3733 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3734 | struct ata_queued_cmd *qc) | |
3735 | { | |
3736 | u8 status, host_stat; | |
3737 | ||
3738 | switch (qc->tf.protocol) { | |
3739 | ||
3740 | case ATA_PROT_DMA: | |
3741 | case ATA_PROT_ATAPI_DMA: | |
3742 | case ATA_PROT_ATAPI: | |
3743 | /* check status of DMA engine */ | |
3744 | host_stat = ap->ops->bmdma_status(ap); | |
3745 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3746 | ||
3747 | /* if it's not our irq... */ | |
3748 | if (!(host_stat & ATA_DMA_INTR)) | |
3749 | goto idle_irq; | |
3750 | ||
3751 | /* before we do anything else, clear DMA-Start bit */ | |
3752 | ap->ops->bmdma_stop(qc); | |
3753 | ||
3754 | /* fall through */ | |
3755 | ||
3756 | case ATA_PROT_ATAPI_NODATA: | |
3757 | case ATA_PROT_NODATA: | |
3758 | /* check altstatus */ | |
3759 | status = ata_altstatus(ap); | |
3760 | if (status & ATA_BUSY) | |
3761 | goto idle_irq; | |
3762 | ||
3763 | /* check main status, clearing INTRQ */ | |
3764 | status = ata_chk_status(ap); | |
3765 | if (unlikely(status & ATA_BUSY)) | |
3766 | goto idle_irq; | |
3767 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
3768 | ap->id, qc->tf.protocol, status); | |
3769 | ||
3770 | /* ack bmdma irq events */ | |
3771 | ap->ops->irq_clear(ap); | |
3772 | ||
3773 | /* complete taskfile transaction */ | |
3774 | ata_qc_complete(qc, status); | |
3775 | break; | |
3776 | ||
3777 | default: | |
3778 | goto idle_irq; | |
3779 | } | |
3780 | ||
3781 | return 1; /* irq handled */ | |
3782 | ||
3783 | idle_irq: | |
3784 | ap->stats.idle_irq++; | |
3785 | ||
3786 | #ifdef ATA_IRQ_TRAP | |
3787 | if ((ap->stats.idle_irq % 1000) == 0) { | |
3788 | handled = 1; | |
3789 | ata_irq_ack(ap, 0); /* debug trap */ | |
3790 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
3791 | } | |
3792 | #endif | |
3793 | return 0; /* irq not handled */ | |
3794 | } | |
3795 | ||
3796 | /** | |
3797 | * ata_interrupt - Default ATA host interrupt handler | |
3798 | * @irq: irq line (unused) | |
3799 | * @dev_instance: pointer to our ata_host_set information structure | |
3800 | * @regs: unused | |
3801 | * | |
3802 | * Default interrupt handler for PCI IDE devices. Calls | |
3803 | * ata_host_intr() for each port that is not disabled. | |
3804 | * | |
3805 | * LOCKING: | |
3806 | * Obtains host_set lock during operation. | |
3807 | * | |
3808 | * RETURNS: | |
3809 | * IRQ_NONE or IRQ_HANDLED. | |
3810 | * | |
3811 | */ | |
3812 | ||
3813 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
3814 | { | |
3815 | struct ata_host_set *host_set = dev_instance; | |
3816 | unsigned int i; | |
3817 | unsigned int handled = 0; | |
3818 | unsigned long flags; | |
3819 | ||
3820 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
3821 | spin_lock_irqsave(&host_set->lock, flags); | |
3822 | ||
3823 | for (i = 0; i < host_set->n_ports; i++) { | |
3824 | struct ata_port *ap; | |
3825 | ||
3826 | ap = host_set->ports[i]; | |
3827 | if (ap && | |
3828 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
3829 | struct ata_queued_cmd *qc; | |
3830 | ||
3831 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3832 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && | |
3833 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
3834 | handled |= ata_host_intr(ap, qc); | |
3835 | } | |
3836 | } | |
3837 | ||
3838 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3839 | ||
3840 | return IRQ_RETVAL(handled); | |
3841 | } | |
3842 | ||
3843 | /** | |
3844 | * atapi_packet_task - Write CDB bytes to hardware | |
3845 | * @_data: Port to which ATAPI device is attached. | |
3846 | * | |
3847 | * When device has indicated its readiness to accept | |
3848 | * a CDB, this function is called. Send the CDB. | |
3849 | * If DMA is to be performed, exit immediately. | |
3850 | * Otherwise, we are in polling mode, so poll | |
3851 | * status under operation succeeds or fails. | |
3852 | * | |
3853 | * LOCKING: | |
3854 | * Kernel thread context (may sleep) | |
3855 | */ | |
3856 | ||
3857 | static void atapi_packet_task(void *_data) | |
3858 | { | |
3859 | struct ata_port *ap = _data; | |
3860 | struct ata_queued_cmd *qc; | |
3861 | u8 status; | |
3862 | ||
3863 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3864 | assert(qc != NULL); | |
3865 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3866 | ||
3867 | /* sleep-wait for BSY to clear */ | |
3868 | DPRINTK("busy wait\n"); | |
3869 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) | |
3870 | goto err_out; | |
3871 | ||
3872 | /* make sure DRQ is set */ | |
3873 | status = ata_chk_status(ap); | |
3874 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) | |
3875 | goto err_out; | |
3876 | ||
3877 | /* send SCSI cdb */ | |
3878 | DPRINTK("send cdb\n"); | |
3879 | assert(ap->cdb_len >= 12); | |
3880 | ||
3881 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || | |
3882 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
3883 | unsigned long flags; | |
3884 | ||
3885 | /* Once we're done issuing command and kicking bmdma, | |
3886 | * irq handler takes over. To not lose irq, we need | |
3887 | * to clear NOINTR flag before sending cdb, but | |
3888 | * interrupt handler shouldn't be invoked before we're | |
3889 | * finished. Hence, the following locking. | |
3890 | */ | |
3891 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
3892 | ap->flags &= ~ATA_FLAG_NOINTR; | |
3893 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
3894 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
3895 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3896 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
3897 | } else { | |
3898 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
3899 | ||
3900 | /* PIO commands are handled by polling */ | |
3901 | ap->hsm_task_state = HSM_ST; | |
3902 | queue_work(ata_wq, &ap->pio_task); | |
3903 | } | |
3904 | ||
3905 | return; | |
3906 | ||
3907 | err_out: | |
3908 | ata_poll_qc_complete(qc, ATA_ERR); | |
3909 | } | |
3910 | ||
3911 | ||
3912 | /** | |
3913 | * ata_port_start - Set port up for dma. | |
3914 | * @ap: Port to initialize | |
3915 | * | |
3916 | * Called just after data structures for each port are | |
3917 | * initialized. Allocates space for PRD table. | |
3918 | * | |
3919 | * May be used as the port_start() entry in ata_port_operations. | |
3920 | * | |
3921 | * LOCKING: | |
3922 | */ | |
3923 | ||
3924 | int ata_port_start (struct ata_port *ap) | |
3925 | { | |
3926 | struct device *dev = ap->host_set->dev; | |
3927 | ||
3928 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
3929 | if (!ap->prd) | |
3930 | return -ENOMEM; | |
3931 | ||
3932 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); | |
3933 | ||
3934 | return 0; | |
3935 | } | |
3936 | ||
3937 | ||
3938 | /** | |
3939 | * ata_port_stop - Undo ata_port_start() | |
3940 | * @ap: Port to shut down | |
3941 | * | |
3942 | * Frees the PRD table. | |
3943 | * | |
3944 | * May be used as the port_stop() entry in ata_port_operations. | |
3945 | * | |
3946 | * LOCKING: | |
3947 | */ | |
3948 | ||
3949 | void ata_port_stop (struct ata_port *ap) | |
3950 | { | |
3951 | struct device *dev = ap->host_set->dev; | |
3952 | ||
3953 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
3954 | } | |
3955 | ||
3956 | void ata_host_stop (struct ata_host_set *host_set) | |
3957 | { | |
3958 | if (host_set->mmio_base) | |
3959 | iounmap(host_set->mmio_base); | |
3960 | } | |
3961 | ||
3962 | ||
3963 | /** | |
3964 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
3965 | * @ap: Port to unregister | |
3966 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
3967 | * | |
3968 | * LOCKING: | |
3969 | */ | |
3970 | ||
3971 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
3972 | { | |
3973 | struct Scsi_Host *sh = ap->host; | |
3974 | ||
3975 | DPRINTK("ENTER\n"); | |
3976 | ||
3977 | if (do_unregister) | |
3978 | scsi_remove_host(sh); | |
3979 | ||
3980 | ap->ops->port_stop(ap); | |
3981 | } | |
3982 | ||
3983 | /** | |
3984 | * ata_host_init - Initialize an ata_port structure | |
3985 | * @ap: Structure to initialize | |
3986 | * @host: associated SCSI mid-layer structure | |
3987 | * @host_set: Collection of hosts to which @ap belongs | |
3988 | * @ent: Probe information provided by low-level driver | |
3989 | * @port_no: Port number associated with this ata_port | |
3990 | * | |
3991 | * Initialize a new ata_port structure, and its associated | |
3992 | * scsi_host. | |
3993 | * | |
3994 | * LOCKING: | |
3995 | * Inherited from caller. | |
3996 | * | |
3997 | */ | |
3998 | ||
3999 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4000 | struct ata_host_set *host_set, | |
4001 | struct ata_probe_ent *ent, unsigned int port_no) | |
4002 | { | |
4003 | unsigned int i; | |
4004 | ||
4005 | host->max_id = 16; | |
4006 | host->max_lun = 1; | |
4007 | host->max_channel = 1; | |
4008 | host->unique_id = ata_unique_id++; | |
4009 | host->max_cmd_len = 12; | |
4010 | ||
4011 | scsi_assign_lock(host, &host_set->lock); | |
4012 | ||
4013 | ap->flags = ATA_FLAG_PORT_DISABLED; | |
4014 | ap->id = host->unique_id; | |
4015 | ap->host = host; | |
4016 | ap->ctl = ATA_DEVCTL_OBS; | |
4017 | ap->host_set = host_set; | |
4018 | ap->port_no = port_no; | |
4019 | ap->hard_port_no = | |
4020 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4021 | ap->pio_mask = ent->pio_mask; | |
4022 | ap->mwdma_mask = ent->mwdma_mask; | |
4023 | ap->udma_mask = ent->udma_mask; | |
4024 | ap->flags |= ent->host_flags; | |
4025 | ap->ops = ent->port_ops; | |
4026 | ap->cbl = ATA_CBL_NONE; | |
4027 | ap->active_tag = ATA_TAG_POISON; | |
4028 | ap->last_ctl = 0xFF; | |
4029 | ||
4030 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
4031 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
4032 | ||
4033 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4034 | ap->device[i].devno = i; | |
4035 | ||
4036 | #ifdef ATA_IRQ_TRAP | |
4037 | ap->stats.unhandled_irq = 1; | |
4038 | ap->stats.idle_irq = 1; | |
4039 | #endif | |
4040 | ||
4041 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4042 | } | |
4043 | ||
4044 | /** | |
4045 | * ata_host_add - Attach low-level ATA driver to system | |
4046 | * @ent: Information provided by low-level driver | |
4047 | * @host_set: Collections of ports to which we add | |
4048 | * @port_no: Port number associated with this host | |
4049 | * | |
4050 | * Attach low-level ATA driver to system. | |
4051 | * | |
4052 | * LOCKING: | |
4053 | * PCI/etc. bus probe sem. | |
4054 | * | |
4055 | * RETURNS: | |
4056 | * New ata_port on success, for NULL on error. | |
4057 | * | |
4058 | */ | |
4059 | ||
4060 | static struct ata_port * ata_host_add(struct ata_probe_ent *ent, | |
4061 | struct ata_host_set *host_set, | |
4062 | unsigned int port_no) | |
4063 | { | |
4064 | struct Scsi_Host *host; | |
4065 | struct ata_port *ap; | |
4066 | int rc; | |
4067 | ||
4068 | DPRINTK("ENTER\n"); | |
4069 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4070 | if (!host) | |
4071 | return NULL; | |
4072 | ||
4073 | ap = (struct ata_port *) &host->hostdata[0]; | |
4074 | ||
4075 | ata_host_init(ap, host, host_set, ent, port_no); | |
4076 | ||
4077 | rc = ap->ops->port_start(ap); | |
4078 | if (rc) | |
4079 | goto err_out; | |
4080 | ||
4081 | return ap; | |
4082 | ||
4083 | err_out: | |
4084 | scsi_host_put(host); | |
4085 | return NULL; | |
4086 | } | |
4087 | ||
4088 | /** | |
4089 | * ata_device_add - Register hardware device with ATA and SCSI layers | |
4090 | * @ent: Probe information describing hardware device to be registered | |
4091 | * | |
4092 | * This function processes the information provided in the probe | |
4093 | * information struct @ent, allocates the necessary ATA and SCSI | |
4094 | * host information structures, initializes them, and registers | |
4095 | * everything with requisite kernel subsystems. | |
4096 | * | |
4097 | * This function requests irqs, probes the ATA bus, and probes | |
4098 | * the SCSI bus. | |
4099 | * | |
4100 | * LOCKING: | |
4101 | * PCI/etc. bus probe sem. | |
4102 | * | |
4103 | * RETURNS: | |
4104 | * Number of ports registered. Zero on error (no ports registered). | |
4105 | * | |
4106 | */ | |
4107 | ||
4108 | int ata_device_add(struct ata_probe_ent *ent) | |
4109 | { | |
4110 | unsigned int count = 0, i; | |
4111 | struct device *dev = ent->dev; | |
4112 | struct ata_host_set *host_set; | |
4113 | ||
4114 | DPRINTK("ENTER\n"); | |
4115 | /* alloc a container for our list of ATA ports (buses) */ | |
4116 | host_set = kmalloc(sizeof(struct ata_host_set) + | |
4117 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
4118 | if (!host_set) | |
4119 | return 0; | |
4120 | memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *))); | |
4121 | spin_lock_init(&host_set->lock); | |
4122 | ||
4123 | host_set->dev = dev; | |
4124 | host_set->n_ports = ent->n_ports; | |
4125 | host_set->irq = ent->irq; | |
4126 | host_set->mmio_base = ent->mmio_base; | |
4127 | host_set->private_data = ent->private_data; | |
4128 | host_set->ops = ent->port_ops; | |
4129 | ||
4130 | /* register each port bound to this device */ | |
4131 | for (i = 0; i < ent->n_ports; i++) { | |
4132 | struct ata_port *ap; | |
4133 | unsigned long xfer_mode_mask; | |
4134 | ||
4135 | ap = ata_host_add(ent, host_set, i); | |
4136 | if (!ap) | |
4137 | goto err_out; | |
4138 | ||
4139 | host_set->ports[i] = ap; | |
4140 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4141 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4142 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4143 | ||
4144 | /* print per-port info to dmesg */ | |
4145 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4146 | "bmdma 0x%lX irq %lu\n", | |
4147 | ap->id, | |
4148 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4149 | ata_mode_string(xfer_mode_mask), | |
4150 | ap->ioaddr.cmd_addr, | |
4151 | ap->ioaddr.ctl_addr, | |
4152 | ap->ioaddr.bmdma_addr, | |
4153 | ent->irq); | |
4154 | ||
4155 | ata_chk_status(ap); | |
4156 | host_set->ops->irq_clear(ap); | |
4157 | count++; | |
4158 | } | |
4159 | ||
4160 | if (!count) { | |
4161 | kfree(host_set); | |
4162 | return 0; | |
4163 | } | |
4164 | ||
4165 | /* obtain irq, that is shared between channels */ | |
4166 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4167 | DRV_NAME, host_set)) | |
4168 | goto err_out; | |
4169 | ||
4170 | /* perform each probe synchronously */ | |
4171 | DPRINTK("probe begin\n"); | |
4172 | for (i = 0; i < count; i++) { | |
4173 | struct ata_port *ap; | |
4174 | int rc; | |
4175 | ||
4176 | ap = host_set->ports[i]; | |
4177 | ||
4178 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4179 | rc = ata_bus_probe(ap); | |
4180 | DPRINTK("ata%u: probe end\n", ap->id); | |
4181 | ||
4182 | if (rc) { | |
4183 | /* FIXME: do something useful here? | |
4184 | * Current libata behavior will | |
4185 | * tear down everything when | |
4186 | * the module is removed | |
4187 | * or the h/w is unplugged. | |
4188 | */ | |
4189 | } | |
4190 | ||
4191 | rc = scsi_add_host(ap->host, dev); | |
4192 | if (rc) { | |
4193 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4194 | ap->id); | |
4195 | /* FIXME: do something useful here */ | |
4196 | /* FIXME: handle unconditional calls to | |
4197 | * scsi_scan_host and ata_host_remove, below, | |
4198 | * at the very least | |
4199 | */ | |
4200 | } | |
4201 | } | |
4202 | ||
4203 | /* probes are done, now scan each port's disk(s) */ | |
4204 | DPRINTK("probe begin\n"); | |
4205 | for (i = 0; i < count; i++) { | |
4206 | struct ata_port *ap = host_set->ports[i]; | |
4207 | ||
4208 | ata_scsi_scan_host(ap); | |
4209 | } | |
4210 | ||
4211 | dev_set_drvdata(dev, host_set); | |
4212 | ||
4213 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4214 | return ent->n_ports; /* success */ | |
4215 | ||
4216 | err_out: | |
4217 | for (i = 0; i < count; i++) { | |
4218 | ata_host_remove(host_set->ports[i], 1); | |
4219 | scsi_host_put(host_set->ports[i]->host); | |
4220 | } | |
4221 | kfree(host_set); | |
4222 | VPRINTK("EXIT, returning 0\n"); | |
4223 | return 0; | |
4224 | } | |
4225 | ||
4226 | /** | |
4227 | * ata_host_set_remove - PCI layer callback for device removal | |
4228 | * @host_set: ATA host set that was removed | |
4229 | * | |
4230 | * Unregister all objects associated with this host set. Free those | |
4231 | * objects. | |
4232 | * | |
4233 | * LOCKING: | |
4234 | * Inherited from calling layer (may sleep). | |
4235 | */ | |
4236 | ||
4237 | ||
4238 | void ata_host_set_remove(struct ata_host_set *host_set) | |
4239 | { | |
4240 | struct ata_port *ap; | |
4241 | unsigned int i; | |
4242 | ||
4243 | for (i = 0; i < host_set->n_ports; i++) { | |
4244 | ap = host_set->ports[i]; | |
4245 | scsi_remove_host(ap->host); | |
4246 | } | |
4247 | ||
4248 | free_irq(host_set->irq, host_set); | |
4249 | ||
4250 | for (i = 0; i < host_set->n_ports; i++) { | |
4251 | ap = host_set->ports[i]; | |
4252 | ||
4253 | ata_scsi_release(ap->host); | |
4254 | ||
4255 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4256 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4257 | ||
4258 | if (ioaddr->cmd_addr == 0x1f0) | |
4259 | release_region(0x1f0, 8); | |
4260 | else if (ioaddr->cmd_addr == 0x170) | |
4261 | release_region(0x170, 8); | |
4262 | } | |
4263 | ||
4264 | scsi_host_put(ap->host); | |
4265 | } | |
4266 | ||
4267 | if (host_set->ops->host_stop) | |
4268 | host_set->ops->host_stop(host_set); | |
4269 | ||
4270 | kfree(host_set); | |
4271 | } | |
4272 | ||
4273 | /** | |
4274 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4275 | * @host: libata host to be unloaded | |
4276 | * | |
4277 | * Performs all duties necessary to shut down a libata port... | |
4278 | * Kill port kthread, disable port, and release resources. | |
4279 | * | |
4280 | * LOCKING: | |
4281 | * Inherited from SCSI layer. | |
4282 | * | |
4283 | * RETURNS: | |
4284 | * One. | |
4285 | */ | |
4286 | ||
4287 | int ata_scsi_release(struct Scsi_Host *host) | |
4288 | { | |
4289 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4290 | ||
4291 | DPRINTK("ENTER\n"); | |
4292 | ||
4293 | ap->ops->port_disable(ap); | |
4294 | ata_host_remove(ap, 0); | |
4295 | ||
4296 | DPRINTK("EXIT\n"); | |
4297 | return 1; | |
4298 | } | |
4299 | ||
4300 | /** | |
4301 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4302 | * @ioaddr: IO address structure to be initialized | |
4303 | * | |
4304 | * Utility function which initializes data_addr, error_addr, | |
4305 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4306 | * device_addr, status_addr, and command_addr to standard offsets | |
4307 | * relative to cmd_addr. | |
4308 | * | |
4309 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
4310 | */ | |
4311 | ||
4312 | void ata_std_ports(struct ata_ioports *ioaddr) | |
4313 | { | |
4314 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4315 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4316 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4317 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4318 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4319 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4320 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4321 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4322 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4323 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4324 | } | |
4325 | ||
4326 | static struct ata_probe_ent * | |
4327 | ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) | |
4328 | { | |
4329 | struct ata_probe_ent *probe_ent; | |
4330 | ||
4331 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
4332 | if (!probe_ent) { | |
4333 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4334 | kobject_name(&(dev->kobj))); | |
4335 | return NULL; | |
4336 | } | |
4337 | ||
4338 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
4339 | ||
4340 | INIT_LIST_HEAD(&probe_ent->node); | |
4341 | probe_ent->dev = dev; | |
4342 | ||
4343 | probe_ent->sht = port->sht; | |
4344 | probe_ent->host_flags = port->host_flags; | |
4345 | probe_ent->pio_mask = port->pio_mask; | |
4346 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4347 | probe_ent->udma_mask = port->udma_mask; | |
4348 | probe_ent->port_ops = port->port_ops; | |
4349 | ||
4350 | return probe_ent; | |
4351 | } | |
4352 | ||
4353 | ||
4354 | ||
4355 | #ifdef CONFIG_PCI | |
4356 | ||
4357 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4358 | { | |
4359 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4360 | ||
4361 | pci_iounmap(pdev, host_set->mmio_base); | |
4362 | } | |
4363 | ||
4364 | /** | |
4365 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4366 | * @pdev: pci device to be initialized | |
4367 | * @port: array[2] of pointers to port info structures. | |
4368 | * @ports: bitmap of ports present | |
4369 | * | |
4370 | * Utility function which allocates and initializes an | |
4371 | * ata_probe_ent structure for a standard dual-port | |
4372 | * PIO-based IDE controller. The returned ata_probe_ent | |
4373 | * structure can be passed to ata_device_add(). The returned | |
4374 | * ata_probe_ent structure should then be freed with kfree(). | |
4375 | * | |
4376 | * The caller need only pass the address of the primary port, the | |
4377 | * secondary will be deduced automatically. If the device has non | |
4378 | * standard secondary port mappings this function can be called twice, | |
4379 | * once for each interface. | |
4380 | */ | |
4381 | ||
4382 | struct ata_probe_ent * | |
4383 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) | |
4384 | { | |
4385 | struct ata_probe_ent *probe_ent = | |
4386 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4387 | int p = 0; | |
4388 | ||
4389 | if (!probe_ent) | |
4390 | return NULL; | |
4391 | ||
4392 | probe_ent->irq = pdev->irq; | |
4393 | probe_ent->irq_flags = SA_SHIRQ; | |
4394 | ||
4395 | if (ports & ATA_PORT_PRIMARY) { | |
4396 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4397 | probe_ent->port[p].altstatus_addr = | |
4398 | probe_ent->port[p].ctl_addr = | |
4399 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4400 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4401 | ata_std_ports(&probe_ent->port[p]); | |
4402 | p++; | |
4403 | } | |
4404 | ||
4405 | if (ports & ATA_PORT_SECONDARY) { | |
4406 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4407 | probe_ent->port[p].altstatus_addr = | |
4408 | probe_ent->port[p].ctl_addr = | |
4409 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4410 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4411 | ata_std_ports(&probe_ent->port[p]); | |
4412 | p++; | |
4413 | } | |
4414 | ||
4415 | probe_ent->n_ports = p; | |
4416 | return probe_ent; | |
4417 | } | |
4418 | ||
4419 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num) | |
4420 | { | |
4421 | struct ata_probe_ent *probe_ent; | |
4422 | ||
4423 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4424 | if (!probe_ent) | |
4425 | return NULL; | |
4426 | ||
4427 | ||
4428 | probe_ent->legacy_mode = 1; | |
4429 | probe_ent->n_ports = 1; | |
4430 | probe_ent->hard_port_no = port_num; | |
4431 | ||
4432 | switch(port_num) | |
4433 | { | |
4434 | case 0: | |
4435 | probe_ent->irq = 14; | |
4436 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4437 | probe_ent->port[0].altstatus_addr = | |
4438 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4439 | break; | |
4440 | case 1: | |
4441 | probe_ent->irq = 15; | |
4442 | probe_ent->port[0].cmd_addr = 0x170; | |
4443 | probe_ent->port[0].altstatus_addr = | |
4444 | probe_ent->port[0].ctl_addr = 0x376; | |
4445 | break; | |
4446 | } | |
4447 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
4448 | ata_std_ports(&probe_ent->port[0]); | |
4449 | return probe_ent; | |
4450 | } | |
4451 | ||
4452 | /** | |
4453 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4454 | * @pdev: Controller to be initialized | |
4455 | * @port_info: Information from low-level host driver | |
4456 | * @n_ports: Number of ports attached to host controller | |
4457 | * | |
4458 | * This is a helper function which can be called from a driver's | |
4459 | * xxx_init_one() probe function if the hardware uses traditional | |
4460 | * IDE taskfile registers. | |
4461 | * | |
4462 | * This function calls pci_enable_device(), reserves its register | |
4463 | * regions, sets the dma mask, enables bus master mode, and calls | |
4464 | * ata_device_add() | |
4465 | * | |
4466 | * LOCKING: | |
4467 | * Inherited from PCI layer (may sleep). | |
4468 | * | |
4469 | * RETURNS: | |
4470 | * Zero on success, negative on errno-based value on error. | |
4471 | * | |
4472 | */ | |
4473 | ||
4474 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4475 | unsigned int n_ports) | |
4476 | { | |
4477 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; | |
4478 | struct ata_port_info *port[2]; | |
4479 | u8 tmp8, mask; | |
4480 | unsigned int legacy_mode = 0; | |
4481 | int disable_dev_on_err = 1; | |
4482 | int rc; | |
4483 | ||
4484 | DPRINTK("ENTER\n"); | |
4485 | ||
4486 | port[0] = port_info[0]; | |
4487 | if (n_ports > 1) | |
4488 | port[1] = port_info[1]; | |
4489 | else | |
4490 | port[1] = port[0]; | |
4491 | ||
4492 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4493 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
4494 | /* TODO: What if one channel is in native mode ... */ | |
4495 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); | |
4496 | mask = (1 << 2) | (1 << 0); | |
4497 | if ((tmp8 & mask) != mask) | |
4498 | legacy_mode = (1 << 3); | |
4499 | } | |
4500 | ||
4501 | /* FIXME... */ | |
4502 | if ((!legacy_mode) && (n_ports > 2)) { | |
4503 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4504 | n_ports = 2; | |
4505 | /* For now */ | |
4506 | } | |
4507 | ||
4508 | /* FIXME: Really for ATA it isn't safe because the device may be | |
4509 | multi-purpose and we want to leave it alone if it was already | |
4510 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4511 | ||
4512 | Checking dev->is_enabled is insufficient as this is not set at | |
4513 | boot for the primary video which is BIOS enabled | |
4514 | */ | |
4515 | ||
4516 | rc = pci_enable_device(pdev); | |
4517 | if (rc) | |
4518 | return rc; | |
4519 | ||
4520 | rc = pci_request_regions(pdev, DRV_NAME); | |
4521 | if (rc) { | |
4522 | disable_dev_on_err = 0; | |
4523 | goto err_out; | |
4524 | } | |
4525 | ||
4526 | /* FIXME: Should use platform specific mappers for legacy port ranges */ | |
4527 | if (legacy_mode) { | |
4528 | if (!request_region(0x1f0, 8, "libata")) { | |
4529 | struct resource *conflict, res; | |
4530 | res.start = 0x1f0; | |
4531 | res.end = 0x1f0 + 8 - 1; | |
4532 | conflict = ____request_resource(&ioport_resource, &res); | |
4533 | if (!strcmp(conflict->name, "libata")) | |
4534 | legacy_mode |= (1 << 0); | |
4535 | else { | |
4536 | disable_dev_on_err = 0; | |
4537 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4538 | } | |
4539 | } else | |
4540 | legacy_mode |= (1 << 0); | |
4541 | ||
4542 | if (!request_region(0x170, 8, "libata")) { | |
4543 | struct resource *conflict, res; | |
4544 | res.start = 0x170; | |
4545 | res.end = 0x170 + 8 - 1; | |
4546 | conflict = ____request_resource(&ioport_resource, &res); | |
4547 | if (!strcmp(conflict->name, "libata")) | |
4548 | legacy_mode |= (1 << 1); | |
4549 | else { | |
4550 | disable_dev_on_err = 0; | |
4551 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4552 | } | |
4553 | } else | |
4554 | legacy_mode |= (1 << 1); | |
4555 | } | |
4556 | ||
4557 | /* we have legacy mode, but all ports are unavailable */ | |
4558 | if (legacy_mode == (1 << 3)) { | |
4559 | rc = -EBUSY; | |
4560 | goto err_out_regions; | |
4561 | } | |
4562 | ||
4563 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4564 | if (rc) | |
4565 | goto err_out_regions; | |
4566 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4567 | if (rc) | |
4568 | goto err_out_regions; | |
4569 | ||
4570 | if (legacy_mode) { | |
4571 | if (legacy_mode & (1 << 0)) | |
4572 | probe_ent = ata_pci_init_legacy_port(pdev, port, 0); | |
4573 | if (legacy_mode & (1 << 1)) | |
4574 | probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1); | |
4575 | } else { | |
4576 | if (n_ports == 2) | |
4577 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4578 | else | |
4579 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4580 | } | |
4581 | if (!probe_ent && !probe_ent2) { | |
4582 | rc = -ENOMEM; | |
4583 | goto err_out_regions; | |
4584 | } | |
4585 | ||
4586 | pci_set_master(pdev); | |
4587 | ||
4588 | /* FIXME: check ata_device_add return */ | |
4589 | if (legacy_mode) { | |
4590 | if (legacy_mode & (1 << 0)) | |
4591 | ata_device_add(probe_ent); | |
4592 | if (legacy_mode & (1 << 1)) | |
4593 | ata_device_add(probe_ent2); | |
4594 | } else | |
4595 | ata_device_add(probe_ent); | |
4596 | ||
4597 | kfree(probe_ent); | |
4598 | kfree(probe_ent2); | |
4599 | ||
4600 | return 0; | |
4601 | ||
4602 | err_out_regions: | |
4603 | if (legacy_mode & (1 << 0)) | |
4604 | release_region(0x1f0, 8); | |
4605 | if (legacy_mode & (1 << 1)) | |
4606 | release_region(0x170, 8); | |
4607 | pci_release_regions(pdev); | |
4608 | err_out: | |
4609 | if (disable_dev_on_err) | |
4610 | pci_disable_device(pdev); | |
4611 | return rc; | |
4612 | } | |
4613 | ||
4614 | /** | |
4615 | * ata_pci_remove_one - PCI layer callback for device removal | |
4616 | * @pdev: PCI device that was removed | |
4617 | * | |
4618 | * PCI layer indicates to libata via this hook that | |
4619 | * hot-unplug or module unload event has occured. | |
4620 | * Handle this by unregistering all objects associated | |
4621 | * with this PCI device. Free those objects. Then finally | |
4622 | * release PCI resources and disable device. | |
4623 | * | |
4624 | * LOCKING: | |
4625 | * Inherited from PCI layer (may sleep). | |
4626 | */ | |
4627 | ||
4628 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4629 | { | |
4630 | struct device *dev = pci_dev_to_dev(pdev); | |
4631 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
4632 | ||
4633 | ata_host_set_remove(host_set); | |
4634 | pci_release_regions(pdev); | |
4635 | pci_disable_device(pdev); | |
4636 | dev_set_drvdata(dev, NULL); | |
4637 | } | |
4638 | ||
4639 | /* move to PCI subsystem */ | |
4640 | int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) | |
4641 | { | |
4642 | unsigned long tmp = 0; | |
4643 | ||
4644 | switch (bits->width) { | |
4645 | case 1: { | |
4646 | u8 tmp8 = 0; | |
4647 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4648 | tmp = tmp8; | |
4649 | break; | |
4650 | } | |
4651 | case 2: { | |
4652 | u16 tmp16 = 0; | |
4653 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4654 | tmp = tmp16; | |
4655 | break; | |
4656 | } | |
4657 | case 4: { | |
4658 | u32 tmp32 = 0; | |
4659 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
4660 | tmp = tmp32; | |
4661 | break; | |
4662 | } | |
4663 | ||
4664 | default: | |
4665 | return -EINVAL; | |
4666 | } | |
4667 | ||
4668 | tmp &= bits->mask; | |
4669 | ||
4670 | return (tmp == bits->val) ? 1 : 0; | |
4671 | } | |
4672 | #endif /* CONFIG_PCI */ | |
4673 | ||
4674 | ||
4675 | static int __init ata_init(void) | |
4676 | { | |
4677 | ata_wq = create_workqueue("ata"); | |
4678 | if (!ata_wq) | |
4679 | return -ENOMEM; | |
4680 | ||
4681 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
4682 | return 0; | |
4683 | } | |
4684 | ||
4685 | static void __exit ata_exit(void) | |
4686 | { | |
4687 | destroy_workqueue(ata_wq); | |
4688 | } | |
4689 | ||
4690 | module_init(ata_init); | |
4691 | module_exit(ata_exit); | |
4692 | ||
4693 | static unsigned long ratelimit_time; | |
4694 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
4695 | ||
4696 | int ata_ratelimit(void) | |
4697 | { | |
4698 | int rc; | |
4699 | unsigned long flags; | |
4700 | ||
4701 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
4702 | ||
4703 | if (time_after(jiffies, ratelimit_time)) { | |
4704 | rc = 1; | |
4705 | ratelimit_time = jiffies + (HZ/5); | |
4706 | } else | |
4707 | rc = 0; | |
4708 | ||
4709 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
4710 | ||
4711 | return rc; | |
4712 | } | |
4713 | ||
4714 | /* | |
4715 | * libata is essentially a library of internal helper functions for | |
4716 | * low-level ATA host controller drivers. As such, the API/ABI is | |
4717 | * likely to change as new drivers are added and updated. | |
4718 | * Do not depend on ABI/API stability. | |
4719 | */ | |
4720 | ||
4721 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
4722 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
4723 | EXPORT_SYMBOL_GPL(ata_device_add); | |
4724 | EXPORT_SYMBOL_GPL(ata_host_set_remove); | |
4725 | EXPORT_SYMBOL_GPL(ata_sg_init); | |
4726 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
4727 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
4728 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
4729 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
4730 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
4731 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
4732 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
4733 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
4734 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
4735 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
4736 | EXPORT_SYMBOL_GPL(ata_check_status); | |
4737 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
4738 | EXPORT_SYMBOL_GPL(ata_chk_err); | |
4739 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
4740 | EXPORT_SYMBOL_GPL(ata_port_start); | |
4741 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
4742 | EXPORT_SYMBOL_GPL(ata_host_stop); | |
4743 | EXPORT_SYMBOL_GPL(ata_interrupt); | |
4744 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
4745 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
4746 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
4747 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
4748 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
4749 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
4750 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
4751 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
4752 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
4753 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
4754 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
4755 | EXPORT_SYMBOL_GPL(ata_ratelimit); | |
4756 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); | |
4757 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
4758 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
4759 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
4760 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
4761 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
4762 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
4763 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
4764 | EXPORT_SYMBOL_GPL(ata_dev_config); | |
4765 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); | |
4766 | ||
4767 | #ifdef CONFIG_PCI | |
4768 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
4769 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); | |
4770 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); | |
4771 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
4772 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
4773 | #endif /* CONFIG_PCI */ |