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1 | /* SPDX-License-Identifier: GPL-2.0 */ | |
2 | /* | |
3 | * Thunderbolt Cactus Ridge driver - NHI driver | |
4 | * | |
5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> | |
6 | */ | |
7 | ||
8 | #ifndef DSL3510_H_ | |
9 | #define DSL3510_H_ | |
10 | ||
11 | #include <linux/thunderbolt.h> | |
12 | ||
13 | enum nhi_fw_mode { | |
14 | NHI_FW_SAFE_MODE, | |
15 | NHI_FW_AUTH_MODE, | |
16 | NHI_FW_EP_MODE, | |
17 | NHI_FW_CM_MODE, | |
18 | }; | |
19 | ||
20 | enum nhi_mailbox_cmd { | |
21 | NHI_MAILBOX_SAVE_DEVS = 0x05, | |
22 | NHI_MAILBOX_DISCONNECT_PCIE_PATHS = 0x06, | |
23 | NHI_MAILBOX_DRV_UNLOADS = 0x07, | |
24 | NHI_MAILBOX_DISCONNECT_PA = 0x10, | |
25 | NHI_MAILBOX_DISCONNECT_PB = 0x11, | |
26 | NHI_MAILBOX_ALLOW_ALL_DEVS = 0x23, | |
27 | }; | |
28 | ||
29 | int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data); | |
30 | enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi); | |
31 | ||
32 | /* | |
33 | * PCI IDs used in this driver from Win Ridge forward. There is no | |
34 | * need for the PCI quirk anymore as we will use ICM also on Apple | |
35 | * hardware. | |
36 | */ | |
37 | #define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_NHI 0x157d | |
38 | #define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE 0x157e | |
39 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI 0x15bf | |
40 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE 0x15c0 | |
41 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI 0x15d2 | |
42 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE 0x15d3 | |
43 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI 0x15d9 | |
44 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE 0x15da | |
45 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI 0x15dc | |
46 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI 0x15dd | |
47 | #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI 0x15de | |
48 | #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE 0x15e7 | |
49 | #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI 0x15e8 | |
50 | #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE 0x15ea | |
51 | #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI 0x15eb | |
52 | #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE 0x15ef | |
53 | ||
54 | #endif |