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1 | /* | |
2 | * QEMU Bochs-style debug console ("port E9") emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2008 Citrix Systems, Inc. | |
6 | * Copyright (c) Intel Corporation; author: H. Peter Anvin | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
26 | ||
27 | #include "hw/hw.h" | |
28 | #include "sysemu/char.h" | |
29 | #include "hw/isa/isa.h" | |
30 | #include "hw/i386/pc.h" | |
31 | ||
32 | #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon" | |
33 | #define ISA_DEBUGCON_DEVICE(obj) \ | |
34 | OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE) | |
35 | ||
36 | //#define DEBUG_DEBUGCON | |
37 | ||
38 | typedef struct DebugconState { | |
39 | MemoryRegion io; | |
40 | CharDriverState *chr; | |
41 | uint32_t readback; | |
42 | } DebugconState; | |
43 | ||
44 | typedef struct ISADebugconState { | |
45 | ISADevice parent_obj; | |
46 | ||
47 | uint32_t iobase; | |
48 | DebugconState state; | |
49 | } ISADebugconState; | |
50 | ||
51 | static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val, | |
52 | unsigned width) | |
53 | { | |
54 | DebugconState *s = opaque; | |
55 | unsigned char ch = val; | |
56 | ||
57 | #ifdef DEBUG_DEBUGCON | |
58 | printf(" [debugcon: write addr=0x%04" HWADDR_PRIx " val=0x%02" PRIx64 "]\n", addr, val); | |
59 | #endif | |
60 | ||
61 | qemu_chr_fe_write(s->chr, &ch, 1); | |
62 | } | |
63 | ||
64 | ||
65 | static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width) | |
66 | { | |
67 | DebugconState *s = opaque; | |
68 | ||
69 | #ifdef DEBUG_DEBUGCON | |
70 | printf("debugcon: read addr=0x%04" HWADDR_PRIx "\n", addr); | |
71 | #endif | |
72 | ||
73 | return s->readback; | |
74 | } | |
75 | ||
76 | static const MemoryRegionOps debugcon_ops = { | |
77 | .read = debugcon_ioport_read, | |
78 | .write = debugcon_ioport_write, | |
79 | .valid.min_access_size = 1, | |
80 | .valid.max_access_size = 1, | |
81 | .endianness = DEVICE_LITTLE_ENDIAN, | |
82 | }; | |
83 | ||
84 | static void debugcon_realize_core(DebugconState *s, Error **errp) | |
85 | { | |
86 | if (!s->chr) { | |
87 | error_setg(errp, "Can't create debugcon device, empty char device"); | |
88 | return; | |
89 | } | |
90 | ||
91 | qemu_chr_add_handlers(s->chr, NULL, NULL, NULL, s); | |
92 | } | |
93 | ||
94 | static void debugcon_isa_realizefn(DeviceState *dev, Error **errp) | |
95 | { | |
96 | ISADevice *d = ISA_DEVICE(dev); | |
97 | ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev); | |
98 | DebugconState *s = &isa->state; | |
99 | Error *err = NULL; | |
100 | ||
101 | debugcon_realize_core(s, &err); | |
102 | if (err != NULL) { | |
103 | error_propagate(errp, err); | |
104 | return; | |
105 | } | |
106 | memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s, | |
107 | TYPE_ISA_DEBUGCON_DEVICE, 1); | |
108 | memory_region_add_subregion(isa_address_space_io(d), | |
109 | isa->iobase, &s->io); | |
110 | } | |
111 | ||
112 | static Property debugcon_isa_properties[] = { | |
113 | DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9), | |
114 | DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr), | |
115 | DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9), | |
116 | DEFINE_PROP_END_OF_LIST(), | |
117 | }; | |
118 | ||
119 | static void debugcon_isa_class_initfn(ObjectClass *klass, void *data) | |
120 | { | |
121 | DeviceClass *dc = DEVICE_CLASS(klass); | |
122 | ||
123 | dc->realize = debugcon_isa_realizefn; | |
124 | dc->props = debugcon_isa_properties; | |
125 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); | |
126 | } | |
127 | ||
128 | static const TypeInfo debugcon_isa_info = { | |
129 | .name = TYPE_ISA_DEBUGCON_DEVICE, | |
130 | .parent = TYPE_ISA_DEVICE, | |
131 | .instance_size = sizeof(ISADebugconState), | |
132 | .class_init = debugcon_isa_class_initfn, | |
133 | }; | |
134 | ||
135 | static void debugcon_register_types(void) | |
136 | { | |
137 | type_register_static(&debugcon_isa_info); | |
138 | } | |
139 | ||
140 | type_init(debugcon_register_types) |