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1 | /* | |
2 | * QEMU HPPA hardware system emulator. | |
3 | * Copyright 2018 Helge Deller <deller@gmx.de> | |
4 | */ | |
5 | ||
6 | #include "qemu/osdep.h" | |
7 | #include "qemu/datadir.h" | |
8 | #include "cpu.h" | |
9 | #include "elf.h" | |
10 | #include "hw/loader.h" | |
11 | #include "qemu/error-report.h" | |
12 | #include "sysemu/reset.h" | |
13 | #include "sysemu/sysemu.h" | |
14 | #include "sysemu/runstate.h" | |
15 | #include "hw/rtc/mc146818rtc.h" | |
16 | #include "hw/timer/i8254.h" | |
17 | #include "hw/char/serial.h" | |
18 | #include "hw/net/lasi_82596.h" | |
19 | #include "hw/nmi.h" | |
20 | #include "hw/pci-host/dino.h" | |
21 | #include "hppa_sys.h" | |
22 | #include "qemu/units.h" | |
23 | #include "qapi/error.h" | |
24 | #include "net/net.h" | |
25 | #include "qemu/log.h" | |
26 | #include "net/net.h" | |
27 | ||
28 | #define MAX_IDE_BUS 2 | |
29 | ||
30 | #define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */ | |
31 | ||
32 | #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) | |
33 | ||
34 | static void hppa_powerdown_req(Notifier *n, void *opaque) | |
35 | { | |
36 | hwaddr soft_power_reg = HPA_POWER_BUTTON; | |
37 | uint32_t val; | |
38 | ||
39 | val = ldl_be_phys(&address_space_memory, soft_power_reg); | |
40 | if ((val >> 8) == 0) { | |
41 | /* immediately shut down when under hardware control */ | |
42 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); | |
43 | return; | |
44 | } | |
45 | ||
46 | /* clear bit 31 to indicate that the power switch was pressed. */ | |
47 | val &= ~1; | |
48 | stl_be_phys(&address_space_memory, soft_power_reg, val); | |
49 | } | |
50 | ||
51 | static Notifier hppa_system_powerdown_notifier = { | |
52 | .notify = hppa_powerdown_req | |
53 | }; | |
54 | ||
55 | ||
56 | static ISABus *hppa_isa_bus(void) | |
57 | { | |
58 | ISABus *isa_bus; | |
59 | qemu_irq *isa_irqs; | |
60 | MemoryRegion *isa_region; | |
61 | ||
62 | isa_region = g_new(MemoryRegion, 1); | |
63 | memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, | |
64 | NULL, "isa-io", 0x800); | |
65 | memory_region_add_subregion(get_system_memory(), IDE_HPA, | |
66 | isa_region); | |
67 | ||
68 | isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, | |
69 | &error_abort); | |
70 | isa_irqs = i8259_init(isa_bus, | |
71 | /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */ | |
72 | NULL); | |
73 | isa_bus_irqs(isa_bus, isa_irqs); | |
74 | ||
75 | return isa_bus; | |
76 | } | |
77 | ||
78 | static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) | |
79 | { | |
80 | addr &= (0x10000000 - 1); | |
81 | return addr; | |
82 | } | |
83 | ||
84 | static HPPACPU *cpu[HPPA_MAX_CPUS]; | |
85 | static uint64_t firmware_entry; | |
86 | ||
87 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, | |
88 | Error **errp) | |
89 | { | |
90 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
91 | } | |
92 | ||
93 | static FWCfgState *create_fw_cfg(MachineState *ms) | |
94 | { | |
95 | FWCfgState *fw_cfg; | |
96 | uint64_t val; | |
97 | ||
98 | fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); | |
99 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); | |
100 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); | |
101 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); | |
102 | ||
103 | val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); | |
104 | fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", | |
105 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
106 | ||
107 | val = cpu_to_le64(HPPA_TLB_ENTRIES); | |
108 | fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", | |
109 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
110 | ||
111 | val = cpu_to_le64(HPPA_BTLB_ENTRIES); | |
112 | fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", | |
113 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
114 | ||
115 | val = cpu_to_le64(HPA_POWER_BUTTON); | |
116 | fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", | |
117 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
118 | ||
119 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]); | |
120 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); | |
121 | ||
122 | return fw_cfg; | |
123 | } | |
124 | ||
125 | static DinoState *dino_init(MemoryRegion *addr_space) | |
126 | { | |
127 | DeviceState *dev; | |
128 | ||
129 | dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); | |
130 | object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), | |
131 | &error_fatal); | |
132 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | |
133 | ||
134 | return DINO_PCI_HOST_BRIDGE(dev); | |
135 | } | |
136 | ||
137 | static void machine_hppa_init(MachineState *machine) | |
138 | { | |
139 | const char *kernel_filename = machine->kernel_filename; | |
140 | const char *kernel_cmdline = machine->kernel_cmdline; | |
141 | const char *initrd_filename = machine->initrd_filename; | |
142 | DeviceState *dev, *dino_dev, *lasi_dev; | |
143 | PCIBus *pci_bus; | |
144 | ISABus *isa_bus; | |
145 | char *firmware_filename; | |
146 | uint64_t firmware_low, firmware_high; | |
147 | long size; | |
148 | uint64_t kernel_entry = 0, kernel_low, kernel_high; | |
149 | MemoryRegion *addr_space = get_system_memory(); | |
150 | MemoryRegion *rom_region; | |
151 | MemoryRegion *cpu_region; | |
152 | long i; | |
153 | unsigned int smp_cpus = machine->smp.cpus; | |
154 | SysBusDevice *s; | |
155 | ||
156 | /* Create CPUs. */ | |
157 | for (i = 0; i < smp_cpus; i++) { | |
158 | char *name = g_strdup_printf("cpu%ld-io-eir", i); | |
159 | cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); | |
160 | ||
161 | cpu_region = g_new(MemoryRegion, 1); | |
162 | memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, | |
163 | cpu[i], name, 4); | |
164 | memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, | |
165 | cpu_region); | |
166 | g_free(name); | |
167 | } | |
168 | ||
169 | /* Main memory region. */ | |
170 | if (machine->ram_size > 3 * GiB) { | |
171 | error_report("RAM size is currently restricted to 3GB"); | |
172 | exit(EXIT_FAILURE); | |
173 | } | |
174 | memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); | |
175 | ||
176 | ||
177 | /* Init Lasi chip */ | |
178 | lasi_dev = lasi_initfn(addr_space); | |
179 | memory_region_add_subregion(addr_space, LASI_HPA, | |
180 | sysbus_mmio_get_region( | |
181 | SYS_BUS_DEVICE(lasi_dev), 0)); | |
182 | ||
183 | /* Init Dino (PCI host bus chip). */ | |
184 | dino_dev = DEVICE(dino_init(addr_space)); | |
185 | memory_region_add_subregion(addr_space, DINO_HPA, | |
186 | sysbus_mmio_get_region( | |
187 | SYS_BUS_DEVICE(dino_dev), 0)); | |
188 | pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); | |
189 | assert(pci_bus); | |
190 | ||
191 | /* Create ISA bus. */ | |
192 | isa_bus = hppa_isa_bus(); | |
193 | assert(isa_bus); | |
194 | ||
195 | /* Realtime clock, used by firmware for PDC_TOD call. */ | |
196 | mc146818_rtc_init(isa_bus, 2000, NULL); | |
197 | ||
198 | /* Serial code setup. */ | |
199 | if (serial_hd(0)) { | |
200 | uint32_t addr = DINO_UART_HPA + 0x800; | |
201 | serial_mm_init(addr_space, addr, 0, | |
202 | qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), | |
203 | 115200, serial_hd(0), DEVICE_BIG_ENDIAN); | |
204 | } | |
205 | ||
206 | /* fw_cfg configuration interface */ | |
207 | create_fw_cfg(machine); | |
208 | ||
209 | /* SCSI disk setup. */ | |
210 | dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); | |
211 | lsi53c8xx_handle_legacy_cmdline(dev); | |
212 | ||
213 | /* Graphics setup. */ | |
214 | if (machine->enable_graphics && vga_interface_type != VGA_NONE) { | |
215 | dev = qdev_new("artist"); | |
216 | s = SYS_BUS_DEVICE(dev); | |
217 | sysbus_realize_and_unref(s, &error_fatal); | |
218 | sysbus_mmio_map(s, 0, LASI_GFX_HPA); | |
219 | sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); | |
220 | } | |
221 | ||
222 | /* Network setup. */ | |
223 | for (i = 0; i < nb_nics; i++) { | |
224 | if (!enable_lasi_lan()) { | |
225 | pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL); | |
226 | } | |
227 | } | |
228 | ||
229 | /* register power switch emulation */ | |
230 | qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); | |
231 | ||
232 | /* Load firmware. Given that this is not "real" firmware, | |
233 | but one explicitly written for the emulation, we might as | |
234 | well load it directly from an ELF image. */ | |
235 | firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, | |
236 | machine->firmware ?: "hppa-firmware.img"); | |
237 | if (firmware_filename == NULL) { | |
238 | error_report("no firmware provided"); | |
239 | exit(1); | |
240 | } | |
241 | ||
242 | size = load_elf(firmware_filename, NULL, NULL, NULL, | |
243 | &firmware_entry, &firmware_low, &firmware_high, NULL, | |
244 | true, EM_PARISC, 0, 0); | |
245 | ||
246 | /* Unfortunately, load_elf sign-extends reading elf32. */ | |
247 | firmware_entry = (target_ureg)firmware_entry; | |
248 | firmware_low = (target_ureg)firmware_low; | |
249 | firmware_high = (target_ureg)firmware_high; | |
250 | ||
251 | if (size < 0) { | |
252 | error_report("could not load firmware '%s'", firmware_filename); | |
253 | exit(1); | |
254 | } | |
255 | qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 | |
256 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", | |
257 | firmware_low, firmware_high, firmware_entry); | |
258 | if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { | |
259 | error_report("Firmware overlaps with memory or IO space"); | |
260 | exit(1); | |
261 | } | |
262 | g_free(firmware_filename); | |
263 | ||
264 | rom_region = g_new(MemoryRegion, 1); | |
265 | memory_region_init_ram(rom_region, NULL, "firmware", | |
266 | (FIRMWARE_END - FIRMWARE_START), &error_fatal); | |
267 | memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); | |
268 | ||
269 | /* Load kernel */ | |
270 | if (kernel_filename) { | |
271 | size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, | |
272 | NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, | |
273 | true, EM_PARISC, 0, 0); | |
274 | ||
275 | /* Unfortunately, load_elf sign-extends reading elf32. */ | |
276 | kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); | |
277 | kernel_low = (target_ureg)kernel_low; | |
278 | kernel_high = (target_ureg)kernel_high; | |
279 | ||
280 | if (size < 0) { | |
281 | error_report("could not load kernel '%s'", kernel_filename); | |
282 | exit(1); | |
283 | } | |
284 | qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 | |
285 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 | |
286 | ", size %" PRIu64 " kB\n", | |
287 | kernel_low, kernel_high, kernel_entry, size / KiB); | |
288 | ||
289 | if (kernel_cmdline) { | |
290 | cpu[0]->env.gr[24] = 0x4000; | |
291 | pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], | |
292 | TARGET_PAGE_SIZE, kernel_cmdline); | |
293 | } | |
294 | ||
295 | if (initrd_filename) { | |
296 | ram_addr_t initrd_base; | |
297 | int64_t initrd_size; | |
298 | ||
299 | initrd_size = get_image_size(initrd_filename); | |
300 | if (initrd_size < 0) { | |
301 | error_report("could not load initial ram disk '%s'", | |
302 | initrd_filename); | |
303 | exit(1); | |
304 | } | |
305 | ||
306 | /* Load the initrd image high in memory. | |
307 | Mirror the algorithm used by palo: | |
308 | (1) Due to sign-extension problems and PDC, | |
309 | put the initrd no higher than 1G. | |
310 | (2) Reserve 64k for stack. */ | |
311 | initrd_base = MIN(machine->ram_size, 1 * GiB); | |
312 | initrd_base = initrd_base - 64 * KiB; | |
313 | initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; | |
314 | ||
315 | if (initrd_base < kernel_high) { | |
316 | error_report("kernel and initial ram disk too large!"); | |
317 | exit(1); | |
318 | } | |
319 | ||
320 | load_image_targphys(initrd_filename, initrd_base, initrd_size); | |
321 | cpu[0]->env.gr[23] = initrd_base; | |
322 | cpu[0]->env.gr[22] = initrd_base + initrd_size; | |
323 | } | |
324 | } | |
325 | ||
326 | if (!kernel_entry) { | |
327 | /* When booting via firmware, tell firmware if we want interactive | |
328 | * mode (kernel_entry=1), and to boot from CD (gr[24]='d') | |
329 | * or hard disc * (gr[24]='c'). | |
330 | */ | |
331 | kernel_entry = boot_menu ? 1 : 0; | |
332 | cpu[0]->env.gr[24] = machine->boot_order[0]; | |
333 | } | |
334 | ||
335 | /* We jump to the firmware entry routine and pass the | |
336 | * various parameters in registers. After firmware initialization, | |
337 | * firmware will start the Linux kernel with ramdisk and cmdline. | |
338 | */ | |
339 | cpu[0]->env.gr[26] = machine->ram_size; | |
340 | cpu[0]->env.gr[25] = kernel_entry; | |
341 | ||
342 | /* tell firmware how many SMP CPUs to present in inventory table */ | |
343 | cpu[0]->env.gr[21] = smp_cpus; | |
344 | ||
345 | /* tell firmware fw_cfg port */ | |
346 | cpu[0]->env.gr[19] = FW_CFG_IO_BASE; | |
347 | } | |
348 | ||
349 | static void hppa_machine_reset(MachineState *ms) | |
350 | { | |
351 | unsigned int smp_cpus = ms->smp.cpus; | |
352 | int i; | |
353 | ||
354 | qemu_devices_reset(); | |
355 | ||
356 | /* Start all CPUs at the firmware entry point. | |
357 | * Monarch CPU will initialize firmware, secondary CPUs | |
358 | * will enter a small idle look and wait for rendevouz. */ | |
359 | for (i = 0; i < smp_cpus; i++) { | |
360 | cpu_set_pc(CPU(cpu[i]), firmware_entry); | |
361 | cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; | |
362 | } | |
363 | ||
364 | /* already initialized by machine_hppa_init()? */ | |
365 | if (cpu[0]->env.gr[26] == ms->ram_size) { | |
366 | return; | |
367 | } | |
368 | ||
369 | cpu[0]->env.gr[26] = ms->ram_size; | |
370 | cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ | |
371 | cpu[0]->env.gr[24] = 'c'; | |
372 | /* gr22/gr23 unused, no initrd while reboot. */ | |
373 | cpu[0]->env.gr[21] = smp_cpus; | |
374 | /* tell firmware fw_cfg port */ | |
375 | cpu[0]->env.gr[19] = FW_CFG_IO_BASE; | |
376 | } | |
377 | ||
378 | static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) | |
379 | { | |
380 | CPUState *cs; | |
381 | ||
382 | CPU_FOREACH(cs) { | |
383 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); | |
384 | } | |
385 | } | |
386 | ||
387 | static void machine_hppa_machine_init(MachineClass *mc) | |
388 | { | |
389 | mc->desc = "HPPA B160L machine"; | |
390 | mc->default_cpu_type = TYPE_HPPA_CPU; | |
391 | mc->init = machine_hppa_init; | |
392 | mc->reset = hppa_machine_reset; | |
393 | mc->block_default_type = IF_SCSI; | |
394 | mc->max_cpus = HPPA_MAX_CPUS; | |
395 | mc->default_cpus = 1; | |
396 | mc->is_default = true; | |
397 | mc->default_ram_size = 512 * MiB; | |
398 | mc->default_boot_order = "cd"; | |
399 | mc->default_ram_id = "ram"; | |
400 | } | |
401 | ||
402 | static void machine_hppa_machine_init_class_init(ObjectClass *oc, void *data) | |
403 | { | |
404 | MachineClass *mc = MACHINE_CLASS(oc); | |
405 | machine_hppa_machine_init(mc); | |
406 | ||
407 | NMIClass *nc = NMI_CLASS(oc); | |
408 | nc->nmi_monitor_handler = hppa_nmi; | |
409 | } | |
410 | ||
411 | static const TypeInfo machine_hppa_machine_init_typeinfo = { | |
412 | .name = ("hppa" "-machine"), | |
413 | .parent = "machine", | |
414 | .class_init = machine_hppa_machine_init_class_init, | |
415 | .interfaces = (InterfaceInfo[]) { | |
416 | { TYPE_NMI }, | |
417 | { } | |
418 | }, | |
419 | }; | |
420 | ||
421 | static void machine_hppa_machine_init_register_types(void) | |
422 | { | |
423 | type_register_static(&machine_hppa_machine_init_typeinfo); | |
424 | } | |
425 | ||
426 | type_init(machine_hppa_machine_init_register_types) |