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Commit | Line | Data |
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1 | #ifndef HW_PC_H | |
2 | #define HW_PC_H | |
3 | ||
4 | #include "qemu-common.h" | |
5 | ||
6 | /* PC-style peripherals (also used by other machines). */ | |
7 | ||
8 | /* serial.c */ | |
9 | ||
10 | SerialState *serial_init(int base, qemu_irq irq, int baudbase, | |
11 | CharDriverState *chr); | |
12 | SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, | |
13 | qemu_irq irq, int baudbase, | |
14 | CharDriverState *chr, int ioregister); | |
15 | SerialState *serial_isa_init(int index, CharDriverState *chr); | |
16 | ||
17 | /* parallel.c */ | |
18 | ||
19 | typedef struct ParallelState ParallelState; | |
20 | ParallelState *parallel_init(int index, CharDriverState *chr); | |
21 | ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr); | |
22 | ||
23 | /* i8259.c */ | |
24 | ||
25 | typedef struct PicState2 PicState2; | |
26 | extern PicState2 *isa_pic; | |
27 | void pic_set_irq(int irq, int level); | |
28 | void pic_set_irq_new(void *opaque, int irq, int level); | |
29 | qemu_irq *i8259_init(qemu_irq parent_irq); | |
30 | int pic_read_irq(PicState2 *s); | |
31 | void pic_update_irq(PicState2 *s); | |
32 | uint32_t pic_intack_read(PicState2 *s); | |
33 | void pic_info(Monitor *mon); | |
34 | void irq_info(Monitor *mon); | |
35 | ||
36 | /* APIC */ | |
37 | typedef struct IOAPICState IOAPICState; | |
38 | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, | |
39 | uint8_t delivery_mode, | |
40 | uint8_t vector_num, uint8_t polarity, | |
41 | uint8_t trigger_mode); | |
42 | int apic_init(CPUState *env); | |
43 | int apic_accept_pic_intr(CPUState *env); | |
44 | void apic_deliver_pic_intr(CPUState *env, int level); | |
45 | int apic_get_interrupt(CPUState *env); | |
46 | qemu_irq *ioapic_init(void); | |
47 | void ioapic_set_irq(void *opaque, int vector, int level); | |
48 | void apic_reset_irq_delivered(void); | |
49 | int apic_get_irq_delivered(void); | |
50 | ||
51 | /* i8254.c */ | |
52 | ||
53 | #define PIT_FREQ 1193182 | |
54 | ||
55 | typedef struct PITState PITState; | |
56 | ||
57 | PITState *pit_init(int base, qemu_irq irq); | |
58 | void pit_set_gate(PITState *pit, int channel, int val); | |
59 | int pit_get_gate(PITState *pit, int channel); | |
60 | int pit_get_initial_count(PITState *pit, int channel); | |
61 | int pit_get_mode(PITState *pit, int channel); | |
62 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
63 | ||
64 | void hpet_pit_disable(void); | |
65 | void hpet_pit_enable(void); | |
66 | ||
67 | /* vmport.c */ | |
68 | void vmport_init(void); | |
69 | void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); | |
70 | ||
71 | /* vmmouse.c */ | |
72 | void *vmmouse_init(void *m); | |
73 | ||
74 | /* pckbd.c */ | |
75 | ||
76 | void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); | |
77 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, | |
78 | target_phys_addr_t base, ram_addr_t size, | |
79 | target_phys_addr_t mask); | |
80 | ||
81 | /* mc146818rtc.c */ | |
82 | ||
83 | typedef struct RTCState RTCState; | |
84 | ||
85 | RTCState *rtc_init(int base_year); | |
86 | void rtc_set_memory(RTCState *s, int addr, int val); | |
87 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
88 | void cmos_set_s3_resume(void); | |
89 | ||
90 | /* pc.c */ | |
91 | extern int fd_bootchk; | |
92 | ||
93 | void ioport_set_a20(int enable); | |
94 | int ioport_get_a20(void); | |
95 | ||
96 | /* acpi.c */ | |
97 | extern int acpi_enabled; | |
98 | extern char *acpi_tables; | |
99 | extern size_t acpi_tables_len; | |
100 | ||
101 | void acpi_bios_init(void); | |
102 | int acpi_table_add(const char *table_desc); | |
103 | ||
104 | /* acpi_piix.c */ | |
105 | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, | |
106 | qemu_irq sci_irq); | |
107 | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); | |
108 | void piix4_acpi_system_hot_add_init(PCIBus *bus); | |
109 | ||
110 | /* hpet.c */ | |
111 | extern int no_hpet; | |
112 | ||
113 | /* pcspk.c */ | |
114 | void pcspk_init(PITState *); | |
115 | int pcspk_audio_init(qemu_irq *pic); | |
116 | ||
117 | /* piix_pci.c */ | |
118 | struct PCII440FXState; | |
119 | typedef struct PCII440FXState PCII440FXState; | |
120 | ||
121 | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic); | |
122 | void i440fx_set_smm(PCII440FXState *d, int val); | |
123 | void i440fx_init_memory_mappings(PCII440FXState *d); | |
124 | ||
125 | /* piix4.c */ | |
126 | extern PCIDevice *piix4_dev; | |
127 | int piix4_init(PCIBus *bus, int devfn); | |
128 | ||
129 | /* vga.c */ | |
130 | enum vga_retrace_method { | |
131 | VGA_RETRACE_DUMB, | |
132 | VGA_RETRACE_PRECISE | |
133 | }; | |
134 | ||
135 | extern enum vga_retrace_method vga_retrace_method; | |
136 | ||
137 | int isa_vga_init(void); | |
138 | int pci_vga_init(PCIBus *bus, | |
139 | unsigned long vga_bios_offset, int vga_bios_size); | |
140 | int isa_vga_mm_init(target_phys_addr_t vram_base, | |
141 | target_phys_addr_t ctrl_base, int it_shift); | |
142 | ||
143 | /* cirrus_vga.c */ | |
144 | void pci_cirrus_vga_init(PCIBus *bus); | |
145 | void isa_cirrus_vga_init(void); | |
146 | ||
147 | /* ne2000.c */ | |
148 | ||
149 | void isa_ne2000_init(int base, int irq, NICInfo *nd); | |
150 | ||
151 | int cpu_is_bsp(CPUState *env); | |
152 | #endif |