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1 | /* | |
2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator | |
3 | * | |
4 | * Copyright (c) 2004-2007 Fabrice Bellard | |
5 | * Copyright (c) 2007 Jocelyn Mayer | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | #include "hw.h" | |
26 | #include "ppc.h" | |
27 | #include "ppc_mac.h" | |
28 | #include "nvram.h" | |
29 | #include "pc.h" | |
30 | #include "pci.h" | |
31 | #include "net.h" | |
32 | #include "sysemu.h" | |
33 | #include "boards.h" | |
34 | #include "escc.h" | |
35 | ||
36 | #define MAX_IDE_BUS 2 | |
37 | ||
38 | /* UniN device */ | |
39 | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | |
40 | { | |
41 | } | |
42 | ||
43 | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) | |
44 | { | |
45 | return 0; | |
46 | } | |
47 | ||
48 | static CPUWriteMemoryFunc *unin_write[] = { | |
49 | &unin_writel, | |
50 | &unin_writel, | |
51 | &unin_writel, | |
52 | }; | |
53 | ||
54 | static CPUReadMemoryFunc *unin_read[] = { | |
55 | &unin_readl, | |
56 | &unin_readl, | |
57 | &unin_readl, | |
58 | }; | |
59 | ||
60 | /* PowerPC Mac99 hardware initialisation */ | |
61 | static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, | |
62 | const char *boot_device, DisplayState *ds, | |
63 | const char *kernel_filename, | |
64 | const char *kernel_cmdline, | |
65 | const char *initrd_filename, | |
66 | const char *cpu_model) | |
67 | { | |
68 | CPUState *env = NULL, *envs[MAX_CPUS]; | |
69 | char buf[1024]; | |
70 | qemu_irq *pic, **openpic_irqs; | |
71 | int unin_memory; | |
72 | int linux_boot, i; | |
73 | unsigned long bios_offset, vga_bios_offset; | |
74 | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; | |
75 | PCIBus *pci_bus; | |
76 | nvram_t nvram; | |
77 | #if 0 | |
78 | MacIONVRAMState *nvr; | |
79 | int nvram_mem_index; | |
80 | #endif | |
81 | m48t59_t *m48t59; | |
82 | int vga_bios_size, bios_size; | |
83 | qemu_irq *dummy_irq; | |
84 | int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index; | |
85 | int ide_mem_index[2]; | |
86 | int ppc_boot_device; | |
87 | int index; | |
88 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
89 | ||
90 | linux_boot = (kernel_filename != NULL); | |
91 | ||
92 | /* init CPUs */ | |
93 | if (cpu_model == NULL) | |
94 | cpu_model = "default"; | |
95 | for (i = 0; i < smp_cpus; i++) { | |
96 | env = cpu_init(cpu_model); | |
97 | if (!env) { | |
98 | fprintf(stderr, "Unable to find PowerPC CPU definition\n"); | |
99 | exit(1); | |
100 | } | |
101 | /* Set time-base frequency to 100 Mhz */ | |
102 | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); | |
103 | #if 0 | |
104 | env->osi_call = vga_osi_call; | |
105 | #endif | |
106 | qemu_register_reset(&cpu_ppc_reset, env); | |
107 | envs[i] = env; | |
108 | } | |
109 | if (env->nip < 0xFFF80000) { | |
110 | /* Special test for PowerPC 601: | |
111 | * the boot vector is at 0xFFF00100, then we need a 1MB BIOS. | |
112 | * But the NVRAM is located at 0xFFF04000... | |
113 | */ | |
114 | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n"); | |
115 | } | |
116 | ||
117 | /* allocate RAM */ | |
118 | cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | |
119 | ||
120 | /* allocate and load BIOS */ | |
121 | bios_offset = ram_size + vga_ram_size; | |
122 | if (bios_name == NULL) | |
123 | bios_name = BIOS_FILENAME; | |
124 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); | |
125 | bios_size = load_image(buf, phys_ram_base + bios_offset); | |
126 | if (bios_size < 0 || bios_size > BIOS_SIZE) { | |
127 | cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf); | |
128 | exit(1); | |
129 | } | |
130 | bios_size = (bios_size + 0xfff) & ~0xfff; | |
131 | if (bios_size > 0x00080000) { | |
132 | /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */ | |
133 | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n"); | |
134 | } | |
135 | cpu_register_physical_memory((uint32_t)(-bios_size), | |
136 | bios_size, bios_offset | IO_MEM_ROM); | |
137 | ||
138 | /* allocate and load VGA BIOS */ | |
139 | vga_bios_offset = bios_offset + bios_size; | |
140 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); | |
141 | vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8); | |
142 | if (vga_bios_size < 0) { | |
143 | /* if no bios is present, we can still work */ | |
144 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf); | |
145 | vga_bios_size = 0; | |
146 | } else { | |
147 | /* set a specific header (XXX: find real Apple format for NDRV | |
148 | drivers) */ | |
149 | phys_ram_base[vga_bios_offset] = 'N'; | |
150 | phys_ram_base[vga_bios_offset + 1] = 'D'; | |
151 | phys_ram_base[vga_bios_offset + 2] = 'R'; | |
152 | phys_ram_base[vga_bios_offset + 3] = 'V'; | |
153 | cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4), | |
154 | vga_bios_size); | |
155 | vga_bios_size += 8; | |
156 | } | |
157 | vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff; | |
158 | ||
159 | if (linux_boot) { | |
160 | kernel_base = KERNEL_LOAD_ADDR; | |
161 | /* now we can load the kernel */ | |
162 | kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base); | |
163 | if (kernel_size < 0) { | |
164 | cpu_abort(env, "qemu: could not load kernel '%s'\n", | |
165 | kernel_filename); | |
166 | exit(1); | |
167 | } | |
168 | /* load initrd */ | |
169 | if (initrd_filename) { | |
170 | initrd_base = INITRD_LOAD_ADDR; | |
171 | initrd_size = load_image(initrd_filename, | |
172 | phys_ram_base + initrd_base); | |
173 | if (initrd_size < 0) { | |
174 | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n", | |
175 | initrd_filename); | |
176 | exit(1); | |
177 | } | |
178 | } else { | |
179 | initrd_base = 0; | |
180 | initrd_size = 0; | |
181 | } | |
182 | ppc_boot_device = 'm'; | |
183 | } else { | |
184 | kernel_base = 0; | |
185 | kernel_size = 0; | |
186 | initrd_base = 0; | |
187 | initrd_size = 0; | |
188 | ppc_boot_device = '\0'; | |
189 | /* We consider that NewWorld PowerMac never have any floppy drive | |
190 | * For now, OHW cannot boot from the network. | |
191 | */ | |
192 | for (i = 0; boot_device[i] != '\0'; i++) { | |
193 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
194 | ppc_boot_device = boot_device[i]; | |
195 | break; | |
196 | } | |
197 | } | |
198 | if (ppc_boot_device == '\0') { | |
199 | fprintf(stderr, "No valid boot device for Mac99 machine\n"); | |
200 | exit(1); | |
201 | } | |
202 | } | |
203 | ||
204 | isa_mem_base = 0x80000000; | |
205 | ||
206 | /* Register 8 MB of ISA IO space */ | |
207 | isa_mmio_init(0xf2000000, 0x00800000); | |
208 | ||
209 | /* UniN init */ | |
210 | unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); | |
211 | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); | |
212 | ||
213 | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *)); | |
214 | openpic_irqs[0] = | |
215 | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); | |
216 | for (i = 0; i < smp_cpus; i++) { | |
217 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
218 | * and PowerPC input pins | |
219 | */ | |
220 | switch (PPC_INPUT(env)) { | |
221 | case PPC_FLAGS_INPUT_6xx: | |
222 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
223 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
224 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
225 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
226 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
227 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
228 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | |
229 | /* Not connected ? */ | |
230 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
231 | /* Check this */ | |
232 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
233 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | |
234 | break; | |
235 | #if defined(TARGET_PPC64) | |
236 | case PPC_FLAGS_INPUT_970: | |
237 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
238 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
239 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
240 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
241 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
242 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
243 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | |
244 | /* Not connected ? */ | |
245 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
246 | /* Check this */ | |
247 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
248 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | |
249 | break; | |
250 | #endif /* defined(TARGET_PPC64) */ | |
251 | default: | |
252 | cpu_abort(env, "Bus model not supported on mac99 machine\n"); | |
253 | exit(1); | |
254 | } | |
255 | } | |
256 | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); | |
257 | pci_bus = pci_pmac_init(pic); | |
258 | /* init basic PC hardware */ | |
259 | pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, | |
260 | ram_size, vga_ram_size, | |
261 | vga_bios_offset, vga_bios_size); | |
262 | ||
263 | /* XXX: suppress that */ | |
264 | dummy_irq = i8259_init(NULL); | |
265 | ||
266 | escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5], | |
267 | serial_hds[0], serial_hds[1], ESCC_CLOCK, 4); | |
268 | ||
269 | for(i = 0; i < nb_nics; i++) | |
270 | pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci"); | |
271 | ||
272 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { | |
273 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
274 | exit(1); | |
275 | } | |
276 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
277 | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); | |
278 | if (index != -1) | |
279 | hd[i] = drives_table[index].bdrv; | |
280 | else | |
281 | hd[i] = NULL; | |
282 | } | |
283 | #if 1 | |
284 | ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]); | |
285 | ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]); | |
286 | #else | |
287 | pci_cmd646_ide_init(pci_bus, &hd[0], 0); | |
288 | #endif | |
289 | /* cuda also initialize ADB */ | |
290 | cuda_init(&cuda_mem_index, pic[0x19]); | |
291 | ||
292 | adb_kbd_init(&adb_bus); | |
293 | adb_mouse_init(&adb_bus); | |
294 | ||
295 | dbdma_init(&dbdma_mem_index); | |
296 | ||
297 | macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index, | |
298 | cuda_mem_index, NULL, 2, ide_mem_index, escc_mem_index); | |
299 | ||
300 | if (usb_enabled) { | |
301 | usb_ohci_init_pci(pci_bus, 3, -1); | |
302 | } | |
303 | ||
304 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) | |
305 | graphic_depth = 15; | |
306 | #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */ | |
307 | /* The NewWorld NVRAM is not located in the MacIO device */ | |
308 | nvr = macio_nvram_init(&nvram_mem_index, 0x2000); | |
309 | pmac_format_nvram_partition(nvr, 0x2000); | |
310 | macio_nvram_map(nvr, 0xFFF04000); | |
311 | nvram.opaque = nvr; | |
312 | nvram.read_fn = &macio_nvram_read; | |
313 | nvram.write_fn = &macio_nvram_write; | |
314 | #else | |
315 | m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59); | |
316 | nvram.opaque = m48t59; | |
317 | nvram.read_fn = &m48t59_read; | |
318 | nvram.write_fn = &m48t59_write; | |
319 | #endif | |
320 | PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size, | |
321 | ppc_boot_device, kernel_base, kernel_size, | |
322 | kernel_cmdline, | |
323 | initrd_base, initrd_size, | |
324 | /* XXX: need an option to load a NVRAM image */ | |
325 | 0, | |
326 | graphic_width, graphic_height, graphic_depth); | |
327 | /* No PCI init: the BIOS will do it */ | |
328 | ||
329 | /* Special port to get debug messages from Open-Firmware */ | |
330 | register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); | |
331 | } | |
332 | ||
333 | QEMUMachine core99_machine = { | |
334 | .name = "mac99", | |
335 | .desc = "Mac99 based PowerMAC", | |
336 | .init = ppc_core99_init, | |
337 | .ram_require = BIOS_SIZE + VGA_RAM_SIZE, | |
338 | .max_cpus = MAX_CPUS, | |
339 | }; |