[mirror_qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 * PCI bus layout on a real G5 (U3 based):
 *
 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
 *
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "adb.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "openpic.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"
#include "kvm.h"
#include "kvm_ppc.h"
#include "hw/usb.h"
#include "blockdev.h"
#include "exec-memory.h"

#define MAX_IDE_BUS 2
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, ...)                                  \
    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
#else
#define UNIN_DPRINTF(fmt, ...)
#endif

/* UniN device */
static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
                       unsigned size)
{
    UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
}

static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static const MemoryRegionOps unin_ops = {
    .read = unin_read,
    .write = unin_write,
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static int fw_cfg_boot_set(void *opaque, const char *boot_device)
{
    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
    return 0;
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

static target_phys_addr_t round_page(target_phys_addr_t addr)
{
    return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
}

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL;
    char *filename;
    qemu_irq *pic, **openpic_irqs;
    MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
    int linux_boot, i;
    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
    target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
    long kernel_size, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int bios_size;
    MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
    MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
    MemoryRegion *ide_mem[3];
    int ppc_boot_device;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;
    int machine_arch;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
#ifdef TARGET_PPC64
        cpu_model = "970fx";
#else
        cpu_model = "G4";
#endif
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
        qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
    }

    /* allocate RAM */
    memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
    vmstate_register_ram_global(ram);
    memory_region_add_subregion(get_system_memory(), 0, ram);

    /* allocate and load BIOS */
    memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
    vmstate_register_ram_global(bios);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
    memory_region_set_readonly(bios, true);
    memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);

    /* Load OpenBIOS (ELF) */
    if (filename) {
        bios_size = load_elf(filename, NULL, NULL, NULL,
                             NULL, NULL, 1, ELF_MACHINE, 0);

        g_free(filename);
    } else {
        bios_size = -1;
    }
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
        exit(1);
    }

    if (linux_boot) {
        uint64_t lowaddr = 0;
        int bswap_needed;

#ifdef BSWAP_NEEDED
        bswap_needed = 1;
#else
        bswap_needed = 0;
#endif
        kernel_base = KERNEL_LOAD_ADDR;

        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
        if (kernel_size < 0)
            kernel_size = load_aout(kernel_filename, kernel_base,
                                    ram_size - kernel_base, bswap_needed,
                                    TARGET_PAGE_SIZE);
        if (kernel_size < 0)
            kernel_size = load_image_targphys(kernel_filename,
                                              kernel_base,
                                              ram_size - kernel_base);
        if (kernel_size < 0) {
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
                                              ram_size - initrd_base);
            if (initrd_size < 0) {
                hw_error("qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
                exit(1);
            }
            cmdline_base = round_page(initrd_base + initrd_size);
        } else {
            initrd_base = 0;
            initrd_size = 0;
            cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
    memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);

    openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            hw_error("Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
        /* 970 gets a U3 bus */
        pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
        machine_arch = ARCH_MAC99_U3;
    } else {
        pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
        machine_arch = ARCH_MAC99;
    }
    /* init basic PC hardware */
    pci_vga_init(pci_bus);

    escc_mem = escc_init(0, pic[0x25], pic[0x24],
                         serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
    memory_region_init_alias(escc_bar, "escc-bar",
                             escc_mem, 0, memory_region_size(escc_mem));

    for(i = 0; i < nb_nics; i++)
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);

    ide_drive_get(hd, MAX_IDE_BUS);
    dbdma = DBDMA_init(&dbdma_mem);

    /* We only emulate 2 out of 3 IDE controllers for now */
    ide_mem[0] = NULL;
    ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
    ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);

    /* cuda also initialize ADB */
    if (machine_arch == ARCH_MAC99_U3) {
        usb_enabled = 1;
    }
    cuda_init(&cuda_mem, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);

    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
               dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);

    if (usb_enabled) {
        pci_create_simple(pci_bus, -1, "pci-ohci");
    }

    /* U3 needs to use USB for input because Linux doesn't support via-cuda
       on PPC64 */
    if (machine_arch == ARCH_MAC99_U3) {
        usbdevice_create("keyboard");
        usbdevice_create("mouse");
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
    if (kernel_cmdline) {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
    }
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);

    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);

    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
    if (kvm_enabled()) {
#ifdef CONFIG_KVM
        uint8_t *hypercall;

        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
        hypercall = g_malloc(16);
        kvmppc_get_hypercall(env, hypercall, 16);
        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
    }

    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

static QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .max_cpus = MAX_CPUS,
#ifdef TARGET_PPC64
    .is_default = 1,
#endif
};

static void core99_machine_init(void)
{
    qemu_register_machine(&core99_machine);
}

machine_init(core99_machine_init);
Commit	Line	Data
	1	/*
	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
	3	*
	4	* Copyright (c) 2004-2007 Fabrice Bellard
	5	* Copyright (c) 2007 Jocelyn Mayer
	6	*
	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*
	25	* PCI bus layout on a real G5 (U3 based):
	26	*
	27	* 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
	28	* 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
	29	* 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
	30	* 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
	31	* 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
	32	* 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
	33	* 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
	34	* 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
	35	* 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
	36	* 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
	37	* 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
	38	* 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
	39	* 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
	40	* 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
	41	* 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
	42	* 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
	43	* 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
	44	* 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
	45	* 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
	46	* 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
	47	*
	48	*/
	49	#include "hw.h"
	50	#include "ppc.h"
	51	#include "ppc_mac.h"
	52	#include "adb.h"
	53	#include "mac_dbdma.h"
	54	#include "nvram.h"
	55	#include "pc.h"
	56	#include "pci.h"
	57	#include "net.h"
	58	#include "sysemu.h"
	59	#include "boards.h"
	60	#include "fw_cfg.h"
	61	#include "escc.h"
	62	#include "openpic.h"
	63	#include "ide.h"
	64	#include "loader.h"
	65	#include "elf.h"
	66	#include "kvm.h"
	67	#include "kvm_ppc.h"
	68	#include "hw/usb.h"
	69	#include "blockdev.h"
	70	#include "exec-memory.h"
	71
	72	#define MAX_IDE_BUS 2
	73	#define CFG_ADDR 0xf0000510
	74
	75	/* debug UniNorth */
	76	//#define DEBUG_UNIN
	77
	78	#ifdef DEBUG_UNIN
	79	#define UNIN_DPRINTF(fmt, ...) \
	80	do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
	81	#else
	82	#define UNIN_DPRINTF(fmt, ...)
	83	#endif
	84
	85	/* UniN device */
	86	static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
	87	unsigned size)
	88	{
	89	UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
	90	}
	91
	92	static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
	93	{
	94	uint32_t value;
	95
	96	value = 0;
	97	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	98
	99	return value;
	100	}
	101
	102	static const MemoryRegionOps unin_ops = {
	103	.read = unin_read,
	104	.write = unin_write,
	105	.endianness = DEVICE_NATIVE_ENDIAN,
	106	};
	107
	108	static int fw_cfg_boot_set(void opaque, const char boot_device)
	109	{
	110	fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	111	return 0;
	112	}
	113
	114	static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
	115	{
	116	return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
	117	}
	118
	119	static target_phys_addr_t round_page(target_phys_addr_t addr)
	120	{
	121	return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
	122	}
	123
	124	/* PowerPC Mac99 hardware initialisation */
	125	static void ppc_core99_init (ram_addr_t ram_size,
	126	const char *boot_device,
	127	const char *kernel_filename,
	128	const char *kernel_cmdline,
	129	const char *initrd_filename,
	130	const char *cpu_model)
	131	{
	132	CPUState *env = NULL;
	133	char *filename;
	134	qemu_irq pic, *openpic_irqs;
	135	MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
	136	int linux_boot, i;
	137	MemoryRegion ram = g_new(MemoryRegion, 1), bios = g_new(MemoryRegion, 1);
	138	target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
	139	long kernel_size, initrd_size;
	140	PCIBus *pci_bus;
	141	MacIONVRAMState *nvr;
	142	int bios_size;
	143	MemoryRegion pic_mem, dbdma_mem, cuda_mem, escc_mem;
	144	MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
	145	MemoryRegion *ide_mem[3];
	146	int ppc_boot_device;
	147	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
	148	void *fw_cfg;
	149	void *dbdma;
	150	int machine_arch;
	151
	152	linux_boot = (kernel_filename != NULL);
	153
	154	/* init CPUs */
	155	if (cpu_model == NULL)
	156	#ifdef TARGET_PPC64
	157	cpu_model = "970fx";
	158	#else
	159	cpu_model = "G4";
	160	#endif
	161	for (i = 0; i < smp_cpus; i++) {
	162	env = cpu_init(cpu_model);
	163	if (!env) {
	164	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	165	exit(1);
	166	}
	167	/* Set time-base frequency to 100 Mhz */
	168	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
	169	qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
	170	}
	171
	172	/* allocate RAM */
	173	memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
	174	vmstate_register_ram_global(ram);
	175	memory_region_add_subregion(get_system_memory(), 0, ram);
	176
	177	/* allocate and load BIOS */
	178	memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
	179	vmstate_register_ram_global(bios);
	180	if (bios_name == NULL)
	181	bios_name = PROM_FILENAME;
	182	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
	183	memory_region_set_readonly(bios, true);
	184	memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
	185
	186	/* Load OpenBIOS (ELF) */
	187	if (filename) {
	188	bios_size = load_elf(filename, NULL, NULL, NULL,
	189	NULL, NULL, 1, ELF_MACHINE, 0);
	190
	191	g_free(filename);
	192	} else {
	193	bios_size = -1;
	194	}
	195	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
	196	hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
	197	exit(1);
	198	}
	199
	200	if (linux_boot) {
	201	uint64_t lowaddr = 0;
	202	int bswap_needed;
	203
	204	#ifdef BSWAP_NEEDED
	205	bswap_needed = 1;
	206	#else
	207	bswap_needed = 0;
	208	#endif
	209	kernel_base = KERNEL_LOAD_ADDR;
	210
	211	kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
	212	NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
	213	if (kernel_size < 0)
	214	kernel_size = load_aout(kernel_filename, kernel_base,
	215	ram_size - kernel_base, bswap_needed,
	216	TARGET_PAGE_SIZE);
	217	if (kernel_size < 0)
	218	kernel_size = load_image_targphys(kernel_filename,
	219	kernel_base,
	220	ram_size - kernel_base);
	221	if (kernel_size < 0) {
	222	hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
	223	exit(1);
	224	}
	225	/* load initrd */
	226	if (initrd_filename) {
	227	initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
	228	initrd_size = load_image_targphys(initrd_filename, initrd_base,
	229	ram_size - initrd_base);
	230	if (initrd_size < 0) {
	231	hw_error("qemu: could not load initial ram disk '%s'\n",
	232	initrd_filename);
	233	exit(1);
	234	}
	235	cmdline_base = round_page(initrd_base + initrd_size);
	236	} else {
	237	initrd_base = 0;
	238	initrd_size = 0;
	239	cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
	240	}
	241	ppc_boot_device = 'm';
	242	} else {
	243	kernel_base = 0;
	244	kernel_size = 0;
	245	initrd_base = 0;
	246	initrd_size = 0;
	247	ppc_boot_device = '\0';
	248	/* We consider that NewWorld PowerMac never have any floppy drive
	249	* For now, OHW cannot boot from the network.
	250	*/
	251	for (i = 0; boot_device[i] != '\0'; i++) {
	252	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	253	ppc_boot_device = boot_device[i];
	254	break;
	255	}
	256	}
	257	if (ppc_boot_device == '\0') {
	258	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	259	exit(1);
	260	}
	261	}
	262
	263	/* Register 8 MB of ISA IO space */
	264	isa_mmio_init(0xf2000000, 0x00800000);
	265
	266	/* UniN init */
	267	memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
	268	memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
	269
	270	openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
	271	openpic_irqs[0] =
	272	g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	273	for (i = 0; i < smp_cpus; i++) {
	274	/* Mac99 IRQ connection between OpenPIC outputs pins
	275	* and PowerPC input pins
	276	*/
	277	switch (PPC_INPUT(env)) {
	278	case PPC_FLAGS_INPUT_6xx:
	279	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	280	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	281	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	282	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	283	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	284	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	285	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	286	/* Not connected ? */
	287	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	288	/* Check this */
	289	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	290	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	291	break;
	292	#if defined(TARGET_PPC64)
	293	case PPC_FLAGS_INPUT_970:
	294	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	295	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	296	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	297	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	298	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	299	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	300	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	301	/* Not connected ? */
	302	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	303	/* Check this */
	304	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	305	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	306	break;
	307	#endif /* defined(TARGET_PPC64) */
	308	default:
	309	hw_error("Bus model not supported on mac99 machine\n");
	310	exit(1);
	311	}
	312	}
	313	pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
	314	if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
	315	/* 970 gets a U3 bus */
	316	pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
	317	machine_arch = ARCH_MAC99_U3;
	318	} else {
	319	pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
	320	machine_arch = ARCH_MAC99;
	321	}
	322	/* init basic PC hardware */
	323	pci_vga_init(pci_bus);
	324
	325	escc_mem = escc_init(0, pic[0x25], pic[0x24],
	326	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
	327	memory_region_init_alias(escc_bar, "escc-bar",
	328	escc_mem, 0, memory_region_size(escc_mem));
	329
	330	for(i = 0; i < nb_nics; i++)
	331	pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
	332
	333	ide_drive_get(hd, MAX_IDE_BUS);
	334	dbdma = DBDMA_init(&dbdma_mem);
	335
	336	/* We only emulate 2 out of 3 IDE controllers for now */
	337	ide_mem[0] = NULL;
	338	ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
	339	ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
	340
	341	/* cuda also initialize ADB */
	342	if (machine_arch == ARCH_MAC99_U3) {
	343	usb_enabled = 1;
	344	}
	345	cuda_init(&cuda_mem, pic[0x19]);
	346
	347	adb_kbd_init(&adb_bus);
	348	adb_mouse_init(&adb_bus);
	349
	350	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
	351	dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);
	352
	353	if (usb_enabled) {
	354	pci_create_simple(pci_bus, -1, "pci-ohci");
	355	}
	356
	357	/* U3 needs to use USB for input because Linux doesn't support via-cuda
	358	on PPC64 */
	359	if (machine_arch == ARCH_MAC99_U3) {
	360	usbdevice_create("keyboard");
	361	usbdevice_create("mouse");
	362	}
	363
	364	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
	365	graphic_depth = 15;
	366
	367	/* The NewWorld NVRAM is not located in the MacIO device */
	368	nvr = macio_nvram_init(0x2000, 1);
	369	pmac_format_nvram_partition(nvr, 0x2000);
	370	macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
	371	/* No PCI init: the BIOS will do it */
	372
	373	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	374	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	375	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
	376	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
	377	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
	378	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
	379	if (kernel_cmdline) {
	380	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
	381	pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
	382	} else {
	383	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
	384	}
	385	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
	386	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
	387	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
	388
	389	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
	390	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
	391	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
	392
	393	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
	394	if (kvm_enabled()) {
	395	#ifdef CONFIG_KVM
	396	uint8_t *hypercall;
	397
	398	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
	399	hypercall = g_malloc(16);
	400	kvmppc_get_hypercall(env, hypercall, 16);
	401	fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
	402	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
	403	#endif
	404	} else {
	405	fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
	406	}
	407
	408	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
	409	}
	410
	411	static QEMUMachine core99_machine = {
	412	.name = "mac99",
	413	.desc = "Mac99 based PowerMAC",
	414	.init = ppc_core99_init,
	415	.max_cpus = MAX_CPUS,
	416	#ifdef TARGET_PPC64
	417	.is_default = 1,
	418	#endif
	419	};
	420
	421	static void core99_machine_init(void)
	422	{
	423	qemu_register_machine(&core99_machine);
	424	}
	425
	426	machine_init(core99_machine_init);