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Commit | Line | Data |
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1 | /* | |
2 | * Dynamic DMA mapping support. | |
3 | * | |
4 | * This implementation is a fallback for platforms that do not support | |
5 | * I/O TLBs (aka DMA address translation hardware). | |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
17 | * 08/12/11 beckyb Add highmem support | |
18 | */ | |
19 | ||
20 | #include <linux/cache.h> | |
21 | #include <linux/dma-mapping.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/export.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/swiotlb.h> | |
27 | #include <linux/pfn.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/ctype.h> | |
30 | #include <linux/highmem.h> | |
31 | #include <linux/gfp.h> | |
32 | #include <linux/scatterlist.h> | |
33 | ||
34 | #include <asm/io.h> | |
35 | #include <asm/dma.h> | |
36 | ||
37 | #include <linux/init.h> | |
38 | #include <linux/bootmem.h> | |
39 | #include <linux/iommu-helper.h> | |
40 | ||
41 | #define CREATE_TRACE_POINTS | |
42 | #include <trace/events/swiotlb.h> | |
43 | ||
44 | #define OFFSET(val,align) ((unsigned long) \ | |
45 | ( (val) & ( (align) - 1))) | |
46 | ||
47 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | |
48 | ||
49 | /* | |
50 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
51 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
52 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
53 | */ | |
54 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
55 | ||
56 | enum swiotlb_force swiotlb_force; | |
57 | ||
58 | /* | |
59 | * Used to do a quick range check in swiotlb_tbl_unmap_single and | |
60 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
61 | * API. | |
62 | */ | |
63 | static phys_addr_t io_tlb_start, io_tlb_end; | |
64 | ||
65 | /* | |
66 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and | |
67 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
68 | */ | |
69 | static unsigned long io_tlb_nslabs; | |
70 | ||
71 | /* | |
72 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
73 | */ | |
74 | static unsigned long io_tlb_overflow = 32*1024; | |
75 | ||
76 | static phys_addr_t io_tlb_overflow_buffer; | |
77 | ||
78 | /* | |
79 | * This is a free list describing the number of free entries available from | |
80 | * each index | |
81 | */ | |
82 | static unsigned int *io_tlb_list; | |
83 | static unsigned int io_tlb_index; | |
84 | ||
85 | /* | |
86 | * Max segment that we can provide which (if pages are contingous) will | |
87 | * not be bounced (unless SWIOTLB_FORCE is set). | |
88 | */ | |
89 | unsigned int max_segment; | |
90 | ||
91 | /* | |
92 | * We need to save away the original address corresponding to a mapped entry | |
93 | * for the sync operations. | |
94 | */ | |
95 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) | |
96 | static phys_addr_t *io_tlb_orig_addr; | |
97 | ||
98 | /* | |
99 | * Protect the above data structures in the map and unmap calls | |
100 | */ | |
101 | static DEFINE_SPINLOCK(io_tlb_lock); | |
102 | ||
103 | static int late_alloc; | |
104 | ||
105 | static int __init | |
106 | setup_io_tlb_npages(char *str) | |
107 | { | |
108 | if (isdigit(*str)) { | |
109 | io_tlb_nslabs = simple_strtoul(str, &str, 0); | |
110 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | |
111 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
112 | } | |
113 | if (*str == ',') | |
114 | ++str; | |
115 | if (!strcmp(str, "force")) { | |
116 | swiotlb_force = SWIOTLB_FORCE; | |
117 | } else if (!strcmp(str, "noforce")) { | |
118 | swiotlb_force = SWIOTLB_NO_FORCE; | |
119 | io_tlb_nslabs = 1; | |
120 | } | |
121 | ||
122 | return 0; | |
123 | } | |
124 | early_param("swiotlb", setup_io_tlb_npages); | |
125 | /* make io_tlb_overflow tunable too? */ | |
126 | ||
127 | unsigned long swiotlb_nr_tbl(void) | |
128 | { | |
129 | return io_tlb_nslabs; | |
130 | } | |
131 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); | |
132 | ||
133 | unsigned int swiotlb_max_segment(void) | |
134 | { | |
135 | return max_segment; | |
136 | } | |
137 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); | |
138 | ||
139 | void swiotlb_set_max_segment(unsigned int val) | |
140 | { | |
141 | if (swiotlb_force == SWIOTLB_FORCE) | |
142 | max_segment = 1; | |
143 | else | |
144 | max_segment = rounddown(val, PAGE_SIZE); | |
145 | } | |
146 | ||
147 | /* default to 64MB */ | |
148 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) | |
149 | unsigned long swiotlb_size_or_default(void) | |
150 | { | |
151 | unsigned long size; | |
152 | ||
153 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
154 | ||
155 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
156 | } | |
157 | ||
158 | /* Note that this doesn't work with highmem page */ | |
159 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, | |
160 | volatile void *address) | |
161 | { | |
162 | return phys_to_dma(hwdev, virt_to_phys(address)); | |
163 | } | |
164 | ||
165 | static bool no_iotlb_memory; | |
166 | ||
167 | void swiotlb_print_info(void) | |
168 | { | |
169 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
170 | unsigned char *vstart, *vend; | |
171 | ||
172 | if (no_iotlb_memory) { | |
173 | pr_warn("software IO TLB: No low mem\n"); | |
174 | return; | |
175 | } | |
176 | ||
177 | vstart = phys_to_virt(io_tlb_start); | |
178 | vend = phys_to_virt(io_tlb_end); | |
179 | ||
180 | printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n", | |
181 | (unsigned long long)io_tlb_start, | |
182 | (unsigned long long)io_tlb_end, | |
183 | bytes >> 20, vstart, vend - 1); | |
184 | } | |
185 | ||
186 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) | |
187 | { | |
188 | void *v_overflow_buffer; | |
189 | unsigned long i, bytes; | |
190 | ||
191 | bytes = nslabs << IO_TLB_SHIFT; | |
192 | ||
193 | io_tlb_nslabs = nslabs; | |
194 | io_tlb_start = __pa(tlb); | |
195 | io_tlb_end = io_tlb_start + bytes; | |
196 | ||
197 | /* | |
198 | * Get the overflow emergency buffer | |
199 | */ | |
200 | v_overflow_buffer = memblock_virt_alloc_low_nopanic( | |
201 | PAGE_ALIGN(io_tlb_overflow), | |
202 | PAGE_SIZE); | |
203 | if (!v_overflow_buffer) | |
204 | return -ENOMEM; | |
205 | ||
206 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); | |
207 | ||
208 | /* | |
209 | * Allocate and initialize the free list array. This array is used | |
210 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
211 | * between io_tlb_start and io_tlb_end. | |
212 | */ | |
213 | io_tlb_list = memblock_virt_alloc( | |
214 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), | |
215 | PAGE_SIZE); | |
216 | io_tlb_orig_addr = memblock_virt_alloc( | |
217 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), | |
218 | PAGE_SIZE); | |
219 | for (i = 0; i < io_tlb_nslabs; i++) { | |
220 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
221 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
222 | } | |
223 | io_tlb_index = 0; | |
224 | ||
225 | if (verbose) | |
226 | swiotlb_print_info(); | |
227 | ||
228 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); | |
229 | return 0; | |
230 | } | |
231 | ||
232 | /* | |
233 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
234 | * structures for the software IO TLB used to implement the DMA API. | |
235 | */ | |
236 | void __init | |
237 | swiotlb_init(int verbose) | |
238 | { | |
239 | size_t default_size = IO_TLB_DEFAULT_SIZE; | |
240 | unsigned char *vstart; | |
241 | unsigned long bytes; | |
242 | ||
243 | if (!io_tlb_nslabs) { | |
244 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
245 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
246 | } | |
247 | ||
248 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
249 | ||
250 | /* Get IO TLB memory from the low pages */ | |
251 | vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); | |
252 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) | |
253 | return; | |
254 | ||
255 | if (io_tlb_start) | |
256 | memblock_free_early(io_tlb_start, | |
257 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
258 | pr_warn("Cannot allocate SWIOTLB buffer"); | |
259 | no_iotlb_memory = true; | |
260 | } | |
261 | ||
262 | /* | |
263 | * Systems with larger DMA zones (those that don't support ISA) can | |
264 | * initialize the swiotlb later using the slab allocator if needed. | |
265 | * This should be just like above, but with some error catching. | |
266 | */ | |
267 | int | |
268 | swiotlb_late_init_with_default_size(size_t default_size) | |
269 | { | |
270 | unsigned long bytes, req_nslabs = io_tlb_nslabs; | |
271 | unsigned char *vstart = NULL; | |
272 | unsigned int order; | |
273 | int rc = 0; | |
274 | ||
275 | if (!io_tlb_nslabs) { | |
276 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
277 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
278 | } | |
279 | ||
280 | /* | |
281 | * Get IO TLB memory from the low pages | |
282 | */ | |
283 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); | |
284 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
285 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
286 | ||
287 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
288 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, | |
289 | order); | |
290 | if (vstart) | |
291 | break; | |
292 | order--; | |
293 | } | |
294 | ||
295 | if (!vstart) { | |
296 | io_tlb_nslabs = req_nslabs; | |
297 | return -ENOMEM; | |
298 | } | |
299 | if (order != get_order(bytes)) { | |
300 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " | |
301 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
302 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
303 | } | |
304 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); | |
305 | if (rc) | |
306 | free_pages((unsigned long)vstart, order); | |
307 | ||
308 | return rc; | |
309 | } | |
310 | ||
311 | int | |
312 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
313 | { | |
314 | unsigned long i, bytes; | |
315 | unsigned char *v_overflow_buffer; | |
316 | ||
317 | bytes = nslabs << IO_TLB_SHIFT; | |
318 | ||
319 | io_tlb_nslabs = nslabs; | |
320 | io_tlb_start = virt_to_phys(tlb); | |
321 | io_tlb_end = io_tlb_start + bytes; | |
322 | ||
323 | memset(tlb, 0, bytes); | |
324 | ||
325 | /* | |
326 | * Get the overflow emergency buffer | |
327 | */ | |
328 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
329 | get_order(io_tlb_overflow)); | |
330 | if (!v_overflow_buffer) | |
331 | goto cleanup2; | |
332 | ||
333 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); | |
334 | ||
335 | /* | |
336 | * Allocate and initialize the free list array. This array is used | |
337 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
338 | * between io_tlb_start and io_tlb_end. | |
339 | */ | |
340 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
341 | get_order(io_tlb_nslabs * sizeof(int))); | |
342 | if (!io_tlb_list) | |
343 | goto cleanup3; | |
344 | ||
345 | io_tlb_orig_addr = (phys_addr_t *) | |
346 | __get_free_pages(GFP_KERNEL, | |
347 | get_order(io_tlb_nslabs * | |
348 | sizeof(phys_addr_t))); | |
349 | if (!io_tlb_orig_addr) | |
350 | goto cleanup4; | |
351 | ||
352 | for (i = 0; i < io_tlb_nslabs; i++) { | |
353 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
354 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
355 | } | |
356 | io_tlb_index = 0; | |
357 | ||
358 | swiotlb_print_info(); | |
359 | ||
360 | late_alloc = 1; | |
361 | ||
362 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); | |
363 | ||
364 | return 0; | |
365 | ||
366 | cleanup4: | |
367 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
368 | sizeof(int))); | |
369 | io_tlb_list = NULL; | |
370 | cleanup3: | |
371 | free_pages((unsigned long)v_overflow_buffer, | |
372 | get_order(io_tlb_overflow)); | |
373 | io_tlb_overflow_buffer = 0; | |
374 | cleanup2: | |
375 | io_tlb_end = 0; | |
376 | io_tlb_start = 0; | |
377 | io_tlb_nslabs = 0; | |
378 | max_segment = 0; | |
379 | return -ENOMEM; | |
380 | } | |
381 | ||
382 | void __init swiotlb_free(void) | |
383 | { | |
384 | if (!io_tlb_orig_addr) | |
385 | return; | |
386 | ||
387 | if (late_alloc) { | |
388 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), | |
389 | get_order(io_tlb_overflow)); | |
390 | free_pages((unsigned long)io_tlb_orig_addr, | |
391 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
392 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
393 | sizeof(int))); | |
394 | free_pages((unsigned long)phys_to_virt(io_tlb_start), | |
395 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); | |
396 | } else { | |
397 | memblock_free_late(io_tlb_overflow_buffer, | |
398 | PAGE_ALIGN(io_tlb_overflow)); | |
399 | memblock_free_late(__pa(io_tlb_orig_addr), | |
400 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
401 | memblock_free_late(__pa(io_tlb_list), | |
402 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
403 | memblock_free_late(io_tlb_start, | |
404 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
405 | } | |
406 | io_tlb_nslabs = 0; | |
407 | max_segment = 0; | |
408 | } | |
409 | ||
410 | int is_swiotlb_buffer(phys_addr_t paddr) | |
411 | { | |
412 | return paddr >= io_tlb_start && paddr < io_tlb_end; | |
413 | } | |
414 | ||
415 | /* | |
416 | * Bounce: copy the swiotlb buffer back to the original dma location | |
417 | */ | |
418 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, | |
419 | size_t size, enum dma_data_direction dir) | |
420 | { | |
421 | unsigned long pfn = PFN_DOWN(orig_addr); | |
422 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
423 | ||
424 | if (PageHighMem(pfn_to_page(pfn))) { | |
425 | /* The buffer does not have a mapping. Map it in and copy */ | |
426 | unsigned int offset = orig_addr & ~PAGE_MASK; | |
427 | char *buffer; | |
428 | unsigned int sz = 0; | |
429 | unsigned long flags; | |
430 | ||
431 | while (size) { | |
432 | sz = min_t(size_t, PAGE_SIZE - offset, size); | |
433 | ||
434 | local_irq_save(flags); | |
435 | buffer = kmap_atomic(pfn_to_page(pfn)); | |
436 | if (dir == DMA_TO_DEVICE) | |
437 | memcpy(vaddr, buffer + offset, sz); | |
438 | else | |
439 | memcpy(buffer + offset, vaddr, sz); | |
440 | kunmap_atomic(buffer); | |
441 | local_irq_restore(flags); | |
442 | ||
443 | size -= sz; | |
444 | pfn++; | |
445 | vaddr += sz; | |
446 | offset = 0; | |
447 | } | |
448 | } else if (dir == DMA_TO_DEVICE) { | |
449 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
450 | } else { | |
451 | memcpy(phys_to_virt(orig_addr), vaddr, size); | |
452 | } | |
453 | } | |
454 | ||
455 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, | |
456 | dma_addr_t tbl_dma_addr, | |
457 | phys_addr_t orig_addr, size_t size, | |
458 | enum dma_data_direction dir, | |
459 | unsigned long attrs) | |
460 | { | |
461 | unsigned long flags; | |
462 | phys_addr_t tlb_addr; | |
463 | unsigned int nslots, stride, index, wrap; | |
464 | int i; | |
465 | unsigned long mask; | |
466 | unsigned long offset_slots; | |
467 | unsigned long max_slots; | |
468 | ||
469 | if (no_iotlb_memory) | |
470 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
471 | ||
472 | mask = dma_get_seg_boundary(hwdev); | |
473 | ||
474 | tbl_dma_addr &= mask; | |
475 | ||
476 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
477 | ||
478 | /* | |
479 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
480 | */ | |
481 | max_slots = mask + 1 | |
482 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
483 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
484 | ||
485 | /* | |
486 | * For mappings greater than or equal to a page, we limit the stride | |
487 | * (and hence alignment) to a page size. | |
488 | */ | |
489 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
490 | if (size >= PAGE_SIZE) | |
491 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
492 | else | |
493 | stride = 1; | |
494 | ||
495 | BUG_ON(!nslots); | |
496 | ||
497 | /* | |
498 | * Find suitable number of IO TLB entries size that will fit this | |
499 | * request and allocate a buffer from that IO TLB pool. | |
500 | */ | |
501 | spin_lock_irqsave(&io_tlb_lock, flags); | |
502 | index = ALIGN(io_tlb_index, stride); | |
503 | if (index >= io_tlb_nslabs) | |
504 | index = 0; | |
505 | wrap = index; | |
506 | ||
507 | do { | |
508 | while (iommu_is_span_boundary(index, nslots, offset_slots, | |
509 | max_slots)) { | |
510 | index += stride; | |
511 | if (index >= io_tlb_nslabs) | |
512 | index = 0; | |
513 | if (index == wrap) | |
514 | goto not_found; | |
515 | } | |
516 | ||
517 | /* | |
518 | * If we find a slot that indicates we have 'nslots' number of | |
519 | * contiguous buffers, we allocate the buffers from that slot | |
520 | * and mark the entries as '0' indicating unavailable. | |
521 | */ | |
522 | if (io_tlb_list[index] >= nslots) { | |
523 | int count = 0; | |
524 | ||
525 | for (i = index; i < (int) (index + nslots); i++) | |
526 | io_tlb_list[i] = 0; | |
527 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
528 | io_tlb_list[i] = ++count; | |
529 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
530 | ||
531 | /* | |
532 | * Update the indices to avoid searching in the next | |
533 | * round. | |
534 | */ | |
535 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
536 | ? (index + nslots) : 0); | |
537 | ||
538 | goto found; | |
539 | } | |
540 | index += stride; | |
541 | if (index >= io_tlb_nslabs) | |
542 | index = 0; | |
543 | } while (index != wrap); | |
544 | ||
545 | not_found: | |
546 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
547 | if (printk_ratelimit()) | |
548 | dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); | |
549 | return SWIOTLB_MAP_ERROR; | |
550 | found: | |
551 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
552 | ||
553 | /* | |
554 | * Save away the mapping from the original address to the DMA address. | |
555 | * This is needed when we sync the memory. Then we sync the buffer if | |
556 | * needed. | |
557 | */ | |
558 | for (i = 0; i < nslots; i++) | |
559 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); | |
560 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && | |
561 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
562 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); | |
563 | ||
564 | return tlb_addr; | |
565 | } | |
566 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); | |
567 | ||
568 | /* | |
569 | * Allocates bounce buffer and returns its kernel virtual address. | |
570 | */ | |
571 | ||
572 | static phys_addr_t | |
573 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, | |
574 | enum dma_data_direction dir, unsigned long attrs) | |
575 | { | |
576 | dma_addr_t start_dma_addr; | |
577 | ||
578 | if (swiotlb_force == SWIOTLB_NO_FORCE) { | |
579 | dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n", | |
580 | &phys); | |
581 | return SWIOTLB_MAP_ERROR; | |
582 | } | |
583 | ||
584 | start_dma_addr = phys_to_dma(hwdev, io_tlb_start); | |
585 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, | |
586 | dir, attrs); | |
587 | } | |
588 | ||
589 | /* | |
590 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
591 | */ | |
592 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, | |
593 | size_t size, enum dma_data_direction dir, | |
594 | unsigned long attrs) | |
595 | { | |
596 | unsigned long flags; | |
597 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
598 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
599 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
600 | ||
601 | /* | |
602 | * First, sync the memory before unmapping the entry | |
603 | */ | |
604 | if (orig_addr != INVALID_PHYS_ADDR && | |
605 | !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && | |
606 | ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | |
607 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); | |
608 | ||
609 | /* | |
610 | * Return the buffer to the free list by setting the corresponding | |
611 | * entries to indicate the number of contiguous entries available. | |
612 | * While returning the entries to the free list, we merge the entries | |
613 | * with slots below and above the pool being returned. | |
614 | */ | |
615 | spin_lock_irqsave(&io_tlb_lock, flags); | |
616 | { | |
617 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
618 | io_tlb_list[index + nslots] : 0); | |
619 | /* | |
620 | * Step 1: return the slots to the free list, merging the | |
621 | * slots with superceeding slots | |
622 | */ | |
623 | for (i = index + nslots - 1; i >= index; i--) { | |
624 | io_tlb_list[i] = ++count; | |
625 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
626 | } | |
627 | /* | |
628 | * Step 2: merge the returned slots with the preceding slots, | |
629 | * if available (non zero) | |
630 | */ | |
631 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
632 | io_tlb_list[i] = ++count; | |
633 | } | |
634 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
635 | } | |
636 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); | |
637 | ||
638 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, | |
639 | size_t size, enum dma_data_direction dir, | |
640 | enum dma_sync_target target) | |
641 | { | |
642 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
643 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
644 | ||
645 | if (orig_addr == INVALID_PHYS_ADDR) | |
646 | return; | |
647 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); | |
648 | ||
649 | switch (target) { | |
650 | case SYNC_FOR_CPU: | |
651 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
652 | swiotlb_bounce(orig_addr, tlb_addr, | |
653 | size, DMA_FROM_DEVICE); | |
654 | else | |
655 | BUG_ON(dir != DMA_TO_DEVICE); | |
656 | break; | |
657 | case SYNC_FOR_DEVICE: | |
658 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
659 | swiotlb_bounce(orig_addr, tlb_addr, | |
660 | size, DMA_TO_DEVICE); | |
661 | else | |
662 | BUG_ON(dir != DMA_FROM_DEVICE); | |
663 | break; | |
664 | default: | |
665 | BUG(); | |
666 | } | |
667 | } | |
668 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); | |
669 | ||
670 | void * | |
671 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
672 | dma_addr_t *dma_handle, gfp_t flags) | |
673 | { | |
674 | dma_addr_t dev_addr; | |
675 | void *ret; | |
676 | int order = get_order(size); | |
677 | u64 dma_mask = DMA_BIT_MASK(32); | |
678 | ||
679 | if (hwdev && hwdev->coherent_dma_mask) | |
680 | dma_mask = hwdev->coherent_dma_mask; | |
681 | ||
682 | ret = (void *)__get_free_pages(flags, order); | |
683 | if (ret) { | |
684 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); | |
685 | if (dev_addr + size - 1 > dma_mask) { | |
686 | /* | |
687 | * The allocated memory isn't reachable by the device. | |
688 | */ | |
689 | free_pages((unsigned long) ret, order); | |
690 | ret = NULL; | |
691 | } | |
692 | } | |
693 | if (!ret) { | |
694 | /* | |
695 | * We are either out of memory or the device can't DMA to | |
696 | * GFP_DMA memory; fall back on map_single(), which | |
697 | * will grab memory from the lowest available address range. | |
698 | */ | |
699 | phys_addr_t paddr = map_single(hwdev, 0, size, | |
700 | DMA_FROM_DEVICE, 0); | |
701 | if (paddr == SWIOTLB_MAP_ERROR) | |
702 | goto err_warn; | |
703 | ||
704 | ret = phys_to_virt(paddr); | |
705 | dev_addr = phys_to_dma(hwdev, paddr); | |
706 | ||
707 | /* Confirm address can be DMA'd by device */ | |
708 | if (dev_addr + size - 1 > dma_mask) { | |
709 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", | |
710 | (unsigned long long)dma_mask, | |
711 | (unsigned long long)dev_addr); | |
712 | ||
713 | /* | |
714 | * DMA_TO_DEVICE to avoid memcpy in unmap_single. | |
715 | * The DMA_ATTR_SKIP_CPU_SYNC is optional. | |
716 | */ | |
717 | swiotlb_tbl_unmap_single(hwdev, paddr, | |
718 | size, DMA_TO_DEVICE, | |
719 | DMA_ATTR_SKIP_CPU_SYNC); | |
720 | goto err_warn; | |
721 | } | |
722 | } | |
723 | ||
724 | *dma_handle = dev_addr; | |
725 | memset(ret, 0, size); | |
726 | ||
727 | return ret; | |
728 | ||
729 | err_warn: | |
730 | pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n", | |
731 | dev_name(hwdev), size); | |
732 | dump_stack(); | |
733 | ||
734 | return NULL; | |
735 | } | |
736 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | |
737 | ||
738 | void | |
739 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
740 | dma_addr_t dev_addr) | |
741 | { | |
742 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
743 | ||
744 | WARN_ON(irqs_disabled()); | |
745 | if (!is_swiotlb_buffer(paddr)) | |
746 | free_pages((unsigned long)vaddr, get_order(size)); | |
747 | else | |
748 | /* | |
749 | * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single. | |
750 | * DMA_ATTR_SKIP_CPU_SYNC is optional. | |
751 | */ | |
752 | swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE, | |
753 | DMA_ATTR_SKIP_CPU_SYNC); | |
754 | } | |
755 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
756 | ||
757 | static void | |
758 | swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir, | |
759 | int do_panic) | |
760 | { | |
761 | if (swiotlb_force == SWIOTLB_NO_FORCE) | |
762 | return; | |
763 | ||
764 | /* | |
765 | * Ran out of IOMMU space for this operation. This is very bad. | |
766 | * Unfortunately the drivers cannot handle this operation properly. | |
767 | * unless they check for dma_mapping_error (most don't) | |
768 | * When the mapping is small enough return a static buffer to limit | |
769 | * the damage, or panic when the transfer is too big. | |
770 | */ | |
771 | dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n", | |
772 | size); | |
773 | ||
774 | if (size <= io_tlb_overflow || !do_panic) | |
775 | return; | |
776 | ||
777 | if (dir == DMA_BIDIRECTIONAL) | |
778 | panic("DMA: Random memory could be DMA accessed\n"); | |
779 | if (dir == DMA_FROM_DEVICE) | |
780 | panic("DMA: Random memory could be DMA written\n"); | |
781 | if (dir == DMA_TO_DEVICE) | |
782 | panic("DMA: Random memory could be DMA read\n"); | |
783 | } | |
784 | ||
785 | /* | |
786 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
787 | * physical address to use is returned. | |
788 | * | |
789 | * Once the device is given the dma address, the device owns this memory until | |
790 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. | |
791 | */ | |
792 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, | |
793 | unsigned long offset, size_t size, | |
794 | enum dma_data_direction dir, | |
795 | unsigned long attrs) | |
796 | { | |
797 | phys_addr_t map, phys = page_to_phys(page) + offset; | |
798 | dma_addr_t dev_addr = phys_to_dma(dev, phys); | |
799 | ||
800 | BUG_ON(dir == DMA_NONE); | |
801 | /* | |
802 | * If the address happens to be in the device's DMA window, | |
803 | * we can safely return the device addr and not worry about bounce | |
804 | * buffering it. | |
805 | */ | |
806 | if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE) | |
807 | return dev_addr; | |
808 | ||
809 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); | |
810 | ||
811 | /* Oh well, have to allocate and map a bounce buffer. */ | |
812 | map = map_single(dev, phys, size, dir, attrs); | |
813 | if (map == SWIOTLB_MAP_ERROR) { | |
814 | swiotlb_full(dev, size, dir, 1); | |
815 | return phys_to_dma(dev, io_tlb_overflow_buffer); | |
816 | } | |
817 | ||
818 | dev_addr = phys_to_dma(dev, map); | |
819 | ||
820 | /* Ensure that the address returned is DMA'ble */ | |
821 | if (dma_capable(dev, dev_addr, size)) | |
822 | return dev_addr; | |
823 | ||
824 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; | |
825 | swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); | |
826 | ||
827 | return phys_to_dma(dev, io_tlb_overflow_buffer); | |
828 | } | |
829 | EXPORT_SYMBOL_GPL(swiotlb_map_page); | |
830 | ||
831 | /* | |
832 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
833 | * match what was provided for in a previous swiotlb_map_page call. All | |
834 | * other usages are undefined. | |
835 | * | |
836 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
837 | * whatever the device wrote there. | |
838 | */ | |
839 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, | |
840 | size_t size, enum dma_data_direction dir, | |
841 | unsigned long attrs) | |
842 | { | |
843 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
844 | ||
845 | BUG_ON(dir == DMA_NONE); | |
846 | ||
847 | if (is_swiotlb_buffer(paddr)) { | |
848 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); | |
849 | return; | |
850 | } | |
851 | ||
852 | if (dir != DMA_FROM_DEVICE) | |
853 | return; | |
854 | ||
855 | /* | |
856 | * phys_to_virt doesn't work with hihgmem page but we could | |
857 | * call dma_mark_clean() with hihgmem page here. However, we | |
858 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
859 | * make dma_mark_clean() take a physical address if necessary. | |
860 | */ | |
861 | dma_mark_clean(phys_to_virt(paddr), size); | |
862 | } | |
863 | ||
864 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
865 | size_t size, enum dma_data_direction dir, | |
866 | unsigned long attrs) | |
867 | { | |
868 | unmap_single(hwdev, dev_addr, size, dir, attrs); | |
869 | } | |
870 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); | |
871 | ||
872 | /* | |
873 | * Make physical memory consistent for a single streaming mode DMA translation | |
874 | * after a transfer. | |
875 | * | |
876 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer | |
877 | * using the cpu, yet do not wish to teardown the dma mapping, you must | |
878 | * call this function before doing so. At the next point you give the dma | |
879 | * address back to the card, you must first perform a | |
880 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
881 | */ | |
882 | static void | |
883 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, | |
884 | size_t size, enum dma_data_direction dir, | |
885 | enum dma_sync_target target) | |
886 | { | |
887 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
888 | ||
889 | BUG_ON(dir == DMA_NONE); | |
890 | ||
891 | if (is_swiotlb_buffer(paddr)) { | |
892 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); | |
893 | return; | |
894 | } | |
895 | ||
896 | if (dir != DMA_FROM_DEVICE) | |
897 | return; | |
898 | ||
899 | dma_mark_clean(phys_to_virt(paddr), size); | |
900 | } | |
901 | ||
902 | void | |
903 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
904 | size_t size, enum dma_data_direction dir) | |
905 | { | |
906 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); | |
907 | } | |
908 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
909 | ||
910 | void | |
911 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
912 | size_t size, enum dma_data_direction dir) | |
913 | { | |
914 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); | |
915 | } | |
916 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
917 | ||
918 | /* | |
919 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
920 | * This is the scatter-gather version of the above swiotlb_map_page | |
921 | * interface. Here the scatter gather list elements are each tagged with the | |
922 | * appropriate dma address and length. They are obtained via | |
923 | * sg_dma_{address,length}(SG). | |
924 | * | |
925 | * NOTE: An implementation may be able to use a smaller number of | |
926 | * DMA address/length pairs than there are SG table elements. | |
927 | * (for example via virtual mapping capabilities) | |
928 | * The routine returns the number of addr/length pairs actually | |
929 | * used, at most nents. | |
930 | * | |
931 | * Device ownership issues as mentioned above for swiotlb_map_page are the | |
932 | * same here. | |
933 | */ | |
934 | int | |
935 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
936 | enum dma_data_direction dir, unsigned long attrs) | |
937 | { | |
938 | struct scatterlist *sg; | |
939 | int i; | |
940 | ||
941 | BUG_ON(dir == DMA_NONE); | |
942 | ||
943 | for_each_sg(sgl, sg, nelems, i) { | |
944 | phys_addr_t paddr = sg_phys(sg); | |
945 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); | |
946 | ||
947 | if (swiotlb_force == SWIOTLB_FORCE || | |
948 | !dma_capable(hwdev, dev_addr, sg->length)) { | |
949 | phys_addr_t map = map_single(hwdev, sg_phys(sg), | |
950 | sg->length, dir, attrs); | |
951 | if (map == SWIOTLB_MAP_ERROR) { | |
952 | /* Don't panic here, we expect map_sg users | |
953 | to do proper error handling. */ | |
954 | swiotlb_full(hwdev, sg->length, dir, 0); | |
955 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; | |
956 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, | |
957 | attrs); | |
958 | sg_dma_len(sgl) = 0; | |
959 | return 0; | |
960 | } | |
961 | sg->dma_address = phys_to_dma(hwdev, map); | |
962 | } else | |
963 | sg->dma_address = dev_addr; | |
964 | sg_dma_len(sg) = sg->length; | |
965 | } | |
966 | return nelems; | |
967 | } | |
968 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); | |
969 | ||
970 | /* | |
971 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
972 | * concerning calls here are the same as for swiotlb_unmap_page() above. | |
973 | */ | |
974 | void | |
975 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, | |
976 | int nelems, enum dma_data_direction dir, | |
977 | unsigned long attrs) | |
978 | { | |
979 | struct scatterlist *sg; | |
980 | int i; | |
981 | ||
982 | BUG_ON(dir == DMA_NONE); | |
983 | ||
984 | for_each_sg(sgl, sg, nelems, i) | |
985 | unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, | |
986 | attrs); | |
987 | } | |
988 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); | |
989 | ||
990 | /* | |
991 | * Make physical memory consistent for a set of streaming mode DMA translations | |
992 | * after a transfer. | |
993 | * | |
994 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
995 | * and usage. | |
996 | */ | |
997 | static void | |
998 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, | |
999 | int nelems, enum dma_data_direction dir, | |
1000 | enum dma_sync_target target) | |
1001 | { | |
1002 | struct scatterlist *sg; | |
1003 | int i; | |
1004 | ||
1005 | for_each_sg(sgl, sg, nelems, i) | |
1006 | swiotlb_sync_single(hwdev, sg->dma_address, | |
1007 | sg_dma_len(sg), dir, target); | |
1008 | } | |
1009 | ||
1010 | void | |
1011 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
1012 | int nelems, enum dma_data_direction dir) | |
1013 | { | |
1014 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); | |
1015 | } | |
1016 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | |
1017 | ||
1018 | void | |
1019 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
1020 | int nelems, enum dma_data_direction dir) | |
1021 | { | |
1022 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); | |
1023 | } | |
1024 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
1025 | ||
1026 | int | |
1027 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) | |
1028 | { | |
1029 | return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer)); | |
1030 | } | |
1031 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
1032 | ||
1033 | /* | |
1034 | * Return whether the given device DMA address mask can be supported | |
1035 | * properly. For example, if your device can only drive the low 24-bits | |
1036 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
1037 | * this function. | |
1038 | */ | |
1039 | int | |
1040 | swiotlb_dma_supported(struct device *hwdev, u64 mask) | |
1041 | { | |
1042 | return phys_to_dma(hwdev, io_tlb_end - 1) <= mask; | |
1043 | } | |
1044 | EXPORT_SYMBOL(swiotlb_dma_supported); |