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Commit | Line | Data |
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1 | /* | |
2 | * Dynamic DMA mapping support. | |
3 | * | |
4 | * This implementation is a fallback for platforms that do not support | |
5 | * I/O TLBs (aka DMA address translation hardware). | |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
17 | */ | |
18 | ||
19 | #include <linux/cache.h> | |
20 | #include <linux/dma-mapping.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/swiotlb.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/swiotlb.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/ctype.h> | |
29 | ||
30 | #include <asm/io.h> | |
31 | #include <asm/dma.h> | |
32 | #include <asm/scatterlist.h> | |
33 | ||
34 | #include <linux/init.h> | |
35 | #include <linux/bootmem.h> | |
36 | #include <linux/iommu-helper.h> | |
37 | ||
38 | #define OFFSET(val,align) ((unsigned long) \ | |
39 | ( (val) & ( (align) - 1))) | |
40 | ||
41 | #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg))) | |
42 | #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg)) | |
43 | ||
44 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | |
45 | ||
46 | /* | |
47 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
48 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
49 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
50 | */ | |
51 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
52 | ||
53 | /* | |
54 | * Enumeration for sync targets | |
55 | */ | |
56 | enum dma_sync_target { | |
57 | SYNC_FOR_CPU = 0, | |
58 | SYNC_FOR_DEVICE = 1, | |
59 | }; | |
60 | ||
61 | int swiotlb_force; | |
62 | ||
63 | /* | |
64 | * Used to do a quick range check in swiotlb_unmap_single and | |
65 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | |
66 | * API. | |
67 | */ | |
68 | static char *io_tlb_start, *io_tlb_end; | |
69 | ||
70 | /* | |
71 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
72 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
73 | */ | |
74 | static unsigned long io_tlb_nslabs; | |
75 | ||
76 | /* | |
77 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
78 | */ | |
79 | static unsigned long io_tlb_overflow = 32*1024; | |
80 | ||
81 | void *io_tlb_overflow_buffer; | |
82 | ||
83 | /* | |
84 | * This is a free list describing the number of free entries available from | |
85 | * each index | |
86 | */ | |
87 | static unsigned int *io_tlb_list; | |
88 | static unsigned int io_tlb_index; | |
89 | ||
90 | /* | |
91 | * We need to save away the original address corresponding to a mapped entry | |
92 | * for the sync operations. | |
93 | */ | |
94 | static unsigned char **io_tlb_orig_addr; | |
95 | ||
96 | /* | |
97 | * Protect the above data structures in the map and unmap calls | |
98 | */ | |
99 | static DEFINE_SPINLOCK(io_tlb_lock); | |
100 | ||
101 | static int __init | |
102 | setup_io_tlb_npages(char *str) | |
103 | { | |
104 | if (isdigit(*str)) { | |
105 | io_tlb_nslabs = simple_strtoul(str, &str, 0); | |
106 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | |
107 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
108 | } | |
109 | if (*str == ',') | |
110 | ++str; | |
111 | if (!strcmp(str, "force")) | |
112 | swiotlb_force = 1; | |
113 | return 1; | |
114 | } | |
115 | __setup("swiotlb=", setup_io_tlb_npages); | |
116 | /* make io_tlb_overflow tunable too? */ | |
117 | ||
118 | void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs) | |
119 | { | |
120 | return alloc_bootmem_low_pages(size); | |
121 | } | |
122 | ||
123 | void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs) | |
124 | { | |
125 | return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order); | |
126 | } | |
127 | ||
128 | /* | |
129 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
130 | * structures for the software IO TLB used to implement the DMA API. | |
131 | */ | |
132 | void __init | |
133 | swiotlb_init_with_default_size(size_t default_size) | |
134 | { | |
135 | unsigned long i, bytes; | |
136 | ||
137 | if (!io_tlb_nslabs) { | |
138 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
139 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
140 | } | |
141 | ||
142 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
143 | ||
144 | /* | |
145 | * Get IO TLB memory from the low pages | |
146 | */ | |
147 | io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs); | |
148 | if (!io_tlb_start) | |
149 | panic("Cannot allocate SWIOTLB buffer"); | |
150 | io_tlb_end = io_tlb_start + bytes; | |
151 | ||
152 | /* | |
153 | * Allocate and initialize the free list array. This array is used | |
154 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
155 | * between io_tlb_start and io_tlb_end. | |
156 | */ | |
157 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
158 | for (i = 0; i < io_tlb_nslabs; i++) | |
159 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
160 | io_tlb_index = 0; | |
161 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); | |
162 | ||
163 | /* | |
164 | * Get the overflow emergency buffer | |
165 | */ | |
166 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
167 | if (!io_tlb_overflow_buffer) | |
168 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
169 | ||
170 | printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", | |
171 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
172 | } | |
173 | ||
174 | void __init | |
175 | swiotlb_init(void) | |
176 | { | |
177 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ | |
178 | } | |
179 | ||
180 | /* | |
181 | * Systems with larger DMA zones (those that don't support ISA) can | |
182 | * initialize the swiotlb later using the slab allocator if needed. | |
183 | * This should be just like above, but with some error catching. | |
184 | */ | |
185 | int | |
186 | swiotlb_late_init_with_default_size(size_t default_size) | |
187 | { | |
188 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; | |
189 | unsigned int order; | |
190 | ||
191 | if (!io_tlb_nslabs) { | |
192 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
193 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
194 | } | |
195 | ||
196 | /* | |
197 | * Get IO TLB memory from the low pages | |
198 | */ | |
199 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); | |
200 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
201 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
202 | ||
203 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
204 | io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs); | |
205 | if (io_tlb_start) | |
206 | break; | |
207 | order--; | |
208 | } | |
209 | ||
210 | if (!io_tlb_start) | |
211 | goto cleanup1; | |
212 | ||
213 | if (order != get_order(bytes)) { | |
214 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " | |
215 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
216 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
217 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
218 | } | |
219 | io_tlb_end = io_tlb_start + bytes; | |
220 | memset(io_tlb_start, 0, bytes); | |
221 | ||
222 | /* | |
223 | * Allocate and initialize the free list array. This array is used | |
224 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
225 | * between io_tlb_start and io_tlb_end. | |
226 | */ | |
227 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
228 | get_order(io_tlb_nslabs * sizeof(int))); | |
229 | if (!io_tlb_list) | |
230 | goto cleanup2; | |
231 | ||
232 | for (i = 0; i < io_tlb_nslabs; i++) | |
233 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
234 | io_tlb_index = 0; | |
235 | ||
236 | io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL, | |
237 | get_order(io_tlb_nslabs * sizeof(char *))); | |
238 | if (!io_tlb_orig_addr) | |
239 | goto cleanup3; | |
240 | ||
241 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *)); | |
242 | ||
243 | /* | |
244 | * Get the overflow emergency buffer | |
245 | */ | |
246 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
247 | get_order(io_tlb_overflow)); | |
248 | if (!io_tlb_overflow_buffer) | |
249 | goto cleanup4; | |
250 | ||
251 | printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " | |
252 | "0x%lx\n", bytes >> 20, | |
253 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
254 | ||
255 | return 0; | |
256 | ||
257 | cleanup4: | |
258 | free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * | |
259 | sizeof(char *))); | |
260 | io_tlb_orig_addr = NULL; | |
261 | cleanup3: | |
262 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
263 | sizeof(int))); | |
264 | io_tlb_list = NULL; | |
265 | cleanup2: | |
266 | io_tlb_end = NULL; | |
267 | free_pages((unsigned long)io_tlb_start, order); | |
268 | io_tlb_start = NULL; | |
269 | cleanup1: | |
270 | io_tlb_nslabs = req_nslabs; | |
271 | return -ENOMEM; | |
272 | } | |
273 | ||
274 | static int | |
275 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) | |
276 | { | |
277 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); | |
278 | } | |
279 | ||
280 | static int is_swiotlb_buffer(char *addr) | |
281 | { | |
282 | return addr >= io_tlb_start && addr < io_tlb_end; | |
283 | } | |
284 | ||
285 | /* | |
286 | * Allocates bounce buffer and returns its kernel virtual address. | |
287 | */ | |
288 | static void * | |
289 | map_single(struct device *hwdev, char *buffer, size_t size, int dir) | |
290 | { | |
291 | unsigned long flags; | |
292 | char *dma_addr; | |
293 | unsigned int nslots, stride, index, wrap; | |
294 | int i; | |
295 | unsigned long start_dma_addr; | |
296 | unsigned long mask; | |
297 | unsigned long offset_slots; | |
298 | unsigned long max_slots; | |
299 | ||
300 | mask = dma_get_seg_boundary(hwdev); | |
301 | start_dma_addr = virt_to_bus(io_tlb_start) & mask; | |
302 | ||
303 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
304 | max_slots = mask + 1 | |
305 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
306 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
307 | ||
308 | /* | |
309 | * For mappings greater than a page, we limit the stride (and | |
310 | * hence alignment) to a page size. | |
311 | */ | |
312 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
313 | if (size > PAGE_SIZE) | |
314 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
315 | else | |
316 | stride = 1; | |
317 | ||
318 | BUG_ON(!nslots); | |
319 | ||
320 | /* | |
321 | * Find suitable number of IO TLB entries size that will fit this | |
322 | * request and allocate a buffer from that IO TLB pool. | |
323 | */ | |
324 | spin_lock_irqsave(&io_tlb_lock, flags); | |
325 | index = ALIGN(io_tlb_index, stride); | |
326 | if (index >= io_tlb_nslabs) | |
327 | index = 0; | |
328 | wrap = index; | |
329 | ||
330 | do { | |
331 | while (iommu_is_span_boundary(index, nslots, offset_slots, | |
332 | max_slots)) { | |
333 | index += stride; | |
334 | if (index >= io_tlb_nslabs) | |
335 | index = 0; | |
336 | if (index == wrap) | |
337 | goto not_found; | |
338 | } | |
339 | ||
340 | /* | |
341 | * If we find a slot that indicates we have 'nslots' number of | |
342 | * contiguous buffers, we allocate the buffers from that slot | |
343 | * and mark the entries as '0' indicating unavailable. | |
344 | */ | |
345 | if (io_tlb_list[index] >= nslots) { | |
346 | int count = 0; | |
347 | ||
348 | for (i = index; i < (int) (index + nslots); i++) | |
349 | io_tlb_list[i] = 0; | |
350 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
351 | io_tlb_list[i] = ++count; | |
352 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
353 | ||
354 | /* | |
355 | * Update the indices to avoid searching in the next | |
356 | * round. | |
357 | */ | |
358 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
359 | ? (index + nslots) : 0); | |
360 | ||
361 | goto found; | |
362 | } | |
363 | index += stride; | |
364 | if (index >= io_tlb_nslabs) | |
365 | index = 0; | |
366 | } while (index != wrap); | |
367 | ||
368 | not_found: | |
369 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
370 | return NULL; | |
371 | found: | |
372 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
373 | ||
374 | /* | |
375 | * Save away the mapping from the original address to the DMA address. | |
376 | * This is needed when we sync the memory. Then we sync the buffer if | |
377 | * needed. | |
378 | */ | |
379 | for (i = 0; i < nslots; i++) | |
380 | io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT); | |
381 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
382 | memcpy(dma_addr, buffer, size); | |
383 | ||
384 | return dma_addr; | |
385 | } | |
386 | ||
387 | /* | |
388 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
389 | */ | |
390 | static void | |
391 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
392 | { | |
393 | unsigned long flags; | |
394 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
395 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
396 | char *buffer = io_tlb_orig_addr[index]; | |
397 | ||
398 | /* | |
399 | * First, sync the memory before unmapping the entry | |
400 | */ | |
401 | if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | |
402 | /* | |
403 | * bounce... copy the data back into the original buffer * and | |
404 | * delete the bounce buffer. | |
405 | */ | |
406 | memcpy(buffer, dma_addr, size); | |
407 | ||
408 | /* | |
409 | * Return the buffer to the free list by setting the corresponding | |
410 | * entries to indicate the number of contigous entries available. | |
411 | * While returning the entries to the free list, we merge the entries | |
412 | * with slots below and above the pool being returned. | |
413 | */ | |
414 | spin_lock_irqsave(&io_tlb_lock, flags); | |
415 | { | |
416 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
417 | io_tlb_list[index + nslots] : 0); | |
418 | /* | |
419 | * Step 1: return the slots to the free list, merging the | |
420 | * slots with superceeding slots | |
421 | */ | |
422 | for (i = index + nslots - 1; i >= index; i--) | |
423 | io_tlb_list[i] = ++count; | |
424 | /* | |
425 | * Step 2: merge the returned slots with the preceding slots, | |
426 | * if available (non zero) | |
427 | */ | |
428 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
429 | io_tlb_list[i] = ++count; | |
430 | } | |
431 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
432 | } | |
433 | ||
434 | static void | |
435 | sync_single(struct device *hwdev, char *dma_addr, size_t size, | |
436 | int dir, int target) | |
437 | { | |
438 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
439 | char *buffer = io_tlb_orig_addr[index]; | |
440 | ||
441 | buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
442 | ||
443 | switch (target) { | |
444 | case SYNC_FOR_CPU: | |
445 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
446 | memcpy(buffer, dma_addr, size); | |
447 | else | |
448 | BUG_ON(dir != DMA_TO_DEVICE); | |
449 | break; | |
450 | case SYNC_FOR_DEVICE: | |
451 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
452 | memcpy(dma_addr, buffer, size); | |
453 | else | |
454 | BUG_ON(dir != DMA_FROM_DEVICE); | |
455 | break; | |
456 | default: | |
457 | BUG(); | |
458 | } | |
459 | } | |
460 | ||
461 | void * | |
462 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
463 | dma_addr_t *dma_handle, gfp_t flags) | |
464 | { | |
465 | dma_addr_t dev_addr; | |
466 | void *ret; | |
467 | int order = get_order(size); | |
468 | u64 dma_mask = DMA_32BIT_MASK; | |
469 | ||
470 | if (hwdev && hwdev->coherent_dma_mask) | |
471 | dma_mask = hwdev->coherent_dma_mask; | |
472 | ||
473 | ret = (void *)__get_free_pages(flags, order); | |
474 | if (ret && !is_buffer_dma_capable(dma_mask, virt_to_bus(ret), size)) { | |
475 | /* | |
476 | * The allocated memory isn't reachable by the device. | |
477 | * Fall back on swiotlb_map_single(). | |
478 | */ | |
479 | free_pages((unsigned long) ret, order); | |
480 | ret = NULL; | |
481 | } | |
482 | if (!ret) { | |
483 | /* | |
484 | * We are either out of memory or the device can't DMA | |
485 | * to GFP_DMA memory; fall back on | |
486 | * swiotlb_map_single(), which will grab memory from | |
487 | * the lowest available address range. | |
488 | */ | |
489 | ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE); | |
490 | if (!ret) | |
491 | return NULL; | |
492 | } | |
493 | ||
494 | memset(ret, 0, size); | |
495 | dev_addr = virt_to_bus(ret); | |
496 | ||
497 | /* Confirm address can be DMA'd by device */ | |
498 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { | |
499 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", | |
500 | (unsigned long long)dma_mask, | |
501 | (unsigned long long)dev_addr); | |
502 | ||
503 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
504 | unmap_single(hwdev, ret, size, DMA_TO_DEVICE); | |
505 | return NULL; | |
506 | } | |
507 | *dma_handle = dev_addr; | |
508 | return ret; | |
509 | } | |
510 | ||
511 | void | |
512 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
513 | dma_addr_t dma_handle) | |
514 | { | |
515 | WARN_ON(irqs_disabled()); | |
516 | if (!is_swiotlb_buffer(vaddr)) | |
517 | free_pages((unsigned long) vaddr, get_order(size)); | |
518 | else | |
519 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
520 | unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); | |
521 | } | |
522 | ||
523 | static void | |
524 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
525 | { | |
526 | /* | |
527 | * Ran out of IOMMU space for this operation. This is very bad. | |
528 | * Unfortunately the drivers cannot handle this operation properly. | |
529 | * unless they check for dma_mapping_error (most don't) | |
530 | * When the mapping is small enough return a static buffer to limit | |
531 | * the damage, or panic when the transfer is too big. | |
532 | */ | |
533 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " | |
534 | "device %s\n", size, dev ? dev->bus_id : "?"); | |
535 | ||
536 | if (size > io_tlb_overflow && do_panic) { | |
537 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) | |
538 | panic("DMA: Memory would be corrupted\n"); | |
539 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
540 | panic("DMA: Random memory would be DMAed\n"); | |
541 | } | |
542 | } | |
543 | ||
544 | /* | |
545 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
546 | * physical address to use is returned. | |
547 | * | |
548 | * Once the device is given the dma address, the device owns this memory until | |
549 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | |
550 | */ | |
551 | dma_addr_t | |
552 | swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, | |
553 | int dir, struct dma_attrs *attrs) | |
554 | { | |
555 | dma_addr_t dev_addr = virt_to_bus(ptr); | |
556 | void *map; | |
557 | ||
558 | BUG_ON(dir == DMA_NONE); | |
559 | /* | |
560 | * If the pointer passed in happens to be in the device's DMA window, | |
561 | * we can safely return the device addr and not worry about bounce | |
562 | * buffering it. | |
563 | */ | |
564 | if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force) | |
565 | return dev_addr; | |
566 | ||
567 | /* | |
568 | * Oh well, have to allocate and map a bounce buffer. | |
569 | */ | |
570 | map = map_single(hwdev, ptr, size, dir); | |
571 | if (!map) { | |
572 | swiotlb_full(hwdev, size, dir, 1); | |
573 | map = io_tlb_overflow_buffer; | |
574 | } | |
575 | ||
576 | dev_addr = virt_to_bus(map); | |
577 | ||
578 | /* | |
579 | * Ensure that the address returned is DMA'ble | |
580 | */ | |
581 | if (address_needs_mapping(hwdev, dev_addr, size)) | |
582 | panic("map_single: bounce buffer is not DMA'ble"); | |
583 | ||
584 | return dev_addr; | |
585 | } | |
586 | EXPORT_SYMBOL(swiotlb_map_single_attrs); | |
587 | ||
588 | dma_addr_t | |
589 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | |
590 | { | |
591 | return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL); | |
592 | } | |
593 | ||
594 | /* | |
595 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
596 | * match what was provided for in a previous swiotlb_map_single call. All | |
597 | * other usages are undefined. | |
598 | * | |
599 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
600 | * whatever the device wrote there. | |
601 | */ | |
602 | void | |
603 | swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, | |
604 | size_t size, int dir, struct dma_attrs *attrs) | |
605 | { | |
606 | char *dma_addr = bus_to_virt(dev_addr); | |
607 | ||
608 | BUG_ON(dir == DMA_NONE); | |
609 | if (is_swiotlb_buffer(dma_addr)) | |
610 | unmap_single(hwdev, dma_addr, size, dir); | |
611 | else if (dir == DMA_FROM_DEVICE) | |
612 | dma_mark_clean(dma_addr, size); | |
613 | } | |
614 | EXPORT_SYMBOL(swiotlb_unmap_single_attrs); | |
615 | ||
616 | void | |
617 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | |
618 | int dir) | |
619 | { | |
620 | return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL); | |
621 | } | |
622 | /* | |
623 | * Make physical memory consistent for a single streaming mode DMA translation | |
624 | * after a transfer. | |
625 | * | |
626 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | |
627 | * using the cpu, yet do not wish to teardown the dma mapping, you must | |
628 | * call this function before doing so. At the next point you give the dma | |
629 | * address back to the card, you must first perform a | |
630 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
631 | */ | |
632 | static void | |
633 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, | |
634 | size_t size, int dir, int target) | |
635 | { | |
636 | char *dma_addr = bus_to_virt(dev_addr); | |
637 | ||
638 | BUG_ON(dir == DMA_NONE); | |
639 | if (is_swiotlb_buffer(dma_addr)) | |
640 | sync_single(hwdev, dma_addr, size, dir, target); | |
641 | else if (dir == DMA_FROM_DEVICE) | |
642 | dma_mark_clean(dma_addr, size); | |
643 | } | |
644 | ||
645 | void | |
646 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
647 | size_t size, int dir) | |
648 | { | |
649 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); | |
650 | } | |
651 | ||
652 | void | |
653 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
654 | size_t size, int dir) | |
655 | { | |
656 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); | |
657 | } | |
658 | ||
659 | /* | |
660 | * Same as above, but for a sub-range of the mapping. | |
661 | */ | |
662 | static void | |
663 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, | |
664 | unsigned long offset, size_t size, | |
665 | int dir, int target) | |
666 | { | |
667 | char *dma_addr = bus_to_virt(dev_addr) + offset; | |
668 | ||
669 | BUG_ON(dir == DMA_NONE); | |
670 | if (is_swiotlb_buffer(dma_addr)) | |
671 | sync_single(hwdev, dma_addr, size, dir, target); | |
672 | else if (dir == DMA_FROM_DEVICE) | |
673 | dma_mark_clean(dma_addr, size); | |
674 | } | |
675 | ||
676 | void | |
677 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
678 | unsigned long offset, size_t size, int dir) | |
679 | { | |
680 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, | |
681 | SYNC_FOR_CPU); | |
682 | } | |
683 | ||
684 | void | |
685 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
686 | unsigned long offset, size_t size, int dir) | |
687 | { | |
688 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, | |
689 | SYNC_FOR_DEVICE); | |
690 | } | |
691 | ||
692 | void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int, | |
693 | struct dma_attrs *); | |
694 | /* | |
695 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
696 | * This is the scatter-gather version of the above swiotlb_map_single | |
697 | * interface. Here the scatter gather list elements are each tagged with the | |
698 | * appropriate dma address and length. They are obtained via | |
699 | * sg_dma_{address,length}(SG). | |
700 | * | |
701 | * NOTE: An implementation may be able to use a smaller number of | |
702 | * DMA address/length pairs than there are SG table elements. | |
703 | * (for example via virtual mapping capabilities) | |
704 | * The routine returns the number of addr/length pairs actually | |
705 | * used, at most nents. | |
706 | * | |
707 | * Device ownership issues as mentioned above for swiotlb_map_single are the | |
708 | * same here. | |
709 | */ | |
710 | int | |
711 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
712 | int dir, struct dma_attrs *attrs) | |
713 | { | |
714 | struct scatterlist *sg; | |
715 | void *addr; | |
716 | dma_addr_t dev_addr; | |
717 | int i; | |
718 | ||
719 | BUG_ON(dir == DMA_NONE); | |
720 | ||
721 | for_each_sg(sgl, sg, nelems, i) { | |
722 | addr = SG_ENT_VIRT_ADDRESS(sg); | |
723 | dev_addr = virt_to_bus(addr); | |
724 | if (swiotlb_force || | |
725 | address_needs_mapping(hwdev, dev_addr, sg->length)) { | |
726 | void *map = map_single(hwdev, addr, sg->length, dir); | |
727 | if (!map) { | |
728 | /* Don't panic here, we expect map_sg users | |
729 | to do proper error handling. */ | |
730 | swiotlb_full(hwdev, sg->length, dir, 0); | |
731 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, | |
732 | attrs); | |
733 | sgl[0].dma_length = 0; | |
734 | return 0; | |
735 | } | |
736 | sg->dma_address = virt_to_bus(map); | |
737 | } else | |
738 | sg->dma_address = dev_addr; | |
739 | sg->dma_length = sg->length; | |
740 | } | |
741 | return nelems; | |
742 | } | |
743 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); | |
744 | ||
745 | int | |
746 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
747 | int dir) | |
748 | { | |
749 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
750 | } | |
751 | ||
752 | /* | |
753 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
754 | * concerning calls here are the same as for swiotlb_unmap_single() above. | |
755 | */ | |
756 | void | |
757 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, | |
758 | int nelems, int dir, struct dma_attrs *attrs) | |
759 | { | |
760 | struct scatterlist *sg; | |
761 | int i; | |
762 | ||
763 | BUG_ON(dir == DMA_NONE); | |
764 | ||
765 | for_each_sg(sgl, sg, nelems, i) { | |
766 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | |
767 | unmap_single(hwdev, bus_to_virt(sg->dma_address), | |
768 | sg->dma_length, dir); | |
769 | else if (dir == DMA_FROM_DEVICE) | |
770 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | |
771 | } | |
772 | } | |
773 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); | |
774 | ||
775 | void | |
776 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
777 | int dir) | |
778 | { | |
779 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
780 | } | |
781 | ||
782 | /* | |
783 | * Make physical memory consistent for a set of streaming mode DMA translations | |
784 | * after a transfer. | |
785 | * | |
786 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
787 | * and usage. | |
788 | */ | |
789 | static void | |
790 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, | |
791 | int nelems, int dir, int target) | |
792 | { | |
793 | struct scatterlist *sg; | |
794 | int i; | |
795 | ||
796 | BUG_ON(dir == DMA_NONE); | |
797 | ||
798 | for_each_sg(sgl, sg, nelems, i) { | |
799 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | |
800 | sync_single(hwdev, bus_to_virt(sg->dma_address), | |
801 | sg->dma_length, dir, target); | |
802 | else if (dir == DMA_FROM_DEVICE) | |
803 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | |
804 | } | |
805 | } | |
806 | ||
807 | void | |
808 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
809 | int nelems, int dir) | |
810 | { | |
811 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); | |
812 | } | |
813 | ||
814 | void | |
815 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
816 | int nelems, int dir) | |
817 | { | |
818 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); | |
819 | } | |
820 | ||
821 | int | |
822 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) | |
823 | { | |
824 | return (dma_addr == virt_to_bus(io_tlb_overflow_buffer)); | |
825 | } | |
826 | ||
827 | /* | |
828 | * Return whether the given device DMA address mask can be supported | |
829 | * properly. For example, if your device can only drive the low 24-bits | |
830 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
831 | * this function. | |
832 | */ | |
833 | int | |
834 | swiotlb_dma_supported(struct device *hwdev, u64 mask) | |
835 | { | |
836 | return virt_to_bus(io_tlb_end - 1) <= mask; | |
837 | } | |
838 | ||
839 | EXPORT_SYMBOL(swiotlb_map_single); | |
840 | EXPORT_SYMBOL(swiotlb_unmap_single); | |
841 | EXPORT_SYMBOL(swiotlb_map_sg); | |
842 | EXPORT_SYMBOL(swiotlb_unmap_sg); | |
843 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
844 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
845 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); | |
846 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); | |
847 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | |
848 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
849 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
850 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | |
851 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
852 | EXPORT_SYMBOL(swiotlb_dma_supported); |