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Commit | Line | Data |
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1 | /* | |
2 | * Dynamic DMA mapping support. | |
3 | * | |
4 | * This implementation is a fallback for platforms that do not support | |
5 | * I/O TLBs (aka DMA address translation hardware). | |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
17 | * 08/12/11 beckyb Add highmem support | |
18 | */ | |
19 | ||
20 | #include <linux/cache.h> | |
21 | #include <linux/dma-mapping.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/export.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/swiotlb.h> | |
27 | #include <linux/pfn.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/ctype.h> | |
30 | #include <linux/highmem.h> | |
31 | #include <linux/gfp.h> | |
32 | ||
33 | #include <asm/io.h> | |
34 | #include <asm/dma.h> | |
35 | #include <asm/scatterlist.h> | |
36 | ||
37 | #include <linux/init.h> | |
38 | #include <linux/bootmem.h> | |
39 | #include <linux/iommu-helper.h> | |
40 | ||
41 | #include <trace/events/swiotlb.h> | |
42 | ||
43 | #define OFFSET(val,align) ((unsigned long) \ | |
44 | ( (val) & ( (align) - 1))) | |
45 | ||
46 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | |
47 | ||
48 | /* | |
49 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
50 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
51 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
52 | */ | |
53 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
54 | ||
55 | int swiotlb_force; | |
56 | ||
57 | /* | |
58 | * Used to do a quick range check in swiotlb_tbl_unmap_single and | |
59 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
60 | * API. | |
61 | */ | |
62 | static phys_addr_t io_tlb_start, io_tlb_end; | |
63 | ||
64 | /* | |
65 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and | |
66 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
67 | */ | |
68 | static unsigned long io_tlb_nslabs; | |
69 | ||
70 | /* | |
71 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
72 | */ | |
73 | static unsigned long io_tlb_overflow = 32*1024; | |
74 | ||
75 | static phys_addr_t io_tlb_overflow_buffer; | |
76 | ||
77 | /* | |
78 | * This is a free list describing the number of free entries available from | |
79 | * each index | |
80 | */ | |
81 | static unsigned int *io_tlb_list; | |
82 | static unsigned int io_tlb_index; | |
83 | ||
84 | /* | |
85 | * We need to save away the original address corresponding to a mapped entry | |
86 | * for the sync operations. | |
87 | */ | |
88 | static phys_addr_t *io_tlb_orig_addr; | |
89 | ||
90 | /* | |
91 | * Protect the above data structures in the map and unmap calls | |
92 | */ | |
93 | static DEFINE_SPINLOCK(io_tlb_lock); | |
94 | ||
95 | static int late_alloc; | |
96 | ||
97 | static int __init | |
98 | setup_io_tlb_npages(char *str) | |
99 | { | |
100 | if (isdigit(*str)) { | |
101 | io_tlb_nslabs = simple_strtoul(str, &str, 0); | |
102 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | |
103 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
104 | } | |
105 | if (*str == ',') | |
106 | ++str; | |
107 | if (!strcmp(str, "force")) | |
108 | swiotlb_force = 1; | |
109 | ||
110 | return 0; | |
111 | } | |
112 | early_param("swiotlb", setup_io_tlb_npages); | |
113 | /* make io_tlb_overflow tunable too? */ | |
114 | ||
115 | unsigned long swiotlb_nr_tbl(void) | |
116 | { | |
117 | return io_tlb_nslabs; | |
118 | } | |
119 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); | |
120 | ||
121 | /* default to 64MB */ | |
122 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) | |
123 | unsigned long swiotlb_size_or_default(void) | |
124 | { | |
125 | unsigned long size; | |
126 | ||
127 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
128 | ||
129 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
130 | } | |
131 | ||
132 | /* Note that this doesn't work with highmem page */ | |
133 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, | |
134 | volatile void *address) | |
135 | { | |
136 | return phys_to_dma(hwdev, virt_to_phys(address)); | |
137 | } | |
138 | ||
139 | static bool no_iotlb_memory; | |
140 | ||
141 | void swiotlb_print_info(void) | |
142 | { | |
143 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
144 | unsigned char *vstart, *vend; | |
145 | ||
146 | if (no_iotlb_memory) { | |
147 | pr_warn("software IO TLB: No low mem\n"); | |
148 | return; | |
149 | } | |
150 | ||
151 | vstart = phys_to_virt(io_tlb_start); | |
152 | vend = phys_to_virt(io_tlb_end); | |
153 | ||
154 | printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n", | |
155 | (unsigned long long)io_tlb_start, | |
156 | (unsigned long long)io_tlb_end, | |
157 | bytes >> 20, vstart, vend - 1); | |
158 | } | |
159 | ||
160 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) | |
161 | { | |
162 | void *v_overflow_buffer; | |
163 | unsigned long i, bytes; | |
164 | ||
165 | bytes = nslabs << IO_TLB_SHIFT; | |
166 | ||
167 | io_tlb_nslabs = nslabs; | |
168 | io_tlb_start = __pa(tlb); | |
169 | io_tlb_end = io_tlb_start + bytes; | |
170 | ||
171 | /* | |
172 | * Get the overflow emergency buffer | |
173 | */ | |
174 | v_overflow_buffer = alloc_bootmem_low_pages_nopanic( | |
175 | PAGE_ALIGN(io_tlb_overflow)); | |
176 | if (!v_overflow_buffer) | |
177 | return -ENOMEM; | |
178 | ||
179 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); | |
180 | ||
181 | /* | |
182 | * Allocate and initialize the free list array. This array is used | |
183 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
184 | * between io_tlb_start and io_tlb_end. | |
185 | */ | |
186 | io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
187 | for (i = 0; i < io_tlb_nslabs; i++) | |
188 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
189 | io_tlb_index = 0; | |
190 | io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
191 | ||
192 | if (verbose) | |
193 | swiotlb_print_info(); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | /* | |
199 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
200 | * structures for the software IO TLB used to implement the DMA API. | |
201 | */ | |
202 | void __init | |
203 | swiotlb_init(int verbose) | |
204 | { | |
205 | size_t default_size = IO_TLB_DEFAULT_SIZE; | |
206 | unsigned char *vstart; | |
207 | unsigned long bytes; | |
208 | ||
209 | if (!io_tlb_nslabs) { | |
210 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
211 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
212 | } | |
213 | ||
214 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
215 | ||
216 | /* Get IO TLB memory from the low pages */ | |
217 | vstart = alloc_bootmem_low_pages_nopanic(PAGE_ALIGN(bytes)); | |
218 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) | |
219 | return; | |
220 | ||
221 | if (io_tlb_start) | |
222 | free_bootmem(io_tlb_start, | |
223 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
224 | pr_warn("Cannot allocate SWIOTLB buffer"); | |
225 | no_iotlb_memory = true; | |
226 | } | |
227 | ||
228 | /* | |
229 | * Systems with larger DMA zones (those that don't support ISA) can | |
230 | * initialize the swiotlb later using the slab allocator if needed. | |
231 | * This should be just like above, but with some error catching. | |
232 | */ | |
233 | int | |
234 | swiotlb_late_init_with_default_size(size_t default_size) | |
235 | { | |
236 | unsigned long bytes, req_nslabs = io_tlb_nslabs; | |
237 | unsigned char *vstart = NULL; | |
238 | unsigned int order; | |
239 | int rc = 0; | |
240 | ||
241 | if (!io_tlb_nslabs) { | |
242 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
243 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
244 | } | |
245 | ||
246 | /* | |
247 | * Get IO TLB memory from the low pages | |
248 | */ | |
249 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); | |
250 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
251 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
252 | ||
253 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
254 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, | |
255 | order); | |
256 | if (vstart) | |
257 | break; | |
258 | order--; | |
259 | } | |
260 | ||
261 | if (!vstart) { | |
262 | io_tlb_nslabs = req_nslabs; | |
263 | return -ENOMEM; | |
264 | } | |
265 | if (order != get_order(bytes)) { | |
266 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " | |
267 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
268 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
269 | } | |
270 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); | |
271 | if (rc) | |
272 | free_pages((unsigned long)vstart, order); | |
273 | return rc; | |
274 | } | |
275 | ||
276 | int | |
277 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
278 | { | |
279 | unsigned long i, bytes; | |
280 | unsigned char *v_overflow_buffer; | |
281 | ||
282 | bytes = nslabs << IO_TLB_SHIFT; | |
283 | ||
284 | io_tlb_nslabs = nslabs; | |
285 | io_tlb_start = virt_to_phys(tlb); | |
286 | io_tlb_end = io_tlb_start + bytes; | |
287 | ||
288 | memset(tlb, 0, bytes); | |
289 | ||
290 | /* | |
291 | * Get the overflow emergency buffer | |
292 | */ | |
293 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
294 | get_order(io_tlb_overflow)); | |
295 | if (!v_overflow_buffer) | |
296 | goto cleanup2; | |
297 | ||
298 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); | |
299 | ||
300 | /* | |
301 | * Allocate and initialize the free list array. This array is used | |
302 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
303 | * between io_tlb_start and io_tlb_end. | |
304 | */ | |
305 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
306 | get_order(io_tlb_nslabs * sizeof(int))); | |
307 | if (!io_tlb_list) | |
308 | goto cleanup3; | |
309 | ||
310 | for (i = 0; i < io_tlb_nslabs; i++) | |
311 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
312 | io_tlb_index = 0; | |
313 | ||
314 | io_tlb_orig_addr = (phys_addr_t *) | |
315 | __get_free_pages(GFP_KERNEL, | |
316 | get_order(io_tlb_nslabs * | |
317 | sizeof(phys_addr_t))); | |
318 | if (!io_tlb_orig_addr) | |
319 | goto cleanup4; | |
320 | ||
321 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); | |
322 | ||
323 | swiotlb_print_info(); | |
324 | ||
325 | late_alloc = 1; | |
326 | ||
327 | return 0; | |
328 | ||
329 | cleanup4: | |
330 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
331 | sizeof(int))); | |
332 | io_tlb_list = NULL; | |
333 | cleanup3: | |
334 | free_pages((unsigned long)v_overflow_buffer, | |
335 | get_order(io_tlb_overflow)); | |
336 | io_tlb_overflow_buffer = 0; | |
337 | cleanup2: | |
338 | io_tlb_end = 0; | |
339 | io_tlb_start = 0; | |
340 | io_tlb_nslabs = 0; | |
341 | return -ENOMEM; | |
342 | } | |
343 | ||
344 | void __init swiotlb_free(void) | |
345 | { | |
346 | if (!io_tlb_orig_addr) | |
347 | return; | |
348 | ||
349 | if (late_alloc) { | |
350 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), | |
351 | get_order(io_tlb_overflow)); | |
352 | free_pages((unsigned long)io_tlb_orig_addr, | |
353 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
354 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
355 | sizeof(int))); | |
356 | free_pages((unsigned long)phys_to_virt(io_tlb_start), | |
357 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); | |
358 | } else { | |
359 | free_bootmem_late(io_tlb_overflow_buffer, | |
360 | PAGE_ALIGN(io_tlb_overflow)); | |
361 | free_bootmem_late(__pa(io_tlb_orig_addr), | |
362 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
363 | free_bootmem_late(__pa(io_tlb_list), | |
364 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
365 | free_bootmem_late(io_tlb_start, | |
366 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
367 | } | |
368 | io_tlb_nslabs = 0; | |
369 | } | |
370 | ||
371 | static int is_swiotlb_buffer(phys_addr_t paddr) | |
372 | { | |
373 | return paddr >= io_tlb_start && paddr < io_tlb_end; | |
374 | } | |
375 | ||
376 | /* | |
377 | * Bounce: copy the swiotlb buffer back to the original dma location | |
378 | */ | |
379 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, | |
380 | size_t size, enum dma_data_direction dir) | |
381 | { | |
382 | unsigned long pfn = PFN_DOWN(orig_addr); | |
383 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
384 | ||
385 | if (PageHighMem(pfn_to_page(pfn))) { | |
386 | /* The buffer does not have a mapping. Map it in and copy */ | |
387 | unsigned int offset = orig_addr & ~PAGE_MASK; | |
388 | char *buffer; | |
389 | unsigned int sz = 0; | |
390 | unsigned long flags; | |
391 | ||
392 | while (size) { | |
393 | sz = min_t(size_t, PAGE_SIZE - offset, size); | |
394 | ||
395 | local_irq_save(flags); | |
396 | buffer = kmap_atomic(pfn_to_page(pfn)); | |
397 | if (dir == DMA_TO_DEVICE) | |
398 | memcpy(vaddr, buffer + offset, sz); | |
399 | else | |
400 | memcpy(buffer + offset, vaddr, sz); | |
401 | kunmap_atomic(buffer); | |
402 | local_irq_restore(flags); | |
403 | ||
404 | size -= sz; | |
405 | pfn++; | |
406 | vaddr += sz; | |
407 | offset = 0; | |
408 | } | |
409 | } else if (dir == DMA_TO_DEVICE) { | |
410 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
411 | } else { | |
412 | memcpy(phys_to_virt(orig_addr), vaddr, size); | |
413 | } | |
414 | } | |
415 | ||
416 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, | |
417 | dma_addr_t tbl_dma_addr, | |
418 | phys_addr_t orig_addr, size_t size, | |
419 | enum dma_data_direction dir) | |
420 | { | |
421 | unsigned long flags; | |
422 | phys_addr_t tlb_addr; | |
423 | unsigned int nslots, stride, index, wrap; | |
424 | int i; | |
425 | unsigned long mask; | |
426 | unsigned long offset_slots; | |
427 | unsigned long max_slots; | |
428 | ||
429 | if (no_iotlb_memory) | |
430 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
431 | ||
432 | mask = dma_get_seg_boundary(hwdev); | |
433 | ||
434 | tbl_dma_addr &= mask; | |
435 | ||
436 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
437 | ||
438 | /* | |
439 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
440 | */ | |
441 | max_slots = mask + 1 | |
442 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
443 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
444 | ||
445 | /* | |
446 | * For mappings greater than a page, we limit the stride (and | |
447 | * hence alignment) to a page size. | |
448 | */ | |
449 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
450 | if (size > PAGE_SIZE) | |
451 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
452 | else | |
453 | stride = 1; | |
454 | ||
455 | BUG_ON(!nslots); | |
456 | ||
457 | /* | |
458 | * Find suitable number of IO TLB entries size that will fit this | |
459 | * request and allocate a buffer from that IO TLB pool. | |
460 | */ | |
461 | spin_lock_irqsave(&io_tlb_lock, flags); | |
462 | index = ALIGN(io_tlb_index, stride); | |
463 | if (index >= io_tlb_nslabs) | |
464 | index = 0; | |
465 | wrap = index; | |
466 | ||
467 | do { | |
468 | while (iommu_is_span_boundary(index, nslots, offset_slots, | |
469 | max_slots)) { | |
470 | index += stride; | |
471 | if (index >= io_tlb_nslabs) | |
472 | index = 0; | |
473 | if (index == wrap) | |
474 | goto not_found; | |
475 | } | |
476 | ||
477 | /* | |
478 | * If we find a slot that indicates we have 'nslots' number of | |
479 | * contiguous buffers, we allocate the buffers from that slot | |
480 | * and mark the entries as '0' indicating unavailable. | |
481 | */ | |
482 | if (io_tlb_list[index] >= nslots) { | |
483 | int count = 0; | |
484 | ||
485 | for (i = index; i < (int) (index + nslots); i++) | |
486 | io_tlb_list[i] = 0; | |
487 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
488 | io_tlb_list[i] = ++count; | |
489 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
490 | ||
491 | /* | |
492 | * Update the indices to avoid searching in the next | |
493 | * round. | |
494 | */ | |
495 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
496 | ? (index + nslots) : 0); | |
497 | ||
498 | goto found; | |
499 | } | |
500 | index += stride; | |
501 | if (index >= io_tlb_nslabs) | |
502 | index = 0; | |
503 | } while (index != wrap); | |
504 | ||
505 | not_found: | |
506 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
507 | return SWIOTLB_MAP_ERROR; | |
508 | found: | |
509 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
510 | ||
511 | /* | |
512 | * Save away the mapping from the original address to the DMA address. | |
513 | * This is needed when we sync the memory. Then we sync the buffer if | |
514 | * needed. | |
515 | */ | |
516 | for (i = 0; i < nslots; i++) | |
517 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); | |
518 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
519 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); | |
520 | ||
521 | return tlb_addr; | |
522 | } | |
523 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); | |
524 | ||
525 | /* | |
526 | * Allocates bounce buffer and returns its kernel virtual address. | |
527 | */ | |
528 | ||
529 | phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size, | |
530 | enum dma_data_direction dir) | |
531 | { | |
532 | dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start); | |
533 | ||
534 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir); | |
535 | } | |
536 | ||
537 | /* | |
538 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
539 | */ | |
540 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, | |
541 | size_t size, enum dma_data_direction dir) | |
542 | { | |
543 | unsigned long flags; | |
544 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
545 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
546 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
547 | ||
548 | /* | |
549 | * First, sync the memory before unmapping the entry | |
550 | */ | |
551 | if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | |
552 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); | |
553 | ||
554 | /* | |
555 | * Return the buffer to the free list by setting the corresponding | |
556 | * entries to indicate the number of contiguous entries available. | |
557 | * While returning the entries to the free list, we merge the entries | |
558 | * with slots below and above the pool being returned. | |
559 | */ | |
560 | spin_lock_irqsave(&io_tlb_lock, flags); | |
561 | { | |
562 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
563 | io_tlb_list[index + nslots] : 0); | |
564 | /* | |
565 | * Step 1: return the slots to the free list, merging the | |
566 | * slots with superceeding slots | |
567 | */ | |
568 | for (i = index + nslots - 1; i >= index; i--) | |
569 | io_tlb_list[i] = ++count; | |
570 | /* | |
571 | * Step 2: merge the returned slots with the preceding slots, | |
572 | * if available (non zero) | |
573 | */ | |
574 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
575 | io_tlb_list[i] = ++count; | |
576 | } | |
577 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
578 | } | |
579 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); | |
580 | ||
581 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, | |
582 | size_t size, enum dma_data_direction dir, | |
583 | enum dma_sync_target target) | |
584 | { | |
585 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
586 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
587 | ||
588 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); | |
589 | ||
590 | switch (target) { | |
591 | case SYNC_FOR_CPU: | |
592 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
593 | swiotlb_bounce(orig_addr, tlb_addr, | |
594 | size, DMA_FROM_DEVICE); | |
595 | else | |
596 | BUG_ON(dir != DMA_TO_DEVICE); | |
597 | break; | |
598 | case SYNC_FOR_DEVICE: | |
599 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
600 | swiotlb_bounce(orig_addr, tlb_addr, | |
601 | size, DMA_TO_DEVICE); | |
602 | else | |
603 | BUG_ON(dir != DMA_FROM_DEVICE); | |
604 | break; | |
605 | default: | |
606 | BUG(); | |
607 | } | |
608 | } | |
609 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); | |
610 | ||
611 | void * | |
612 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
613 | dma_addr_t *dma_handle, gfp_t flags) | |
614 | { | |
615 | dma_addr_t dev_addr; | |
616 | void *ret; | |
617 | int order = get_order(size); | |
618 | u64 dma_mask = DMA_BIT_MASK(32); | |
619 | ||
620 | if (hwdev && hwdev->coherent_dma_mask) | |
621 | dma_mask = hwdev->coherent_dma_mask; | |
622 | ||
623 | ret = (void *)__get_free_pages(flags, order); | |
624 | if (ret) { | |
625 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); | |
626 | if (dev_addr + size - 1 > dma_mask) { | |
627 | /* | |
628 | * The allocated memory isn't reachable by the device. | |
629 | */ | |
630 | free_pages((unsigned long) ret, order); | |
631 | ret = NULL; | |
632 | } | |
633 | } | |
634 | if (!ret) { | |
635 | /* | |
636 | * We are either out of memory or the device can't DMA to | |
637 | * GFP_DMA memory; fall back on map_single(), which | |
638 | * will grab memory from the lowest available address range. | |
639 | */ | |
640 | phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE); | |
641 | if (paddr == SWIOTLB_MAP_ERROR) | |
642 | return NULL; | |
643 | ||
644 | ret = phys_to_virt(paddr); | |
645 | dev_addr = phys_to_dma(hwdev, paddr); | |
646 | ||
647 | /* Confirm address can be DMA'd by device */ | |
648 | if (dev_addr + size - 1 > dma_mask) { | |
649 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", | |
650 | (unsigned long long)dma_mask, | |
651 | (unsigned long long)dev_addr); | |
652 | ||
653 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
654 | swiotlb_tbl_unmap_single(hwdev, paddr, | |
655 | size, DMA_TO_DEVICE); | |
656 | return NULL; | |
657 | } | |
658 | } | |
659 | ||
660 | *dma_handle = dev_addr; | |
661 | memset(ret, 0, size); | |
662 | ||
663 | return ret; | |
664 | } | |
665 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | |
666 | ||
667 | void | |
668 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
669 | dma_addr_t dev_addr) | |
670 | { | |
671 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
672 | ||
673 | WARN_ON(irqs_disabled()); | |
674 | if (!is_swiotlb_buffer(paddr)) | |
675 | free_pages((unsigned long)vaddr, get_order(size)); | |
676 | else | |
677 | /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */ | |
678 | swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE); | |
679 | } | |
680 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
681 | ||
682 | static void | |
683 | swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir, | |
684 | int do_panic) | |
685 | { | |
686 | /* | |
687 | * Ran out of IOMMU space for this operation. This is very bad. | |
688 | * Unfortunately the drivers cannot handle this operation properly. | |
689 | * unless they check for dma_mapping_error (most don't) | |
690 | * When the mapping is small enough return a static buffer to limit | |
691 | * the damage, or panic when the transfer is too big. | |
692 | */ | |
693 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " | |
694 | "device %s\n", size, dev ? dev_name(dev) : "?"); | |
695 | ||
696 | if (size <= io_tlb_overflow || !do_panic) | |
697 | return; | |
698 | ||
699 | if (dir == DMA_BIDIRECTIONAL) | |
700 | panic("DMA: Random memory could be DMA accessed\n"); | |
701 | if (dir == DMA_FROM_DEVICE) | |
702 | panic("DMA: Random memory could be DMA written\n"); | |
703 | if (dir == DMA_TO_DEVICE) | |
704 | panic("DMA: Random memory could be DMA read\n"); | |
705 | } | |
706 | ||
707 | /* | |
708 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
709 | * physical address to use is returned. | |
710 | * | |
711 | * Once the device is given the dma address, the device owns this memory until | |
712 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. | |
713 | */ | |
714 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, | |
715 | unsigned long offset, size_t size, | |
716 | enum dma_data_direction dir, | |
717 | struct dma_attrs *attrs) | |
718 | { | |
719 | phys_addr_t map, phys = page_to_phys(page) + offset; | |
720 | dma_addr_t dev_addr = phys_to_dma(dev, phys); | |
721 | ||
722 | BUG_ON(dir == DMA_NONE); | |
723 | /* | |
724 | * If the address happens to be in the device's DMA window, | |
725 | * we can safely return the device addr and not worry about bounce | |
726 | * buffering it. | |
727 | */ | |
728 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) | |
729 | return dev_addr; | |
730 | ||
731 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); | |
732 | ||
733 | /* Oh well, have to allocate and map a bounce buffer. */ | |
734 | map = map_single(dev, phys, size, dir); | |
735 | if (map == SWIOTLB_MAP_ERROR) { | |
736 | swiotlb_full(dev, size, dir, 1); | |
737 | return phys_to_dma(dev, io_tlb_overflow_buffer); | |
738 | } | |
739 | ||
740 | dev_addr = phys_to_dma(dev, map); | |
741 | ||
742 | /* Ensure that the address returned is DMA'ble */ | |
743 | if (!dma_capable(dev, dev_addr, size)) { | |
744 | swiotlb_tbl_unmap_single(dev, map, size, dir); | |
745 | return phys_to_dma(dev, io_tlb_overflow_buffer); | |
746 | } | |
747 | ||
748 | return dev_addr; | |
749 | } | |
750 | EXPORT_SYMBOL_GPL(swiotlb_map_page); | |
751 | ||
752 | /* | |
753 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
754 | * match what was provided for in a previous swiotlb_map_page call. All | |
755 | * other usages are undefined. | |
756 | * | |
757 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
758 | * whatever the device wrote there. | |
759 | */ | |
760 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, | |
761 | size_t size, enum dma_data_direction dir) | |
762 | { | |
763 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
764 | ||
765 | BUG_ON(dir == DMA_NONE); | |
766 | ||
767 | if (is_swiotlb_buffer(paddr)) { | |
768 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir); | |
769 | return; | |
770 | } | |
771 | ||
772 | if (dir != DMA_FROM_DEVICE) | |
773 | return; | |
774 | ||
775 | /* | |
776 | * phys_to_virt doesn't work with hihgmem page but we could | |
777 | * call dma_mark_clean() with hihgmem page here. However, we | |
778 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
779 | * make dma_mark_clean() take a physical address if necessary. | |
780 | */ | |
781 | dma_mark_clean(phys_to_virt(paddr), size); | |
782 | } | |
783 | ||
784 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
785 | size_t size, enum dma_data_direction dir, | |
786 | struct dma_attrs *attrs) | |
787 | { | |
788 | unmap_single(hwdev, dev_addr, size, dir); | |
789 | } | |
790 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); | |
791 | ||
792 | /* | |
793 | * Make physical memory consistent for a single streaming mode DMA translation | |
794 | * after a transfer. | |
795 | * | |
796 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer | |
797 | * using the cpu, yet do not wish to teardown the dma mapping, you must | |
798 | * call this function before doing so. At the next point you give the dma | |
799 | * address back to the card, you must first perform a | |
800 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
801 | */ | |
802 | static void | |
803 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, | |
804 | size_t size, enum dma_data_direction dir, | |
805 | enum dma_sync_target target) | |
806 | { | |
807 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
808 | ||
809 | BUG_ON(dir == DMA_NONE); | |
810 | ||
811 | if (is_swiotlb_buffer(paddr)) { | |
812 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); | |
813 | return; | |
814 | } | |
815 | ||
816 | if (dir != DMA_FROM_DEVICE) | |
817 | return; | |
818 | ||
819 | dma_mark_clean(phys_to_virt(paddr), size); | |
820 | } | |
821 | ||
822 | void | |
823 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
824 | size_t size, enum dma_data_direction dir) | |
825 | { | |
826 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); | |
827 | } | |
828 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
829 | ||
830 | void | |
831 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
832 | size_t size, enum dma_data_direction dir) | |
833 | { | |
834 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); | |
835 | } | |
836 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
837 | ||
838 | /* | |
839 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
840 | * This is the scatter-gather version of the above swiotlb_map_page | |
841 | * interface. Here the scatter gather list elements are each tagged with the | |
842 | * appropriate dma address and length. They are obtained via | |
843 | * sg_dma_{address,length}(SG). | |
844 | * | |
845 | * NOTE: An implementation may be able to use a smaller number of | |
846 | * DMA address/length pairs than there are SG table elements. | |
847 | * (for example via virtual mapping capabilities) | |
848 | * The routine returns the number of addr/length pairs actually | |
849 | * used, at most nents. | |
850 | * | |
851 | * Device ownership issues as mentioned above for swiotlb_map_page are the | |
852 | * same here. | |
853 | */ | |
854 | int | |
855 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
856 | enum dma_data_direction dir, struct dma_attrs *attrs) | |
857 | { | |
858 | struct scatterlist *sg; | |
859 | int i; | |
860 | ||
861 | BUG_ON(dir == DMA_NONE); | |
862 | ||
863 | for_each_sg(sgl, sg, nelems, i) { | |
864 | phys_addr_t paddr = sg_phys(sg); | |
865 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); | |
866 | ||
867 | if (swiotlb_force || | |
868 | !dma_capable(hwdev, dev_addr, sg->length)) { | |
869 | phys_addr_t map = map_single(hwdev, sg_phys(sg), | |
870 | sg->length, dir); | |
871 | if (map == SWIOTLB_MAP_ERROR) { | |
872 | /* Don't panic here, we expect map_sg users | |
873 | to do proper error handling. */ | |
874 | swiotlb_full(hwdev, sg->length, dir, 0); | |
875 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, | |
876 | attrs); | |
877 | sg_dma_len(sgl) = 0; | |
878 | return 0; | |
879 | } | |
880 | sg->dma_address = phys_to_dma(hwdev, map); | |
881 | } else | |
882 | sg->dma_address = dev_addr; | |
883 | sg_dma_len(sg) = sg->length; | |
884 | } | |
885 | return nelems; | |
886 | } | |
887 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); | |
888 | ||
889 | int | |
890 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
891 | enum dma_data_direction dir) | |
892 | { | |
893 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
894 | } | |
895 | EXPORT_SYMBOL(swiotlb_map_sg); | |
896 | ||
897 | /* | |
898 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
899 | * concerning calls here are the same as for swiotlb_unmap_page() above. | |
900 | */ | |
901 | void | |
902 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, | |
903 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) | |
904 | { | |
905 | struct scatterlist *sg; | |
906 | int i; | |
907 | ||
908 | BUG_ON(dir == DMA_NONE); | |
909 | ||
910 | for_each_sg(sgl, sg, nelems, i) | |
911 | unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir); | |
912 | ||
913 | } | |
914 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); | |
915 | ||
916 | void | |
917 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
918 | enum dma_data_direction dir) | |
919 | { | |
920 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
921 | } | |
922 | EXPORT_SYMBOL(swiotlb_unmap_sg); | |
923 | ||
924 | /* | |
925 | * Make physical memory consistent for a set of streaming mode DMA translations | |
926 | * after a transfer. | |
927 | * | |
928 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
929 | * and usage. | |
930 | */ | |
931 | static void | |
932 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, | |
933 | int nelems, enum dma_data_direction dir, | |
934 | enum dma_sync_target target) | |
935 | { | |
936 | struct scatterlist *sg; | |
937 | int i; | |
938 | ||
939 | for_each_sg(sgl, sg, nelems, i) | |
940 | swiotlb_sync_single(hwdev, sg->dma_address, | |
941 | sg_dma_len(sg), dir, target); | |
942 | } | |
943 | ||
944 | void | |
945 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
946 | int nelems, enum dma_data_direction dir) | |
947 | { | |
948 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); | |
949 | } | |
950 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | |
951 | ||
952 | void | |
953 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
954 | int nelems, enum dma_data_direction dir) | |
955 | { | |
956 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); | |
957 | } | |
958 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
959 | ||
960 | int | |
961 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) | |
962 | { | |
963 | return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer)); | |
964 | } | |
965 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
966 | ||
967 | /* | |
968 | * Return whether the given device DMA address mask can be supported | |
969 | * properly. For example, if your device can only drive the low 24-bits | |
970 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
971 | * this function. | |
972 | */ | |
973 | int | |
974 | swiotlb_dma_supported(struct device *hwdev, u64 mask) | |
975 | { | |
976 | return phys_to_dma(hwdev, io_tlb_end - 1) <= mask; | |
977 | } | |
978 | EXPORT_SYMBOL(swiotlb_dma_supported); |