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Commit | Line | Data |
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1 | /* | |
2 | * Dynamic DMA mapping support. | |
3 | * | |
4 | * This implementation is a fallback for platforms that do not support | |
5 | * I/O TLBs (aka DMA address translation hardware). | |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
17 | * 08/12/11 beckyb Add highmem support | |
18 | */ | |
19 | ||
20 | #define pr_fmt(fmt) "software IO TLB: " fmt | |
21 | ||
22 | #include <linux/cache.h> | |
23 | #include <linux/dma-mapping.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/export.h> | |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/string.h> | |
28 | #include <linux/swiotlb.h> | |
29 | #include <linux/pfn.h> | |
30 | #include <linux/types.h> | |
31 | #include <linux/ctype.h> | |
32 | #include <linux/highmem.h> | |
33 | #include <linux/gfp.h> | |
34 | #include <linux/scatterlist.h> | |
35 | #include <linux/mem_encrypt.h> | |
36 | ||
37 | #include <asm/io.h> | |
38 | #include <asm/dma.h> | |
39 | ||
40 | #include <linux/init.h> | |
41 | #include <linux/bootmem.h> | |
42 | #include <linux/iommu-helper.h> | |
43 | ||
44 | #define CREATE_TRACE_POINTS | |
45 | #include <trace/events/swiotlb.h> | |
46 | ||
47 | #define OFFSET(val,align) ((unsigned long) \ | |
48 | ( (val) & ( (align) - 1))) | |
49 | ||
50 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | |
51 | ||
52 | /* | |
53 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
54 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
55 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
56 | */ | |
57 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
58 | ||
59 | enum swiotlb_force swiotlb_force; | |
60 | ||
61 | /* | |
62 | * Used to do a quick range check in swiotlb_tbl_unmap_single and | |
63 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
64 | * API. | |
65 | */ | |
66 | static phys_addr_t io_tlb_start, io_tlb_end; | |
67 | ||
68 | /* | |
69 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and | |
70 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
71 | */ | |
72 | static unsigned long io_tlb_nslabs; | |
73 | ||
74 | /* | |
75 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
76 | */ | |
77 | static unsigned long io_tlb_overflow = 32*1024; | |
78 | ||
79 | static phys_addr_t io_tlb_overflow_buffer; | |
80 | ||
81 | /* | |
82 | * This is a free list describing the number of free entries available from | |
83 | * each index | |
84 | */ | |
85 | static unsigned int *io_tlb_list; | |
86 | static unsigned int io_tlb_index; | |
87 | ||
88 | /* | |
89 | * Max segment that we can provide which (if pages are contingous) will | |
90 | * not be bounced (unless SWIOTLB_FORCE is set). | |
91 | */ | |
92 | unsigned int max_segment; | |
93 | ||
94 | /* | |
95 | * We need to save away the original address corresponding to a mapped entry | |
96 | * for the sync operations. | |
97 | */ | |
98 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) | |
99 | static phys_addr_t *io_tlb_orig_addr; | |
100 | ||
101 | /* | |
102 | * Protect the above data structures in the map and unmap calls | |
103 | */ | |
104 | static DEFINE_SPINLOCK(io_tlb_lock); | |
105 | ||
106 | static int late_alloc; | |
107 | ||
108 | static int __init | |
109 | setup_io_tlb_npages(char *str) | |
110 | { | |
111 | if (isdigit(*str)) { | |
112 | io_tlb_nslabs = simple_strtoul(str, &str, 0); | |
113 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | |
114 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
115 | } | |
116 | if (*str == ',') | |
117 | ++str; | |
118 | if (!strcmp(str, "force")) { | |
119 | swiotlb_force = SWIOTLB_FORCE; | |
120 | } else if (!strcmp(str, "noforce")) { | |
121 | swiotlb_force = SWIOTLB_NO_FORCE; | |
122 | io_tlb_nslabs = 1; | |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | early_param("swiotlb", setup_io_tlb_npages); | |
128 | /* make io_tlb_overflow tunable too? */ | |
129 | ||
130 | unsigned long swiotlb_nr_tbl(void) | |
131 | { | |
132 | return io_tlb_nslabs; | |
133 | } | |
134 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); | |
135 | ||
136 | unsigned int swiotlb_max_segment(void) | |
137 | { | |
138 | return max_segment; | |
139 | } | |
140 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); | |
141 | ||
142 | void swiotlb_set_max_segment(unsigned int val) | |
143 | { | |
144 | if (swiotlb_force == SWIOTLB_FORCE) | |
145 | max_segment = 1; | |
146 | else | |
147 | max_segment = rounddown(val, PAGE_SIZE); | |
148 | } | |
149 | ||
150 | /* default to 64MB */ | |
151 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) | |
152 | unsigned long swiotlb_size_or_default(void) | |
153 | { | |
154 | unsigned long size; | |
155 | ||
156 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
157 | ||
158 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
159 | } | |
160 | ||
161 | void __weak swiotlb_set_mem_attributes(void *vaddr, unsigned long size) { } | |
162 | ||
163 | /* For swiotlb, clear memory encryption mask from dma addresses */ | |
164 | static dma_addr_t swiotlb_phys_to_dma(struct device *hwdev, | |
165 | phys_addr_t address) | |
166 | { | |
167 | return __sme_clr(phys_to_dma(hwdev, address)); | |
168 | } | |
169 | ||
170 | /* Note that this doesn't work with highmem page */ | |
171 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, | |
172 | volatile void *address) | |
173 | { | |
174 | return phys_to_dma(hwdev, virt_to_phys(address)); | |
175 | } | |
176 | ||
177 | static bool no_iotlb_memory; | |
178 | ||
179 | void swiotlb_print_info(void) | |
180 | { | |
181 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
182 | ||
183 | if (no_iotlb_memory) { | |
184 | pr_warn("No low mem\n"); | |
185 | return; | |
186 | } | |
187 | ||
188 | pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n", | |
189 | (unsigned long long)io_tlb_start, | |
190 | (unsigned long long)io_tlb_end, | |
191 | bytes >> 20); | |
192 | } | |
193 | ||
194 | /* | |
195 | * Early SWIOTLB allocation may be too early to allow an architecture to | |
196 | * perform the desired operations. This function allows the architecture to | |
197 | * call SWIOTLB when the operations are possible. It needs to be called | |
198 | * before the SWIOTLB memory is used. | |
199 | */ | |
200 | void __init swiotlb_update_mem_attributes(void) | |
201 | { | |
202 | void *vaddr; | |
203 | unsigned long bytes; | |
204 | ||
205 | if (no_iotlb_memory || late_alloc) | |
206 | return; | |
207 | ||
208 | vaddr = phys_to_virt(io_tlb_start); | |
209 | bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT); | |
210 | swiotlb_set_mem_attributes(vaddr, bytes); | |
211 | memset(vaddr, 0, bytes); | |
212 | ||
213 | vaddr = phys_to_virt(io_tlb_overflow_buffer); | |
214 | bytes = PAGE_ALIGN(io_tlb_overflow); | |
215 | swiotlb_set_mem_attributes(vaddr, bytes); | |
216 | memset(vaddr, 0, bytes); | |
217 | } | |
218 | ||
219 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) | |
220 | { | |
221 | void *v_overflow_buffer; | |
222 | unsigned long i, bytes; | |
223 | ||
224 | bytes = nslabs << IO_TLB_SHIFT; | |
225 | ||
226 | io_tlb_nslabs = nslabs; | |
227 | io_tlb_start = __pa(tlb); | |
228 | io_tlb_end = io_tlb_start + bytes; | |
229 | ||
230 | /* | |
231 | * Get the overflow emergency buffer | |
232 | */ | |
233 | v_overflow_buffer = memblock_virt_alloc_low_nopanic( | |
234 | PAGE_ALIGN(io_tlb_overflow), | |
235 | PAGE_SIZE); | |
236 | if (!v_overflow_buffer) | |
237 | return -ENOMEM; | |
238 | ||
239 | io_tlb_overflow_buffer = __pa(v_overflow_buffer); | |
240 | ||
241 | /* | |
242 | * Allocate and initialize the free list array. This array is used | |
243 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
244 | * between io_tlb_start and io_tlb_end. | |
245 | */ | |
246 | io_tlb_list = memblock_virt_alloc( | |
247 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), | |
248 | PAGE_SIZE); | |
249 | io_tlb_orig_addr = memblock_virt_alloc( | |
250 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), | |
251 | PAGE_SIZE); | |
252 | for (i = 0; i < io_tlb_nslabs; i++) { | |
253 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
254 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
255 | } | |
256 | io_tlb_index = 0; | |
257 | ||
258 | if (verbose) | |
259 | swiotlb_print_info(); | |
260 | ||
261 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); | |
262 | return 0; | |
263 | } | |
264 | ||
265 | /* | |
266 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
267 | * structures for the software IO TLB used to implement the DMA API. | |
268 | */ | |
269 | void __init | |
270 | swiotlb_init(int verbose) | |
271 | { | |
272 | size_t default_size = IO_TLB_DEFAULT_SIZE; | |
273 | unsigned char *vstart; | |
274 | unsigned long bytes; | |
275 | ||
276 | if (!io_tlb_nslabs) { | |
277 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
278 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
279 | } | |
280 | ||
281 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
282 | ||
283 | /* Get IO TLB memory from the low pages */ | |
284 | vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); | |
285 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) | |
286 | return; | |
287 | ||
288 | if (io_tlb_start) | |
289 | memblock_free_early(io_tlb_start, | |
290 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
291 | pr_warn("Cannot allocate buffer"); | |
292 | no_iotlb_memory = true; | |
293 | } | |
294 | ||
295 | /* | |
296 | * Systems with larger DMA zones (those that don't support ISA) can | |
297 | * initialize the swiotlb later using the slab allocator if needed. | |
298 | * This should be just like above, but with some error catching. | |
299 | */ | |
300 | int | |
301 | swiotlb_late_init_with_default_size(size_t default_size) | |
302 | { | |
303 | unsigned long bytes, req_nslabs = io_tlb_nslabs; | |
304 | unsigned char *vstart = NULL; | |
305 | unsigned int order; | |
306 | int rc = 0; | |
307 | ||
308 | if (!io_tlb_nslabs) { | |
309 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
310 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
311 | } | |
312 | ||
313 | /* | |
314 | * Get IO TLB memory from the low pages | |
315 | */ | |
316 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); | |
317 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
318 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
319 | ||
320 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
321 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, | |
322 | order); | |
323 | if (vstart) | |
324 | break; | |
325 | order--; | |
326 | } | |
327 | ||
328 | if (!vstart) { | |
329 | io_tlb_nslabs = req_nslabs; | |
330 | return -ENOMEM; | |
331 | } | |
332 | if (order != get_order(bytes)) { | |
333 | pr_warn("only able to allocate %ld MB\n", | |
334 | (PAGE_SIZE << order) >> 20); | |
335 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
336 | } | |
337 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); | |
338 | if (rc) | |
339 | free_pages((unsigned long)vstart, order); | |
340 | ||
341 | return rc; | |
342 | } | |
343 | ||
344 | int | |
345 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
346 | { | |
347 | unsigned long i, bytes; | |
348 | unsigned char *v_overflow_buffer; | |
349 | ||
350 | bytes = nslabs << IO_TLB_SHIFT; | |
351 | ||
352 | io_tlb_nslabs = nslabs; | |
353 | io_tlb_start = virt_to_phys(tlb); | |
354 | io_tlb_end = io_tlb_start + bytes; | |
355 | ||
356 | swiotlb_set_mem_attributes(tlb, bytes); | |
357 | memset(tlb, 0, bytes); | |
358 | ||
359 | /* | |
360 | * Get the overflow emergency buffer | |
361 | */ | |
362 | v_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
363 | get_order(io_tlb_overflow)); | |
364 | if (!v_overflow_buffer) | |
365 | goto cleanup2; | |
366 | ||
367 | swiotlb_set_mem_attributes(v_overflow_buffer, io_tlb_overflow); | |
368 | memset(v_overflow_buffer, 0, io_tlb_overflow); | |
369 | io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer); | |
370 | ||
371 | /* | |
372 | * Allocate and initialize the free list array. This array is used | |
373 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
374 | * between io_tlb_start and io_tlb_end. | |
375 | */ | |
376 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
377 | get_order(io_tlb_nslabs * sizeof(int))); | |
378 | if (!io_tlb_list) | |
379 | goto cleanup3; | |
380 | ||
381 | io_tlb_orig_addr = (phys_addr_t *) | |
382 | __get_free_pages(GFP_KERNEL, | |
383 | get_order(io_tlb_nslabs * | |
384 | sizeof(phys_addr_t))); | |
385 | if (!io_tlb_orig_addr) | |
386 | goto cleanup4; | |
387 | ||
388 | for (i = 0; i < io_tlb_nslabs; i++) { | |
389 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
390 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
391 | } | |
392 | io_tlb_index = 0; | |
393 | ||
394 | swiotlb_print_info(); | |
395 | ||
396 | late_alloc = 1; | |
397 | ||
398 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); | |
399 | ||
400 | return 0; | |
401 | ||
402 | cleanup4: | |
403 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
404 | sizeof(int))); | |
405 | io_tlb_list = NULL; | |
406 | cleanup3: | |
407 | free_pages((unsigned long)v_overflow_buffer, | |
408 | get_order(io_tlb_overflow)); | |
409 | io_tlb_overflow_buffer = 0; | |
410 | cleanup2: | |
411 | io_tlb_end = 0; | |
412 | io_tlb_start = 0; | |
413 | io_tlb_nslabs = 0; | |
414 | max_segment = 0; | |
415 | return -ENOMEM; | |
416 | } | |
417 | ||
418 | void __init swiotlb_free(void) | |
419 | { | |
420 | if (!io_tlb_orig_addr) | |
421 | return; | |
422 | ||
423 | if (late_alloc) { | |
424 | free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer), | |
425 | get_order(io_tlb_overflow)); | |
426 | free_pages((unsigned long)io_tlb_orig_addr, | |
427 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
428 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
429 | sizeof(int))); | |
430 | free_pages((unsigned long)phys_to_virt(io_tlb_start), | |
431 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); | |
432 | } else { | |
433 | memblock_free_late(io_tlb_overflow_buffer, | |
434 | PAGE_ALIGN(io_tlb_overflow)); | |
435 | memblock_free_late(__pa(io_tlb_orig_addr), | |
436 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
437 | memblock_free_late(__pa(io_tlb_list), | |
438 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
439 | memblock_free_late(io_tlb_start, | |
440 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
441 | } | |
442 | io_tlb_nslabs = 0; | |
443 | max_segment = 0; | |
444 | } | |
445 | ||
446 | int is_swiotlb_buffer(phys_addr_t paddr) | |
447 | { | |
448 | return paddr >= io_tlb_start && paddr < io_tlb_end; | |
449 | } | |
450 | ||
451 | /* | |
452 | * Bounce: copy the swiotlb buffer back to the original dma location | |
453 | */ | |
454 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, | |
455 | size_t size, enum dma_data_direction dir) | |
456 | { | |
457 | unsigned long pfn = PFN_DOWN(orig_addr); | |
458 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
459 | ||
460 | if (PageHighMem(pfn_to_page(pfn))) { | |
461 | /* The buffer does not have a mapping. Map it in and copy */ | |
462 | unsigned int offset = orig_addr & ~PAGE_MASK; | |
463 | char *buffer; | |
464 | unsigned int sz = 0; | |
465 | unsigned long flags; | |
466 | ||
467 | while (size) { | |
468 | sz = min_t(size_t, PAGE_SIZE - offset, size); | |
469 | ||
470 | local_irq_save(flags); | |
471 | buffer = kmap_atomic(pfn_to_page(pfn)); | |
472 | if (dir == DMA_TO_DEVICE) | |
473 | memcpy(vaddr, buffer + offset, sz); | |
474 | else | |
475 | memcpy(buffer + offset, vaddr, sz); | |
476 | kunmap_atomic(buffer); | |
477 | local_irq_restore(flags); | |
478 | ||
479 | size -= sz; | |
480 | pfn++; | |
481 | vaddr += sz; | |
482 | offset = 0; | |
483 | } | |
484 | } else if (dir == DMA_TO_DEVICE) { | |
485 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
486 | } else { | |
487 | memcpy(phys_to_virt(orig_addr), vaddr, size); | |
488 | } | |
489 | } | |
490 | ||
491 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, | |
492 | dma_addr_t tbl_dma_addr, | |
493 | phys_addr_t orig_addr, size_t size, | |
494 | enum dma_data_direction dir, | |
495 | unsigned long attrs) | |
496 | { | |
497 | unsigned long flags; | |
498 | phys_addr_t tlb_addr; | |
499 | unsigned int nslots, stride, index, wrap; | |
500 | int i; | |
501 | unsigned long mask; | |
502 | unsigned long offset_slots; | |
503 | unsigned long max_slots; | |
504 | ||
505 | if (no_iotlb_memory) | |
506 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
507 | ||
508 | if (mem_encrypt_active()) | |
509 | pr_warn_once("%s is active and system is using DMA bounce buffers\n", | |
510 | sme_active() ? "SME" : "SEV"); | |
511 | ||
512 | mask = dma_get_seg_boundary(hwdev); | |
513 | ||
514 | tbl_dma_addr &= mask; | |
515 | ||
516 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
517 | ||
518 | /* | |
519 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
520 | */ | |
521 | max_slots = mask + 1 | |
522 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
523 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
524 | ||
525 | /* | |
526 | * For mappings greater than or equal to a page, we limit the stride | |
527 | * (and hence alignment) to a page size. | |
528 | */ | |
529 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
530 | if (size >= PAGE_SIZE) | |
531 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
532 | else | |
533 | stride = 1; | |
534 | ||
535 | BUG_ON(!nslots); | |
536 | ||
537 | /* | |
538 | * Find suitable number of IO TLB entries size that will fit this | |
539 | * request and allocate a buffer from that IO TLB pool. | |
540 | */ | |
541 | spin_lock_irqsave(&io_tlb_lock, flags); | |
542 | index = ALIGN(io_tlb_index, stride); | |
543 | if (index >= io_tlb_nslabs) | |
544 | index = 0; | |
545 | wrap = index; | |
546 | ||
547 | do { | |
548 | while (iommu_is_span_boundary(index, nslots, offset_slots, | |
549 | max_slots)) { | |
550 | index += stride; | |
551 | if (index >= io_tlb_nslabs) | |
552 | index = 0; | |
553 | if (index == wrap) | |
554 | goto not_found; | |
555 | } | |
556 | ||
557 | /* | |
558 | * If we find a slot that indicates we have 'nslots' number of | |
559 | * contiguous buffers, we allocate the buffers from that slot | |
560 | * and mark the entries as '0' indicating unavailable. | |
561 | */ | |
562 | if (io_tlb_list[index] >= nslots) { | |
563 | int count = 0; | |
564 | ||
565 | for (i = index; i < (int) (index + nslots); i++) | |
566 | io_tlb_list[i] = 0; | |
567 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
568 | io_tlb_list[i] = ++count; | |
569 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
570 | ||
571 | /* | |
572 | * Update the indices to avoid searching in the next | |
573 | * round. | |
574 | */ | |
575 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
576 | ? (index + nslots) : 0); | |
577 | ||
578 | goto found; | |
579 | } | |
580 | index += stride; | |
581 | if (index >= io_tlb_nslabs) | |
582 | index = 0; | |
583 | } while (index != wrap); | |
584 | ||
585 | not_found: | |
586 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
587 | if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) | |
588 | dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); | |
589 | return SWIOTLB_MAP_ERROR; | |
590 | found: | |
591 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
592 | ||
593 | /* | |
594 | * Save away the mapping from the original address to the DMA address. | |
595 | * This is needed when we sync the memory. Then we sync the buffer if | |
596 | * needed. | |
597 | */ | |
598 | for (i = 0; i < nslots; i++) | |
599 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); | |
600 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && | |
601 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
602 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); | |
603 | ||
604 | return tlb_addr; | |
605 | } | |
606 | EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single); | |
607 | ||
608 | /* | |
609 | * Allocates bounce buffer and returns its kernel virtual address. | |
610 | */ | |
611 | ||
612 | static phys_addr_t | |
613 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, | |
614 | enum dma_data_direction dir, unsigned long attrs) | |
615 | { | |
616 | dma_addr_t start_dma_addr; | |
617 | ||
618 | if (swiotlb_force == SWIOTLB_NO_FORCE) { | |
619 | dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n", | |
620 | &phys); | |
621 | return SWIOTLB_MAP_ERROR; | |
622 | } | |
623 | ||
624 | start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start); | |
625 | return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, | |
626 | dir, attrs); | |
627 | } | |
628 | ||
629 | /* | |
630 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
631 | */ | |
632 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, | |
633 | size_t size, enum dma_data_direction dir, | |
634 | unsigned long attrs) | |
635 | { | |
636 | unsigned long flags; | |
637 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
638 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
639 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
640 | ||
641 | /* | |
642 | * First, sync the memory before unmapping the entry | |
643 | */ | |
644 | if (orig_addr != INVALID_PHYS_ADDR && | |
645 | !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && | |
646 | ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | |
647 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); | |
648 | ||
649 | /* | |
650 | * Return the buffer to the free list by setting the corresponding | |
651 | * entries to indicate the number of contiguous entries available. | |
652 | * While returning the entries to the free list, we merge the entries | |
653 | * with slots below and above the pool being returned. | |
654 | */ | |
655 | spin_lock_irqsave(&io_tlb_lock, flags); | |
656 | { | |
657 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
658 | io_tlb_list[index + nslots] : 0); | |
659 | /* | |
660 | * Step 1: return the slots to the free list, merging the | |
661 | * slots with superceeding slots | |
662 | */ | |
663 | for (i = index + nslots - 1; i >= index; i--) { | |
664 | io_tlb_list[i] = ++count; | |
665 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
666 | } | |
667 | /* | |
668 | * Step 2: merge the returned slots with the preceding slots, | |
669 | * if available (non zero) | |
670 | */ | |
671 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
672 | io_tlb_list[i] = ++count; | |
673 | } | |
674 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
675 | } | |
676 | EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single); | |
677 | ||
678 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, | |
679 | size_t size, enum dma_data_direction dir, | |
680 | enum dma_sync_target target) | |
681 | { | |
682 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
683 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
684 | ||
685 | if (orig_addr == INVALID_PHYS_ADDR) | |
686 | return; | |
687 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); | |
688 | ||
689 | switch (target) { | |
690 | case SYNC_FOR_CPU: | |
691 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
692 | swiotlb_bounce(orig_addr, tlb_addr, | |
693 | size, DMA_FROM_DEVICE); | |
694 | else | |
695 | BUG_ON(dir != DMA_TO_DEVICE); | |
696 | break; | |
697 | case SYNC_FOR_DEVICE: | |
698 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
699 | swiotlb_bounce(orig_addr, tlb_addr, | |
700 | size, DMA_TO_DEVICE); | |
701 | else | |
702 | BUG_ON(dir != DMA_FROM_DEVICE); | |
703 | break; | |
704 | default: | |
705 | BUG(); | |
706 | } | |
707 | } | |
708 | EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); | |
709 | ||
710 | void * | |
711 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
712 | dma_addr_t *dma_handle, gfp_t flags) | |
713 | { | |
714 | bool warn = !(flags & __GFP_NOWARN); | |
715 | dma_addr_t dev_addr; | |
716 | void *ret; | |
717 | int order = get_order(size); | |
718 | u64 dma_mask = DMA_BIT_MASK(32); | |
719 | ||
720 | if (hwdev && hwdev->coherent_dma_mask) | |
721 | dma_mask = hwdev->coherent_dma_mask; | |
722 | ||
723 | ret = (void *)__get_free_pages(flags, order); | |
724 | if (ret) { | |
725 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); | |
726 | if (dev_addr + size - 1 > dma_mask) { | |
727 | /* | |
728 | * The allocated memory isn't reachable by the device. | |
729 | */ | |
730 | free_pages((unsigned long) ret, order); | |
731 | ret = NULL; | |
732 | } | |
733 | } | |
734 | if (!ret) { | |
735 | /* | |
736 | * We are either out of memory or the device can't DMA to | |
737 | * GFP_DMA memory; fall back on map_single(), which | |
738 | * will grab memory from the lowest available address range. | |
739 | */ | |
740 | phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE, | |
741 | warn ? 0 : DMA_ATTR_NO_WARN); | |
742 | if (paddr == SWIOTLB_MAP_ERROR) | |
743 | goto err_warn; | |
744 | ||
745 | ret = phys_to_virt(paddr); | |
746 | dev_addr = swiotlb_phys_to_dma(hwdev, paddr); | |
747 | ||
748 | /* Confirm address can be DMA'd by device */ | |
749 | if (dev_addr + size - 1 > dma_mask) { | |
750 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", | |
751 | (unsigned long long)dma_mask, | |
752 | (unsigned long long)dev_addr); | |
753 | ||
754 | /* | |
755 | * DMA_TO_DEVICE to avoid memcpy in unmap_single. | |
756 | * The DMA_ATTR_SKIP_CPU_SYNC is optional. | |
757 | */ | |
758 | swiotlb_tbl_unmap_single(hwdev, paddr, | |
759 | size, DMA_TO_DEVICE, | |
760 | DMA_ATTR_SKIP_CPU_SYNC); | |
761 | goto err_warn; | |
762 | } | |
763 | } | |
764 | ||
765 | *dma_handle = dev_addr; | |
766 | memset(ret, 0, size); | |
767 | ||
768 | return ret; | |
769 | ||
770 | err_warn: | |
771 | if (warn && printk_ratelimit()) { | |
772 | pr_warn("coherent allocation failed for device %s size=%zu\n", | |
773 | dev_name(hwdev), size); | |
774 | dump_stack(); | |
775 | } | |
776 | ||
777 | return NULL; | |
778 | } | |
779 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | |
780 | ||
781 | void | |
782 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
783 | dma_addr_t dev_addr) | |
784 | { | |
785 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
786 | ||
787 | WARN_ON(irqs_disabled()); | |
788 | if (!is_swiotlb_buffer(paddr)) | |
789 | free_pages((unsigned long)vaddr, get_order(size)); | |
790 | else | |
791 | /* | |
792 | * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single. | |
793 | * DMA_ATTR_SKIP_CPU_SYNC is optional. | |
794 | */ | |
795 | swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE, | |
796 | DMA_ATTR_SKIP_CPU_SYNC); | |
797 | } | |
798 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
799 | ||
800 | /* | |
801 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
802 | * physical address to use is returned. | |
803 | * | |
804 | * Once the device is given the dma address, the device owns this memory until | |
805 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. | |
806 | */ | |
807 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, | |
808 | unsigned long offset, size_t size, | |
809 | enum dma_data_direction dir, | |
810 | unsigned long attrs) | |
811 | { | |
812 | phys_addr_t map, phys = page_to_phys(page) + offset; | |
813 | dma_addr_t dev_addr = phys_to_dma(dev, phys); | |
814 | ||
815 | BUG_ON(dir == DMA_NONE); | |
816 | /* | |
817 | * If the address happens to be in the device's DMA window, | |
818 | * we can safely return the device addr and not worry about bounce | |
819 | * buffering it. | |
820 | */ | |
821 | if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE) | |
822 | return dev_addr; | |
823 | ||
824 | trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); | |
825 | ||
826 | /* Oh well, have to allocate and map a bounce buffer. */ | |
827 | map = map_single(dev, phys, size, dir, attrs); | |
828 | if (map == SWIOTLB_MAP_ERROR) | |
829 | return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer); | |
830 | ||
831 | dev_addr = swiotlb_phys_to_dma(dev, map); | |
832 | ||
833 | /* Ensure that the address returned is DMA'ble */ | |
834 | if (dma_capable(dev, dev_addr, size)) | |
835 | return dev_addr; | |
836 | ||
837 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; | |
838 | swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); | |
839 | ||
840 | return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer); | |
841 | } | |
842 | EXPORT_SYMBOL_GPL(swiotlb_map_page); | |
843 | ||
844 | /* | |
845 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
846 | * match what was provided for in a previous swiotlb_map_page call. All | |
847 | * other usages are undefined. | |
848 | * | |
849 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
850 | * whatever the device wrote there. | |
851 | */ | |
852 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, | |
853 | size_t size, enum dma_data_direction dir, | |
854 | unsigned long attrs) | |
855 | { | |
856 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
857 | ||
858 | BUG_ON(dir == DMA_NONE); | |
859 | ||
860 | if (is_swiotlb_buffer(paddr)) { | |
861 | swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); | |
862 | return; | |
863 | } | |
864 | ||
865 | if (dir != DMA_FROM_DEVICE) | |
866 | return; | |
867 | ||
868 | /* | |
869 | * phys_to_virt doesn't work with hihgmem page but we could | |
870 | * call dma_mark_clean() with hihgmem page here. However, we | |
871 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
872 | * make dma_mark_clean() take a physical address if necessary. | |
873 | */ | |
874 | dma_mark_clean(phys_to_virt(paddr), size); | |
875 | } | |
876 | ||
877 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
878 | size_t size, enum dma_data_direction dir, | |
879 | unsigned long attrs) | |
880 | { | |
881 | unmap_single(hwdev, dev_addr, size, dir, attrs); | |
882 | } | |
883 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); | |
884 | ||
885 | /* | |
886 | * Make physical memory consistent for a single streaming mode DMA translation | |
887 | * after a transfer. | |
888 | * | |
889 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer | |
890 | * using the cpu, yet do not wish to teardown the dma mapping, you must | |
891 | * call this function before doing so. At the next point you give the dma | |
892 | * address back to the card, you must first perform a | |
893 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
894 | */ | |
895 | static void | |
896 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, | |
897 | size_t size, enum dma_data_direction dir, | |
898 | enum dma_sync_target target) | |
899 | { | |
900 | phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); | |
901 | ||
902 | BUG_ON(dir == DMA_NONE); | |
903 | ||
904 | if (is_swiotlb_buffer(paddr)) { | |
905 | swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); | |
906 | return; | |
907 | } | |
908 | ||
909 | if (dir != DMA_FROM_DEVICE) | |
910 | return; | |
911 | ||
912 | dma_mark_clean(phys_to_virt(paddr), size); | |
913 | } | |
914 | ||
915 | void | |
916 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
917 | size_t size, enum dma_data_direction dir) | |
918 | { | |
919 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); | |
920 | } | |
921 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
922 | ||
923 | void | |
924 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
925 | size_t size, enum dma_data_direction dir) | |
926 | { | |
927 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); | |
928 | } | |
929 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
930 | ||
931 | /* | |
932 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
933 | * This is the scatter-gather version of the above swiotlb_map_page | |
934 | * interface. Here the scatter gather list elements are each tagged with the | |
935 | * appropriate dma address and length. They are obtained via | |
936 | * sg_dma_{address,length}(SG). | |
937 | * | |
938 | * NOTE: An implementation may be able to use a smaller number of | |
939 | * DMA address/length pairs than there are SG table elements. | |
940 | * (for example via virtual mapping capabilities) | |
941 | * The routine returns the number of addr/length pairs actually | |
942 | * used, at most nents. | |
943 | * | |
944 | * Device ownership issues as mentioned above for swiotlb_map_page are the | |
945 | * same here. | |
946 | */ | |
947 | int | |
948 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
949 | enum dma_data_direction dir, unsigned long attrs) | |
950 | { | |
951 | struct scatterlist *sg; | |
952 | int i; | |
953 | ||
954 | BUG_ON(dir == DMA_NONE); | |
955 | ||
956 | for_each_sg(sgl, sg, nelems, i) { | |
957 | phys_addr_t paddr = sg_phys(sg); | |
958 | dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); | |
959 | ||
960 | if (swiotlb_force == SWIOTLB_FORCE || | |
961 | !dma_capable(hwdev, dev_addr, sg->length)) { | |
962 | phys_addr_t map = map_single(hwdev, sg_phys(sg), | |
963 | sg->length, dir, attrs); | |
964 | if (map == SWIOTLB_MAP_ERROR) { | |
965 | /* Don't panic here, we expect map_sg users | |
966 | to do proper error handling. */ | |
967 | attrs |= DMA_ATTR_SKIP_CPU_SYNC; | |
968 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, | |
969 | attrs); | |
970 | sg_dma_len(sgl) = 0; | |
971 | return 0; | |
972 | } | |
973 | sg->dma_address = swiotlb_phys_to_dma(hwdev, map); | |
974 | } else | |
975 | sg->dma_address = dev_addr; | |
976 | sg_dma_len(sg) = sg->length; | |
977 | } | |
978 | return nelems; | |
979 | } | |
980 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); | |
981 | ||
982 | /* | |
983 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
984 | * concerning calls here are the same as for swiotlb_unmap_page() above. | |
985 | */ | |
986 | void | |
987 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, | |
988 | int nelems, enum dma_data_direction dir, | |
989 | unsigned long attrs) | |
990 | { | |
991 | struct scatterlist *sg; | |
992 | int i; | |
993 | ||
994 | BUG_ON(dir == DMA_NONE); | |
995 | ||
996 | for_each_sg(sgl, sg, nelems, i) | |
997 | unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir, | |
998 | attrs); | |
999 | } | |
1000 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); | |
1001 | ||
1002 | /* | |
1003 | * Make physical memory consistent for a set of streaming mode DMA translations | |
1004 | * after a transfer. | |
1005 | * | |
1006 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
1007 | * and usage. | |
1008 | */ | |
1009 | static void | |
1010 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, | |
1011 | int nelems, enum dma_data_direction dir, | |
1012 | enum dma_sync_target target) | |
1013 | { | |
1014 | struct scatterlist *sg; | |
1015 | int i; | |
1016 | ||
1017 | for_each_sg(sgl, sg, nelems, i) | |
1018 | swiotlb_sync_single(hwdev, sg->dma_address, | |
1019 | sg_dma_len(sg), dir, target); | |
1020 | } | |
1021 | ||
1022 | void | |
1023 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
1024 | int nelems, enum dma_data_direction dir) | |
1025 | { | |
1026 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); | |
1027 | } | |
1028 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | |
1029 | ||
1030 | void | |
1031 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
1032 | int nelems, enum dma_data_direction dir) | |
1033 | { | |
1034 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); | |
1035 | } | |
1036 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
1037 | ||
1038 | int | |
1039 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) | |
1040 | { | |
1041 | return (dma_addr == swiotlb_phys_to_dma(hwdev, io_tlb_overflow_buffer)); | |
1042 | } | |
1043 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
1044 | ||
1045 | /* | |
1046 | * Return whether the given device DMA address mask can be supported | |
1047 | * properly. For example, if your device can only drive the low 24-bits | |
1048 | * during bus mastering, then you would pass 0x00ffffff as the mask to | |
1049 | * this function. | |
1050 | */ | |
1051 | int | |
1052 | swiotlb_dma_supported(struct device *hwdev, u64 mask) | |
1053 | { | |
1054 | return swiotlb_phys_to_dma(hwdev, io_tlb_end - 1) <= mask; | |
1055 | } | |
1056 | EXPORT_SYMBOL(swiotlb_dma_supported); |