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memory: iommu support
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
19#include "qemu/bitops.h"
20#include "sysemu/kvm.h"
21#include <assert.h>
22
23#include "exec/memory-internal.h"
24
25//#define DEBUG_UNASSIGNED
26
27static unsigned memory_region_transaction_depth;
28static bool memory_region_update_pending;
29static bool global_dirty_log = false;
30
31static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37typedef struct AddrRange AddrRange;
38
39/*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44struct AddrRange {
45 Int128 start;
46 Int128 size;
47};
48
49static AddrRange addrrange_make(Int128 start, Int128 size)
50{
51 return (AddrRange) { start, size };
52}
53
54static bool addrrange_equal(AddrRange r1, AddrRange r2)
55{
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57}
58
59static Int128 addrrange_end(AddrRange r)
60{
61 return int128_add(r.start, r.size);
62}
63
64static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65{
66 int128_addto(&range.start, delta);
67 return range;
68}
69
70static bool addrrange_contains(AddrRange range, Int128 addr)
71{
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74}
75
76static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77{
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80}
81
82static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83{
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87}
88
89enum ListenerDirection { Forward, Reverse };
90
91static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93{
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96}
97
98#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = (fr)->addr.size, \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163};
164
165struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170};
171
172static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174{
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200}
201
202static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204{
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207}
208
209typedef struct FlatRange FlatRange;
210typedef struct FlatView FlatView;
211
212/* Range of memory in the global map. Addresses are absolute. */
213struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220};
221
222/* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229};
230
231typedef struct AddressSpaceOps AddressSpaceOps;
232
233#define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236static bool flatrange_equal(FlatRange *a, FlatRange *b)
237{
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243}
244
245static void flatview_init(FlatView *view)
246{
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250}
251
252/* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256{
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266}
267
268static void flatview_destroy(FlatView *view)
269{
270 g_free(view->ranges);
271}
272
273static bool can_merge(FlatRange *r1, FlatRange *r2)
274{
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283}
284
285/* Attempt to simplify a view by merging ajacent ranges */
286static void flatview_simplify(FlatView *view)
287{
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303}
304
305static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311{
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317}
318
319static void memory_region_read_accessor(void *opaque,
320 hwaddr addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325{
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334}
335
336static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342{
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348}
349
350static void memory_region_write_accessor(void *opaque,
351 hwaddr addr,
352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356{
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365}
366
367static void access_with_adjusted_size(hwaddr addr,
368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
373 hwaddr addr,
374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379{
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
390
391 /* FIXME: support unaligned access? */
392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
395#ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398#else
399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
400#endif
401 }
402}
403
404static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
405 unsigned width, bool write)
406{
407 const MemoryRegionPortio *mrp;
408
409 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
410 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
411 && width == mrp->size
412 && (write ? (bool)mrp->write : (bool)mrp->read)) {
413 return mrp;
414 }
415 }
416 return NULL;
417}
418
419static void memory_region_iorange_read(IORange *iorange,
420 uint64_t offset,
421 unsigned width,
422 uint64_t *data)
423{
424 MemoryRegionIORange *mrio
425 = container_of(iorange, MemoryRegionIORange, iorange);
426 MemoryRegion *mr = mrio->mr;
427
428 offset += mrio->offset;
429 if (mr->ops->old_portio) {
430 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
431 width, false);
432
433 *data = ((uint64_t)1 << (width * 8)) - 1;
434 if (mrp) {
435 *data = mrp->read(mr->opaque, offset);
436 } else if (width == 2) {
437 mrp = find_portio(mr, offset - mrio->offset, 1, false);
438 assert(mrp);
439 *data = mrp->read(mr->opaque, offset) |
440 (mrp->read(mr->opaque, offset + 1) << 8);
441 }
442 return;
443 }
444 *data = 0;
445 access_with_adjusted_size(offset, data, width,
446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_read_accessor, mr);
449}
450
451static void memory_region_iorange_write(IORange *iorange,
452 uint64_t offset,
453 unsigned width,
454 uint64_t data)
455{
456 MemoryRegionIORange *mrio
457 = container_of(iorange, MemoryRegionIORange, iorange);
458 MemoryRegion *mr = mrio->mr;
459
460 offset += mrio->offset;
461 if (mr->ops->old_portio) {
462 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
463 width, true);
464
465 if (mrp) {
466 mrp->write(mr->opaque, offset, data);
467 } else if (width == 2) {
468 mrp = find_portio(mr, offset - mrio->offset, 1, true);
469 assert(mrp);
470 mrp->write(mr->opaque, offset, data & 0xff);
471 mrp->write(mr->opaque, offset + 1, data >> 8);
472 }
473 return;
474 }
475 access_with_adjusted_size(offset, &data, width,
476 mr->ops->impl.min_access_size,
477 mr->ops->impl.max_access_size,
478 memory_region_write_accessor, mr);
479}
480
481static void memory_region_iorange_destructor(IORange *iorange)
482{
483 g_free(container_of(iorange, MemoryRegionIORange, iorange));
484}
485
486const IORangeOps memory_region_iorange_ops = {
487 .read = memory_region_iorange_read,
488 .write = memory_region_iorange_write,
489 .destructor = memory_region_iorange_destructor,
490};
491
492static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
493{
494 AddressSpace *as;
495
496 while (mr->parent) {
497 mr = mr->parent;
498 }
499 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
500 if (mr == as->root) {
501 return as;
502 }
503 }
504 abort();
505}
506
507/* Render a memory region into the global view. Ranges in @view obscure
508 * ranges in @mr.
509 */
510static void render_memory_region(FlatView *view,
511 MemoryRegion *mr,
512 Int128 base,
513 AddrRange clip,
514 bool readonly)
515{
516 MemoryRegion *subregion;
517 unsigned i;
518 hwaddr offset_in_region;
519 Int128 remain;
520 Int128 now;
521 FlatRange fr;
522 AddrRange tmp;
523
524 if (!mr->enabled) {
525 return;
526 }
527
528 int128_addto(&base, int128_make64(mr->addr));
529 readonly |= mr->readonly;
530
531 tmp = addrrange_make(base, mr->size);
532
533 if (!addrrange_intersects(tmp, clip)) {
534 return;
535 }
536
537 clip = addrrange_intersection(tmp, clip);
538
539 if (mr->alias) {
540 int128_subfrom(&base, int128_make64(mr->alias->addr));
541 int128_subfrom(&base, int128_make64(mr->alias_offset));
542 render_memory_region(view, mr->alias, base, clip, readonly);
543 return;
544 }
545
546 /* Render subregions in priority order. */
547 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
548 render_memory_region(view, subregion, base, clip, readonly);
549 }
550
551 if (!mr->terminates) {
552 return;
553 }
554
555 offset_in_region = int128_get64(int128_sub(clip.start, base));
556 base = clip.start;
557 remain = clip.size;
558
559 /* Render the region itself into any gaps left by the current view. */
560 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
561 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
562 continue;
563 }
564 if (int128_lt(base, view->ranges[i].addr.start)) {
565 now = int128_min(remain,
566 int128_sub(view->ranges[i].addr.start, base));
567 fr.mr = mr;
568 fr.offset_in_region = offset_in_region;
569 fr.addr = addrrange_make(base, now);
570 fr.dirty_log_mask = mr->dirty_log_mask;
571 fr.romd_mode = mr->romd_mode;
572 fr.readonly = readonly;
573 flatview_insert(view, i, &fr);
574 ++i;
575 int128_addto(&base, now);
576 offset_in_region += int128_get64(now);
577 int128_subfrom(&remain, now);
578 }
579 now = int128_sub(int128_min(int128_add(base, remain),
580 addrrange_end(view->ranges[i].addr)),
581 base);
582 int128_addto(&base, now);
583 offset_in_region += int128_get64(now);
584 int128_subfrom(&remain, now);
585 }
586 if (int128_nz(remain)) {
587 fr.mr = mr;
588 fr.offset_in_region = offset_in_region;
589 fr.addr = addrrange_make(base, remain);
590 fr.dirty_log_mask = mr->dirty_log_mask;
591 fr.romd_mode = mr->romd_mode;
592 fr.readonly = readonly;
593 flatview_insert(view, i, &fr);
594 }
595}
596
597/* Render a memory topology into a list of disjoint absolute ranges. */
598static FlatView generate_memory_topology(MemoryRegion *mr)
599{
600 FlatView view;
601
602 flatview_init(&view);
603
604 if (mr) {
605 render_memory_region(&view, mr, int128_zero(),
606 addrrange_make(int128_zero(), int128_2_64()), false);
607 }
608 flatview_simplify(&view);
609
610 return view;
611}
612
613static void address_space_add_del_ioeventfds(AddressSpace *as,
614 MemoryRegionIoeventfd *fds_new,
615 unsigned fds_new_nb,
616 MemoryRegionIoeventfd *fds_old,
617 unsigned fds_old_nb)
618{
619 unsigned iold, inew;
620 MemoryRegionIoeventfd *fd;
621 MemoryRegionSection section;
622
623 /* Generate a symmetric difference of the old and new fd sets, adding
624 * and deleting as necessary.
625 */
626
627 iold = inew = 0;
628 while (iold < fds_old_nb || inew < fds_new_nb) {
629 if (iold < fds_old_nb
630 && (inew == fds_new_nb
631 || memory_region_ioeventfd_before(fds_old[iold],
632 fds_new[inew]))) {
633 fd = &fds_old[iold];
634 section = (MemoryRegionSection) {
635 .address_space = as,
636 .offset_within_address_space = int128_get64(fd->addr.start),
637 .size = fd->addr.size,
638 };
639 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
640 fd->match_data, fd->data, fd->e);
641 ++iold;
642 } else if (inew < fds_new_nb
643 && (iold == fds_old_nb
644 || memory_region_ioeventfd_before(fds_new[inew],
645 fds_old[iold]))) {
646 fd = &fds_new[inew];
647 section = (MemoryRegionSection) {
648 .address_space = as,
649 .offset_within_address_space = int128_get64(fd->addr.start),
650 .size = fd->addr.size,
651 };
652 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
653 fd->match_data, fd->data, fd->e);
654 ++inew;
655 } else {
656 ++iold;
657 ++inew;
658 }
659 }
660}
661
662static void address_space_update_ioeventfds(AddressSpace *as)
663{
664 FlatRange *fr;
665 unsigned ioeventfd_nb = 0;
666 MemoryRegionIoeventfd *ioeventfds = NULL;
667 AddrRange tmp;
668 unsigned i;
669
670 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
671 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
672 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
673 int128_sub(fr->addr.start,
674 int128_make64(fr->offset_in_region)));
675 if (addrrange_intersects(fr->addr, tmp)) {
676 ++ioeventfd_nb;
677 ioeventfds = g_realloc(ioeventfds,
678 ioeventfd_nb * sizeof(*ioeventfds));
679 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
680 ioeventfds[ioeventfd_nb-1].addr = tmp;
681 }
682 }
683 }
684
685 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
686 as->ioeventfds, as->ioeventfd_nb);
687
688 g_free(as->ioeventfds);
689 as->ioeventfds = ioeventfds;
690 as->ioeventfd_nb = ioeventfd_nb;
691}
692
693static void address_space_update_topology_pass(AddressSpace *as,
694 FlatView old_view,
695 FlatView new_view,
696 bool adding)
697{
698 unsigned iold, inew;
699 FlatRange *frold, *frnew;
700
701 /* Generate a symmetric difference of the old and new memory maps.
702 * Kill ranges in the old map, and instantiate ranges in the new map.
703 */
704 iold = inew = 0;
705 while (iold < old_view.nr || inew < new_view.nr) {
706 if (iold < old_view.nr) {
707 frold = &old_view.ranges[iold];
708 } else {
709 frold = NULL;
710 }
711 if (inew < new_view.nr) {
712 frnew = &new_view.ranges[inew];
713 } else {
714 frnew = NULL;
715 }
716
717 if (frold
718 && (!frnew
719 || int128_lt(frold->addr.start, frnew->addr.start)
720 || (int128_eq(frold->addr.start, frnew->addr.start)
721 && !flatrange_equal(frold, frnew)))) {
722 /* In old, but (not in new, or in new but attributes changed). */
723
724 if (!adding) {
725 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
726 }
727
728 ++iold;
729 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
730 /* In both (logging may have changed) */
731
732 if (adding) {
733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
734 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
736 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
737 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
738 }
739 }
740
741 ++iold;
742 ++inew;
743 } else {
744 /* In new */
745
746 if (adding) {
747 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
748 }
749
750 ++inew;
751 }
752 }
753}
754
755
756static void address_space_update_topology(AddressSpace *as)
757{
758 FlatView old_view = *as->current_map;
759 FlatView new_view = generate_memory_topology(as->root);
760
761 address_space_update_topology_pass(as, old_view, new_view, false);
762 address_space_update_topology_pass(as, old_view, new_view, true);
763
764 *as->current_map = new_view;
765 flatview_destroy(&old_view);
766 address_space_update_ioeventfds(as);
767}
768
769void memory_region_transaction_begin(void)
770{
771 qemu_flush_coalesced_mmio_buffer();
772 ++memory_region_transaction_depth;
773}
774
775void memory_region_transaction_commit(void)
776{
777 AddressSpace *as;
778
779 assert(memory_region_transaction_depth);
780 --memory_region_transaction_depth;
781 if (!memory_region_transaction_depth && memory_region_update_pending) {
782 memory_region_update_pending = false;
783 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
784
785 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
786 address_space_update_topology(as);
787 }
788
789 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
790 }
791}
792
793static void memory_region_destructor_none(MemoryRegion *mr)
794{
795}
796
797static void memory_region_destructor_ram(MemoryRegion *mr)
798{
799 qemu_ram_free(mr->ram_addr);
800}
801
802static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
803{
804 qemu_ram_free_from_ptr(mr->ram_addr);
805}
806
807static void memory_region_destructor_rom_device(MemoryRegion *mr)
808{
809 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
810}
811
812static bool memory_region_wrong_endianness(MemoryRegion *mr)
813{
814#ifdef TARGET_WORDS_BIGENDIAN
815 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
816#else
817 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
818#endif
819}
820
821void memory_region_init(MemoryRegion *mr,
822 const char *name,
823 uint64_t size)
824{
825 mr->ops = &unassigned_mem_ops;
826 mr->opaque = NULL;
827 mr->iommu_ops = NULL;
828 mr->parent = NULL;
829 mr->size = int128_make64(size);
830 if (size == UINT64_MAX) {
831 mr->size = int128_2_64();
832 }
833 mr->addr = 0;
834 mr->subpage = false;
835 mr->enabled = true;
836 mr->terminates = false;
837 mr->ram = false;
838 mr->romd_mode = true;
839 mr->readonly = false;
840 mr->rom_device = false;
841 mr->destructor = memory_region_destructor_none;
842 mr->priority = 0;
843 mr->may_overlap = false;
844 mr->alias = NULL;
845 QTAILQ_INIT(&mr->subregions);
846 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
847 QTAILQ_INIT(&mr->coalesced);
848 mr->name = g_strdup(name);
849 mr->dirty_log_mask = 0;
850 mr->ioeventfd_nb = 0;
851 mr->ioeventfds = NULL;
852 mr->flush_coalesced_mmio = false;
853}
854
855static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
856 unsigned size)
857{
858#ifdef DEBUG_UNASSIGNED
859 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
860#endif
861#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
862 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
863#endif
864 return 0;
865}
866
867static void unassigned_mem_write(void *opaque, hwaddr addr,
868 uint64_t val, unsigned size)
869{
870#ifdef DEBUG_UNASSIGNED
871 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
872#endif
873#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
874 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
875#endif
876}
877
878static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
879 unsigned size, bool is_write)
880{
881 return false;
882}
883
884const MemoryRegionOps unassigned_mem_ops = {
885 .valid.accepts = unassigned_mem_accepts,
886 .endianness = DEVICE_NATIVE_ENDIAN,
887};
888
889bool memory_region_access_valid(MemoryRegion *mr,
890 hwaddr addr,
891 unsigned size,
892 bool is_write)
893{
894 int access_size_min, access_size_max;
895 int access_size, i;
896
897 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
898 return false;
899 }
900
901 if (!mr->ops->valid.accepts) {
902 return true;
903 }
904
905 access_size_min = mr->ops->valid.min_access_size;
906 if (!mr->ops->valid.min_access_size) {
907 access_size_min = 1;
908 }
909
910 access_size_max = mr->ops->valid.max_access_size;
911 if (!mr->ops->valid.max_access_size) {
912 access_size_max = 4;
913 }
914
915 access_size = MAX(MIN(size, access_size_max), access_size_min);
916 for (i = 0; i < size; i += access_size) {
917 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
918 is_write)) {
919 return false;
920 }
921 }
922
923 return true;
924}
925
926static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
927 hwaddr addr,
928 unsigned size)
929{
930 uint64_t data = 0;
931
932 if (mr->ops->read) {
933 access_with_adjusted_size(addr, &data, size,
934 mr->ops->impl.min_access_size,
935 mr->ops->impl.max_access_size,
936 memory_region_read_accessor, mr);
937 } else {
938 access_with_adjusted_size(addr, &data, size, 1, 4,
939 memory_region_oldmmio_read_accessor, mr);
940 }
941
942 return data;
943}
944
945static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
946{
947 if (memory_region_wrong_endianness(mr)) {
948 switch (size) {
949 case 1:
950 break;
951 case 2:
952 *data = bswap16(*data);
953 break;
954 case 4:
955 *data = bswap32(*data);
956 break;
957 case 8:
958 *data = bswap64(*data);
959 break;
960 default:
961 abort();
962 }
963 }
964}
965
966static bool memory_region_dispatch_read(MemoryRegion *mr,
967 hwaddr addr,
968 uint64_t *pval,
969 unsigned size)
970{
971 if (!memory_region_access_valid(mr, addr, size, false)) {
972 *pval = unassigned_mem_read(mr, addr, size);
973 return true;
974 }
975
976 *pval = memory_region_dispatch_read1(mr, addr, size);
977 adjust_endianness(mr, pval, size);
978 return false;
979}
980
981static bool memory_region_dispatch_write(MemoryRegion *mr,
982 hwaddr addr,
983 uint64_t data,
984 unsigned size)
985{
986 if (!memory_region_access_valid(mr, addr, size, true)) {
987 unassigned_mem_write(mr, addr, data, size);
988 return true;
989 }
990
991 adjust_endianness(mr, &data, size);
992
993 if (mr->ops->write) {
994 access_with_adjusted_size(addr, &data, size,
995 mr->ops->impl.min_access_size,
996 mr->ops->impl.max_access_size,
997 memory_region_write_accessor, mr);
998 } else {
999 access_with_adjusted_size(addr, &data, size, 1, 4,
1000 memory_region_oldmmio_write_accessor, mr);
1001 }
1002 return false;
1003}
1004
1005void memory_region_init_io(MemoryRegion *mr,
1006 const MemoryRegionOps *ops,
1007 void *opaque,
1008 const char *name,
1009 uint64_t size)
1010{
1011 memory_region_init(mr, name, size);
1012 mr->ops = ops;
1013 mr->opaque = opaque;
1014 mr->terminates = true;
1015 mr->ram_addr = ~(ram_addr_t)0;
1016}
1017
1018void memory_region_init_ram(MemoryRegion *mr,
1019 const char *name,
1020 uint64_t size)
1021{
1022 memory_region_init(mr, name, size);
1023 mr->ram = true;
1024 mr->terminates = true;
1025 mr->destructor = memory_region_destructor_ram;
1026 mr->ram_addr = qemu_ram_alloc(size, mr);
1027}
1028
1029void memory_region_init_ram_ptr(MemoryRegion *mr,
1030 const char *name,
1031 uint64_t size,
1032 void *ptr)
1033{
1034 memory_region_init(mr, name, size);
1035 mr->ram = true;
1036 mr->terminates = true;
1037 mr->destructor = memory_region_destructor_ram_from_ptr;
1038 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1039}
1040
1041void memory_region_init_alias(MemoryRegion *mr,
1042 const char *name,
1043 MemoryRegion *orig,
1044 hwaddr offset,
1045 uint64_t size)
1046{
1047 memory_region_init(mr, name, size);
1048 mr->alias = orig;
1049 mr->alias_offset = offset;
1050}
1051
1052void memory_region_init_rom_device(MemoryRegion *mr,
1053 const MemoryRegionOps *ops,
1054 void *opaque,
1055 const char *name,
1056 uint64_t size)
1057{
1058 memory_region_init(mr, name, size);
1059 mr->ops = ops;
1060 mr->opaque = opaque;
1061 mr->terminates = true;
1062 mr->rom_device = true;
1063 mr->destructor = memory_region_destructor_rom_device;
1064 mr->ram_addr = qemu_ram_alloc(size, mr);
1065}
1066
1067void memory_region_init_iommu(MemoryRegion *mr,
1068 const MemoryRegionIOMMUOps *ops,
1069 const char *name,
1070 uint64_t size)
1071{
1072 memory_region_init(mr, name, size);
1073 mr->iommu_ops = ops,
1074 mr->terminates = true; /* then re-forwards */
1075}
1076
1077void memory_region_init_reservation(MemoryRegion *mr,
1078 const char *name,
1079 uint64_t size)
1080{
1081 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1082}
1083
1084void memory_region_destroy(MemoryRegion *mr)
1085{
1086 assert(QTAILQ_EMPTY(&mr->subregions));
1087 assert(memory_region_transaction_depth == 0);
1088 mr->destructor(mr);
1089 memory_region_clear_coalescing(mr);
1090 g_free((char *)mr->name);
1091 g_free(mr->ioeventfds);
1092}
1093
1094uint64_t memory_region_size(MemoryRegion *mr)
1095{
1096 if (int128_eq(mr->size, int128_2_64())) {
1097 return UINT64_MAX;
1098 }
1099 return int128_get64(mr->size);
1100}
1101
1102const char *memory_region_name(MemoryRegion *mr)
1103{
1104 return mr->name;
1105}
1106
1107bool memory_region_is_ram(MemoryRegion *mr)
1108{
1109 return mr->ram;
1110}
1111
1112bool memory_region_is_logging(MemoryRegion *mr)
1113{
1114 return mr->dirty_log_mask;
1115}
1116
1117bool memory_region_is_rom(MemoryRegion *mr)
1118{
1119 return mr->ram && mr->readonly;
1120}
1121
1122bool memory_region_is_iommu(MemoryRegion *mr)
1123{
1124 return mr->iommu_ops;
1125}
1126
1127void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1128{
1129 uint8_t mask = 1 << client;
1130
1131 memory_region_transaction_begin();
1132 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1133 memory_region_update_pending |= mr->enabled;
1134 memory_region_transaction_commit();
1135}
1136
1137bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1138 hwaddr size, unsigned client)
1139{
1140 assert(mr->terminates);
1141 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1142 1 << client);
1143}
1144
1145void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1146 hwaddr size)
1147{
1148 assert(mr->terminates);
1149 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1150}
1151
1152bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1153 hwaddr size, unsigned client)
1154{
1155 bool ret;
1156 assert(mr->terminates);
1157 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1158 1 << client);
1159 if (ret) {
1160 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1161 mr->ram_addr + addr + size,
1162 1 << client);
1163 }
1164 return ret;
1165}
1166
1167
1168void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1169{
1170 AddressSpace *as;
1171 FlatRange *fr;
1172
1173 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1174 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1175 if (fr->mr == mr) {
1176 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1177 }
1178 }
1179 }
1180}
1181
1182void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1183{
1184 if (mr->readonly != readonly) {
1185 memory_region_transaction_begin();
1186 mr->readonly = readonly;
1187 memory_region_update_pending |= mr->enabled;
1188 memory_region_transaction_commit();
1189 }
1190}
1191
1192void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1193{
1194 if (mr->romd_mode != romd_mode) {
1195 memory_region_transaction_begin();
1196 mr->romd_mode = romd_mode;
1197 memory_region_update_pending |= mr->enabled;
1198 memory_region_transaction_commit();
1199 }
1200}
1201
1202void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1203 hwaddr size, unsigned client)
1204{
1205 assert(mr->terminates);
1206 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1207 mr->ram_addr + addr + size,
1208 1 << client);
1209}
1210
1211void *memory_region_get_ram_ptr(MemoryRegion *mr)
1212{
1213 if (mr->alias) {
1214 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1215 }
1216
1217 assert(mr->terminates);
1218
1219 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1220}
1221
1222static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1223{
1224 FlatRange *fr;
1225 CoalescedMemoryRange *cmr;
1226 AddrRange tmp;
1227 MemoryRegionSection section;
1228
1229 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1230 if (fr->mr == mr) {
1231 section = (MemoryRegionSection) {
1232 .address_space = as,
1233 .offset_within_address_space = int128_get64(fr->addr.start),
1234 .size = fr->addr.size,
1235 };
1236
1237 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1238 int128_get64(fr->addr.start),
1239 int128_get64(fr->addr.size));
1240 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1241 tmp = addrrange_shift(cmr->addr,
1242 int128_sub(fr->addr.start,
1243 int128_make64(fr->offset_in_region)));
1244 if (!addrrange_intersects(tmp, fr->addr)) {
1245 continue;
1246 }
1247 tmp = addrrange_intersection(tmp, fr->addr);
1248 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1249 int128_get64(tmp.start),
1250 int128_get64(tmp.size));
1251 }
1252 }
1253 }
1254}
1255
1256static void memory_region_update_coalesced_range(MemoryRegion *mr)
1257{
1258 AddressSpace *as;
1259
1260 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1261 memory_region_update_coalesced_range_as(mr, as);
1262 }
1263}
1264
1265void memory_region_set_coalescing(MemoryRegion *mr)
1266{
1267 memory_region_clear_coalescing(mr);
1268 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1269}
1270
1271void memory_region_add_coalescing(MemoryRegion *mr,
1272 hwaddr offset,
1273 uint64_t size)
1274{
1275 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1276
1277 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1278 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1279 memory_region_update_coalesced_range(mr);
1280 memory_region_set_flush_coalesced(mr);
1281}
1282
1283void memory_region_clear_coalescing(MemoryRegion *mr)
1284{
1285 CoalescedMemoryRange *cmr;
1286
1287 qemu_flush_coalesced_mmio_buffer();
1288 mr->flush_coalesced_mmio = false;
1289
1290 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1291 cmr = QTAILQ_FIRST(&mr->coalesced);
1292 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1293 g_free(cmr);
1294 }
1295 memory_region_update_coalesced_range(mr);
1296}
1297
1298void memory_region_set_flush_coalesced(MemoryRegion *mr)
1299{
1300 mr->flush_coalesced_mmio = true;
1301}
1302
1303void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1304{
1305 qemu_flush_coalesced_mmio_buffer();
1306 if (QTAILQ_EMPTY(&mr->coalesced)) {
1307 mr->flush_coalesced_mmio = false;
1308 }
1309}
1310
1311void memory_region_add_eventfd(MemoryRegion *mr,
1312 hwaddr addr,
1313 unsigned size,
1314 bool match_data,
1315 uint64_t data,
1316 EventNotifier *e)
1317{
1318 MemoryRegionIoeventfd mrfd = {
1319 .addr.start = int128_make64(addr),
1320 .addr.size = int128_make64(size),
1321 .match_data = match_data,
1322 .data = data,
1323 .e = e,
1324 };
1325 unsigned i;
1326
1327 adjust_endianness(mr, &mrfd.data, size);
1328 memory_region_transaction_begin();
1329 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1330 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1331 break;
1332 }
1333 }
1334 ++mr->ioeventfd_nb;
1335 mr->ioeventfds = g_realloc(mr->ioeventfds,
1336 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1337 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1338 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1339 mr->ioeventfds[i] = mrfd;
1340 memory_region_update_pending |= mr->enabled;
1341 memory_region_transaction_commit();
1342}
1343
1344void memory_region_del_eventfd(MemoryRegion *mr,
1345 hwaddr addr,
1346 unsigned size,
1347 bool match_data,
1348 uint64_t data,
1349 EventNotifier *e)
1350{
1351 MemoryRegionIoeventfd mrfd = {
1352 .addr.start = int128_make64(addr),
1353 .addr.size = int128_make64(size),
1354 .match_data = match_data,
1355 .data = data,
1356 .e = e,
1357 };
1358 unsigned i;
1359
1360 adjust_endianness(mr, &mrfd.data, size);
1361 memory_region_transaction_begin();
1362 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1363 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1364 break;
1365 }
1366 }
1367 assert(i != mr->ioeventfd_nb);
1368 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1369 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1370 --mr->ioeventfd_nb;
1371 mr->ioeventfds = g_realloc(mr->ioeventfds,
1372 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1373 memory_region_update_pending |= mr->enabled;
1374 memory_region_transaction_commit();
1375}
1376
1377static void memory_region_add_subregion_common(MemoryRegion *mr,
1378 hwaddr offset,
1379 MemoryRegion *subregion)
1380{
1381 MemoryRegion *other;
1382
1383 memory_region_transaction_begin();
1384
1385 assert(!subregion->parent);
1386 subregion->parent = mr;
1387 subregion->addr = offset;
1388 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1389 if (subregion->may_overlap || other->may_overlap) {
1390 continue;
1391 }
1392 if (int128_ge(int128_make64(offset),
1393 int128_add(int128_make64(other->addr), other->size))
1394 || int128_le(int128_add(int128_make64(offset), subregion->size),
1395 int128_make64(other->addr))) {
1396 continue;
1397 }
1398#if 0
1399 printf("warning: subregion collision %llx/%llx (%s) "
1400 "vs %llx/%llx (%s)\n",
1401 (unsigned long long)offset,
1402 (unsigned long long)int128_get64(subregion->size),
1403 subregion->name,
1404 (unsigned long long)other->addr,
1405 (unsigned long long)int128_get64(other->size),
1406 other->name);
1407#endif
1408 }
1409 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1410 if (subregion->priority >= other->priority) {
1411 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1412 goto done;
1413 }
1414 }
1415 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1416done:
1417 memory_region_update_pending |= mr->enabled && subregion->enabled;
1418 memory_region_transaction_commit();
1419}
1420
1421
1422void memory_region_add_subregion(MemoryRegion *mr,
1423 hwaddr offset,
1424 MemoryRegion *subregion)
1425{
1426 subregion->may_overlap = false;
1427 subregion->priority = 0;
1428 memory_region_add_subregion_common(mr, offset, subregion);
1429}
1430
1431void memory_region_add_subregion_overlap(MemoryRegion *mr,
1432 hwaddr offset,
1433 MemoryRegion *subregion,
1434 unsigned priority)
1435{
1436 subregion->may_overlap = true;
1437 subregion->priority = priority;
1438 memory_region_add_subregion_common(mr, offset, subregion);
1439}
1440
1441void memory_region_del_subregion(MemoryRegion *mr,
1442 MemoryRegion *subregion)
1443{
1444 memory_region_transaction_begin();
1445 assert(subregion->parent == mr);
1446 subregion->parent = NULL;
1447 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1448 memory_region_update_pending |= mr->enabled && subregion->enabled;
1449 memory_region_transaction_commit();
1450}
1451
1452void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1453{
1454 if (enabled == mr->enabled) {
1455 return;
1456 }
1457 memory_region_transaction_begin();
1458 mr->enabled = enabled;
1459 memory_region_update_pending = true;
1460 memory_region_transaction_commit();
1461}
1462
1463void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1464{
1465 MemoryRegion *parent = mr->parent;
1466 unsigned priority = mr->priority;
1467 bool may_overlap = mr->may_overlap;
1468
1469 if (addr == mr->addr || !parent) {
1470 mr->addr = addr;
1471 return;
1472 }
1473
1474 memory_region_transaction_begin();
1475 memory_region_del_subregion(parent, mr);
1476 if (may_overlap) {
1477 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1478 } else {
1479 memory_region_add_subregion(parent, addr, mr);
1480 }
1481 memory_region_transaction_commit();
1482}
1483
1484void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1485{
1486 assert(mr->alias);
1487
1488 if (offset == mr->alias_offset) {
1489 return;
1490 }
1491
1492 memory_region_transaction_begin();
1493 mr->alias_offset = offset;
1494 memory_region_update_pending |= mr->enabled;
1495 memory_region_transaction_commit();
1496}
1497
1498ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1499{
1500 return mr->ram_addr;
1501}
1502
1503static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1504{
1505 const AddrRange *addr = addr_;
1506 const FlatRange *fr = fr_;
1507
1508 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1509 return -1;
1510 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1511 return 1;
1512 }
1513 return 0;
1514}
1515
1516static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1517{
1518 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1519 sizeof(FlatRange), cmp_flatrange_addr);
1520}
1521
1522MemoryRegionSection memory_region_find(MemoryRegion *mr,
1523 hwaddr addr, uint64_t size)
1524{
1525 MemoryRegionSection ret = { .mr = NULL };
1526 MemoryRegion *root;
1527 AddressSpace *as;
1528 AddrRange range;
1529 FlatRange *fr;
1530
1531 addr += mr->addr;
1532 for (root = mr; root->parent; ) {
1533 root = root->parent;
1534 addr += root->addr;
1535 }
1536
1537 as = memory_region_to_address_space(root);
1538 range = addrrange_make(int128_make64(addr), int128_make64(size));
1539 fr = address_space_lookup(as, range);
1540 if (!fr) {
1541 return ret;
1542 }
1543
1544 while (fr > as->current_map->ranges
1545 && addrrange_intersects(fr[-1].addr, range)) {
1546 --fr;
1547 }
1548
1549 ret.mr = fr->mr;
1550 ret.address_space = as;
1551 range = addrrange_intersection(range, fr->addr);
1552 ret.offset_within_region = fr->offset_in_region;
1553 ret.offset_within_region += int128_get64(int128_sub(range.start,
1554 fr->addr.start));
1555 ret.size = range.size;
1556 ret.offset_within_address_space = int128_get64(range.start);
1557 ret.readonly = fr->readonly;
1558 return ret;
1559}
1560
1561void address_space_sync_dirty_bitmap(AddressSpace *as)
1562{
1563 FlatRange *fr;
1564
1565 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1566 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1567 }
1568}
1569
1570void memory_global_dirty_log_start(void)
1571{
1572 global_dirty_log = true;
1573 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1574}
1575
1576void memory_global_dirty_log_stop(void)
1577{
1578 global_dirty_log = false;
1579 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1580}
1581
1582static void listener_add_address_space(MemoryListener *listener,
1583 AddressSpace *as)
1584{
1585 FlatRange *fr;
1586
1587 if (listener->address_space_filter
1588 && listener->address_space_filter != as) {
1589 return;
1590 }
1591
1592 if (global_dirty_log) {
1593 if (listener->log_global_start) {
1594 listener->log_global_start(listener);
1595 }
1596 }
1597
1598 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1599 MemoryRegionSection section = {
1600 .mr = fr->mr,
1601 .address_space = as,
1602 .offset_within_region = fr->offset_in_region,
1603 .size = fr->addr.size,
1604 .offset_within_address_space = int128_get64(fr->addr.start),
1605 .readonly = fr->readonly,
1606 };
1607 if (listener->region_add) {
1608 listener->region_add(listener, &section);
1609 }
1610 }
1611}
1612
1613void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1614{
1615 MemoryListener *other = NULL;
1616 AddressSpace *as;
1617
1618 listener->address_space_filter = filter;
1619 if (QTAILQ_EMPTY(&memory_listeners)
1620 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1621 memory_listeners)->priority) {
1622 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1623 } else {
1624 QTAILQ_FOREACH(other, &memory_listeners, link) {
1625 if (listener->priority < other->priority) {
1626 break;
1627 }
1628 }
1629 QTAILQ_INSERT_BEFORE(other, listener, link);
1630 }
1631
1632 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1633 listener_add_address_space(listener, as);
1634 }
1635}
1636
1637void memory_listener_unregister(MemoryListener *listener)
1638{
1639 QTAILQ_REMOVE(&memory_listeners, listener, link);
1640}
1641
1642void address_space_init(AddressSpace *as, MemoryRegion *root)
1643{
1644 memory_region_transaction_begin();
1645 as->root = root;
1646 as->current_map = g_new(FlatView, 1);
1647 flatview_init(as->current_map);
1648 as->ioeventfd_nb = 0;
1649 as->ioeventfds = NULL;
1650 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1651 as->name = NULL;
1652 address_space_init_dispatch(as);
1653 memory_region_update_pending |= root->enabled;
1654 memory_region_transaction_commit();
1655}
1656
1657void address_space_destroy(AddressSpace *as)
1658{
1659 /* Flush out anything from MemoryListeners listening in on this */
1660 memory_region_transaction_begin();
1661 as->root = NULL;
1662 memory_region_transaction_commit();
1663 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1664 address_space_destroy_dispatch(as);
1665 flatview_destroy(as->current_map);
1666 g_free(as->current_map);
1667 g_free(as->ioeventfds);
1668}
1669
1670bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1671{
1672 return memory_region_dispatch_read(mr, addr, pval, size);
1673}
1674
1675bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1676 uint64_t val, unsigned size)
1677{
1678 return memory_region_dispatch_write(mr, addr, val, size);
1679}
1680
1681typedef struct MemoryRegionList MemoryRegionList;
1682
1683struct MemoryRegionList {
1684 const MemoryRegion *mr;
1685 bool printed;
1686 QTAILQ_ENTRY(MemoryRegionList) queue;
1687};
1688
1689typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1690
1691static void mtree_print_mr(fprintf_function mon_printf, void *f,
1692 const MemoryRegion *mr, unsigned int level,
1693 hwaddr base,
1694 MemoryRegionListHead *alias_print_queue)
1695{
1696 MemoryRegionList *new_ml, *ml, *next_ml;
1697 MemoryRegionListHead submr_print_queue;
1698 const MemoryRegion *submr;
1699 unsigned int i;
1700
1701 if (!mr || !mr->enabled) {
1702 return;
1703 }
1704
1705 for (i = 0; i < level; i++) {
1706 mon_printf(f, " ");
1707 }
1708
1709 if (mr->alias) {
1710 MemoryRegionList *ml;
1711 bool found = false;
1712
1713 /* check if the alias is already in the queue */
1714 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1715 if (ml->mr == mr->alias && !ml->printed) {
1716 found = true;
1717 }
1718 }
1719
1720 if (!found) {
1721 ml = g_new(MemoryRegionList, 1);
1722 ml->mr = mr->alias;
1723 ml->printed = false;
1724 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1725 }
1726 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1727 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1728 "-" TARGET_FMT_plx "\n",
1729 base + mr->addr,
1730 base + mr->addr
1731 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1732 mr->priority,
1733 mr->romd_mode ? 'R' : '-',
1734 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1735 : '-',
1736 mr->name,
1737 mr->alias->name,
1738 mr->alias_offset,
1739 mr->alias_offset
1740 + (hwaddr)int128_get64(mr->size) - 1);
1741 } else {
1742 mon_printf(f,
1743 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1744 base + mr->addr,
1745 base + mr->addr
1746 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1747 mr->priority,
1748 mr->romd_mode ? 'R' : '-',
1749 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1750 : '-',
1751 mr->name);
1752 }
1753
1754 QTAILQ_INIT(&submr_print_queue);
1755
1756 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1757 new_ml = g_new(MemoryRegionList, 1);
1758 new_ml->mr = submr;
1759 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1760 if (new_ml->mr->addr < ml->mr->addr ||
1761 (new_ml->mr->addr == ml->mr->addr &&
1762 new_ml->mr->priority > ml->mr->priority)) {
1763 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1764 new_ml = NULL;
1765 break;
1766 }
1767 }
1768 if (new_ml) {
1769 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1770 }
1771 }
1772
1773 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1774 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1775 alias_print_queue);
1776 }
1777
1778 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1779 g_free(ml);
1780 }
1781}
1782
1783void mtree_info(fprintf_function mon_printf, void *f)
1784{
1785 MemoryRegionListHead ml_head;
1786 MemoryRegionList *ml, *ml2;
1787 AddressSpace *as;
1788
1789 QTAILQ_INIT(&ml_head);
1790
1791 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1792 if (!as->name) {
1793 continue;
1794 }
1795 mon_printf(f, "%s\n", as->name);
1796 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1797 }
1798
1799 mon_printf(f, "aliases\n");
1800 /* print aliased regions */
1801 QTAILQ_FOREACH(ml, &ml_head, queue) {
1802 if (!ml->printed) {
1803 mon_printf(f, "%s\n", ml->mr->name);
1804 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1805 }
1806 }
1807
1808 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1809 g_free(ml);
1810 }
1811}
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