]> git.proxmox.com Git - mirror_qemu.git/blame_incremental - memory.c
projects / mirror_qemu.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
memory: seek FlatView sharing candidates among children subregions
[mirror_qemu.git] / memory.c
... / ...
CommitLineData
1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16#include "qemu/osdep.h"
17#include "qapi/error.h"
18#include "qemu-common.h"
19#include "cpu.h"
20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
23#include "qapi/visitor.h"
24#include "qemu/bitops.h"
25#include "qemu/error-report.h"
26#include "qom/object.h"
27#include "trace-root.h"
28
29#include "exec/memory-internal.h"
30#include "exec/ram_addr.h"
31#include "sysemu/kvm.h"
32#include "sysemu/sysemu.h"
33#include "hw/misc/mmio_interface.h"
34#include "hw/qdev-properties.h"
35#include "migration/vmstate.h"
36
37//#define DEBUG_UNASSIGNED
38
39static unsigned memory_region_transaction_depth;
40static bool memory_region_update_pending;
41static bool ioeventfd_update_pending;
42static bool global_dirty_log = false;
43
44static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50static GHashTable *flat_views;
51
52typedef struct AddrRange AddrRange;
53
54/*
55 * Note that signed integers are needed for negative offsetting in aliases
56 * (large MemoryRegion::alias_offset).
57 */
58struct AddrRange {
59 Int128 start;
60 Int128 size;
61};
62
63static AddrRange addrrange_make(Int128 start, Int128 size)
64{
65 return (AddrRange) { start, size };
66}
67
68static bool addrrange_equal(AddrRange r1, AddrRange r2)
69{
70 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
71}
72
73static Int128 addrrange_end(AddrRange r)
74{
75 return int128_add(r.start, r.size);
76}
77
78static AddrRange addrrange_shift(AddrRange range, Int128 delta)
79{
80 int128_addto(&range.start, delta);
81 return range;
82}
83
84static bool addrrange_contains(AddrRange range, Int128 addr)
85{
86 return int128_ge(addr, range.start)
87 && int128_lt(addr, addrrange_end(range));
88}
89
90static bool addrrange_intersects(AddrRange r1, AddrRange r2)
91{
92 return addrrange_contains(r1, r2.start)
93 || addrrange_contains(r2, r1.start);
94}
95
96static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
97{
98 Int128 start = int128_max(r1.start, r2.start);
99 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
100 return addrrange_make(start, int128_sub(end, start));
101}
102
103enum ListenerDirection { Forward, Reverse };
104
105#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
106 do { \
107 MemoryListener *_listener; \
108 \
109 switch (_direction) { \
110 case Forward: \
111 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
112 if (_listener->_callback) { \
113 _listener->_callback(_listener, ##_args); \
114 } \
115 } \
116 break; \
117 case Reverse: \
118 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
119 memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 struct memory_listeners_as *list = &(_as)->listeners; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, list, link_as) { \
138 if (_listener->_callback) { \
139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 case Reverse: \
144 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
145 link_as) { \
146 if (_listener->_callback) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156/* No need to ref/unref .mr, the FlatRange keeps it alive. */
157#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 do { \
159 MemoryRegionSection mrs = section_from_flat_range(fr, \
160 address_space_to_flatview(as)); \
161 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
162 } while(0)
163
164struct CoalescedMemoryRange {
165 AddrRange addr;
166 QTAILQ_ENTRY(CoalescedMemoryRange) link;
167};
168
169struct MemoryRegionIoeventfd {
170 AddrRange addr;
171 bool match_data;
172 uint64_t data;
173 EventNotifier *e;
174};
175
176static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
177 MemoryRegionIoeventfd b)
178{
179 if (int128_lt(a.addr.start, b.addr.start)) {
180 return true;
181 } else if (int128_gt(a.addr.start, b.addr.start)) {
182 return false;
183 } else if (int128_lt(a.addr.size, b.addr.size)) {
184 return true;
185 } else if (int128_gt(a.addr.size, b.addr.size)) {
186 return false;
187 } else if (a.match_data < b.match_data) {
188 return true;
189 } else if (a.match_data > b.match_data) {
190 return false;
191 } else if (a.match_data) {
192 if (a.data < b.data) {
193 return true;
194 } else if (a.data > b.data) {
195 return false;
196 }
197 }
198 if (a.e < b.e) {
199 return true;
200 } else if (a.e > b.e) {
201 return false;
202 }
203 return false;
204}
205
206static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
207 MemoryRegionIoeventfd b)
208{
209 return !memory_region_ioeventfd_before(a, b)
210 && !memory_region_ioeventfd_before(b, a);
211}
212
213typedef struct FlatRange FlatRange;
214
215/* Range of memory in the global map. Addresses are absolute. */
216struct FlatRange {
217 MemoryRegion *mr;
218 hwaddr offset_in_region;
219 AddrRange addr;
220 uint8_t dirty_log_mask;
221 bool romd_mode;
222 bool readonly;
223};
224
225/* Flattened global view of current active memory hierarchy. Kept in sorted
226 * order.
227 */
228struct FlatView {
229 struct rcu_head rcu;
230 unsigned ref;
231 FlatRange *ranges;
232 unsigned nr;
233 unsigned nr_allocated;
234 struct AddressSpaceDispatch *dispatch;
235 MemoryRegion *root;
236};
237
238typedef struct AddressSpaceOps AddressSpaceOps;
239
240#define FOR_EACH_FLAT_RANGE(var, view) \
241 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
242
243static inline MemoryRegionSection
244section_from_flat_range(FlatRange *fr, FlatView *fv)
245{
246 return (MemoryRegionSection) {
247 .mr = fr->mr,
248 .fv = fv,
249 .offset_within_region = fr->offset_in_region,
250 .size = fr->addr.size,
251 .offset_within_address_space = int128_get64(fr->addr.start),
252 .readonly = fr->readonly,
253 };
254}
255
256static bool flatrange_equal(FlatRange *a, FlatRange *b)
257{
258 return a->mr == b->mr
259 && addrrange_equal(a->addr, b->addr)
260 && a->offset_in_region == b->offset_in_region
261 && a->romd_mode == b->romd_mode
262 && a->readonly == b->readonly;
263}
264
265static FlatView *flatview_new(MemoryRegion *mr_root)
266{
267 FlatView *view;
268
269 view = g_new0(FlatView, 1);
270 view->ref = 1;
271 view->root = mr_root;
272 memory_region_ref(mr_root);
273 trace_flatview_new(view, mr_root);
274
275 return view;
276}
277
278/* Insert a range into a given position. Caller is responsible for maintaining
279 * sorting order.
280 */
281static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
282{
283 if (view->nr == view->nr_allocated) {
284 view->nr_allocated = MAX(2 * view->nr, 10);
285 view->ranges = g_realloc(view->ranges,
286 view->nr_allocated * sizeof(*view->ranges));
287 }
288 memmove(view->ranges + pos + 1, view->ranges + pos,
289 (view->nr - pos) * sizeof(FlatRange));
290 view->ranges[pos] = *range;
291 memory_region_ref(range->mr);
292 ++view->nr;
293}
294
295static void flatview_destroy(FlatView *view)
296{
297 int i;
298
299 trace_flatview_destroy(view, view->root);
300 if (view->dispatch) {
301 address_space_dispatch_free(view->dispatch);
302 }
303 for (i = 0; i < view->nr; i++) {
304 memory_region_unref(view->ranges[i].mr);
305 }
306 g_free(view->ranges);
307 memory_region_unref(view->root);
308 g_free(view);
309}
310
311static bool flatview_ref(FlatView *view)
312{
313 return atomic_fetch_inc_nonzero(&view->ref) > 0;
314}
315
316static void flatview_unref(FlatView *view)
317{
318 if (atomic_fetch_dec(&view->ref) == 1) {
319 trace_flatview_destroy_rcu(view, view->root);
320 call_rcu(view, flatview_destroy, rcu);
321 }
322}
323
324FlatView *address_space_to_flatview(AddressSpace *as)
325{
326 return atomic_rcu_read(&as->current_map);
327}
328
329AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv)
330{
331 return fv->dispatch;
332}
333
334AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as)
335{
336 return flatview_to_dispatch(address_space_to_flatview(as));
337}
338
339static bool can_merge(FlatRange *r1, FlatRange *r2)
340{
341 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
342 && r1->mr == r2->mr
343 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
344 r1->addr.size),
345 int128_make64(r2->offset_in_region))
346 && r1->dirty_log_mask == r2->dirty_log_mask
347 && r1->romd_mode == r2->romd_mode
348 && r1->readonly == r2->readonly;
349}
350
351/* Attempt to simplify a view by merging adjacent ranges */
352static void flatview_simplify(FlatView *view)
353{
354 unsigned i, j;
355
356 i = 0;
357 while (i < view->nr) {
358 j = i + 1;
359 while (j < view->nr
360 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
361 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
362 ++j;
363 }
364 ++i;
365 memmove(&view->ranges[i], &view->ranges[j],
366 (view->nr - j) * sizeof(view->ranges[j]));
367 view->nr -= j - i;
368 }
369}
370
371static bool memory_region_big_endian(MemoryRegion *mr)
372{
373#ifdef TARGET_WORDS_BIGENDIAN
374 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
375#else
376 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
377#endif
378}
379
380static bool memory_region_wrong_endianness(MemoryRegion *mr)
381{
382#ifdef TARGET_WORDS_BIGENDIAN
383 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
384#else
385 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
386#endif
387}
388
389static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
390{
391 if (memory_region_wrong_endianness(mr)) {
392 switch (size) {
393 case 1:
394 break;
395 case 2:
396 *data = bswap16(*data);
397 break;
398 case 4:
399 *data = bswap32(*data);
400 break;
401 case 8:
402 *data = bswap64(*data);
403 break;
404 default:
405 abort();
406 }
407 }
408}
409
410static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
411{
412 MemoryRegion *root;
413 hwaddr abs_addr = offset;
414
415 abs_addr += mr->addr;
416 for (root = mr; root->container; ) {
417 root = root->container;
418 abs_addr += root->addr;
419 }
420
421 return abs_addr;
422}
423
424static int get_cpu_index(void)
425{
426 if (current_cpu) {
427 return current_cpu->cpu_index;
428 }
429 return -1;
430}
431
432static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
433 hwaddr addr,
434 uint64_t *value,
435 unsigned size,
436 unsigned shift,
437 uint64_t mask,
438 MemTxAttrs attrs)
439{
440 uint64_t tmp;
441
442 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
443 if (mr->subpage) {
444 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
445 } else if (mr == &io_mem_notdirty) {
446 /* Accesses to code which has previously been translated into a TB show
447 * up in the MMIO path, as accesses to the io_mem_notdirty
448 * MemoryRegion. */
449 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
450 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
451 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
452 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
453 }
454 *value |= (tmp & mask) << shift;
455 return MEMTX_OK;
456}
457
458static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
459 hwaddr addr,
460 uint64_t *value,
461 unsigned size,
462 unsigned shift,
463 uint64_t mask,
464 MemTxAttrs attrs)
465{
466 uint64_t tmp;
467
468 tmp = mr->ops->read(mr->opaque, addr, size);
469 if (mr->subpage) {
470 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
471 } else if (mr == &io_mem_notdirty) {
472 /* Accesses to code which has previously been translated into a TB show
473 * up in the MMIO path, as accesses to the io_mem_notdirty
474 * MemoryRegion. */
475 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
476 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
477 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
478 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
479 }
480 *value |= (tmp & mask) << shift;
481 return MEMTX_OK;
482}
483
484static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
485 hwaddr addr,
486 uint64_t *value,
487 unsigned size,
488 unsigned shift,
489 uint64_t mask,
490 MemTxAttrs attrs)
491{
492 uint64_t tmp = 0;
493 MemTxResult r;
494
495 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
496 if (mr->subpage) {
497 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
498 } else if (mr == &io_mem_notdirty) {
499 /* Accesses to code which has previously been translated into a TB show
500 * up in the MMIO path, as accesses to the io_mem_notdirty
501 * MemoryRegion. */
502 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
503 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
504 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
505 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
506 }
507 *value |= (tmp & mask) << shift;
508 return r;
509}
510
511static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
512 hwaddr addr,
513 uint64_t *value,
514 unsigned size,
515 unsigned shift,
516 uint64_t mask,
517 MemTxAttrs attrs)
518{
519 uint64_t tmp;
520
521 tmp = (*value >> shift) & mask;
522 if (mr->subpage) {
523 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
524 } else if (mr == &io_mem_notdirty) {
525 /* Accesses to code which has previously been translated into a TB show
526 * up in the MMIO path, as accesses to the io_mem_notdirty
527 * MemoryRegion. */
528 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
529 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
530 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
531 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
532 }
533 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
534 return MEMTX_OK;
535}
536
537static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
538 hwaddr addr,
539 uint64_t *value,
540 unsigned size,
541 unsigned shift,
542 uint64_t mask,
543 MemTxAttrs attrs)
544{
545 uint64_t tmp;
546
547 tmp = (*value >> shift) & mask;
548 if (mr->subpage) {
549 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
550 } else if (mr == &io_mem_notdirty) {
551 /* Accesses to code which has previously been translated into a TB show
552 * up in the MMIO path, as accesses to the io_mem_notdirty
553 * MemoryRegion. */
554 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
555 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
556 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
557 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
558 }
559 mr->ops->write(mr->opaque, addr, tmp, size);
560 return MEMTX_OK;
561}
562
563static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
564 hwaddr addr,
565 uint64_t *value,
566 unsigned size,
567 unsigned shift,
568 uint64_t mask,
569 MemTxAttrs attrs)
570{
571 uint64_t tmp;
572
573 tmp = (*value >> shift) & mask;
574 if (mr->subpage) {
575 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
576 } else if (mr == &io_mem_notdirty) {
577 /* Accesses to code which has previously been translated into a TB show
578 * up in the MMIO path, as accesses to the io_mem_notdirty
579 * MemoryRegion. */
580 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
581 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
582 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
583 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
584 }
585 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
586}
587
588static MemTxResult access_with_adjusted_size(hwaddr addr,
589 uint64_t *value,
590 unsigned size,
591 unsigned access_size_min,
592 unsigned access_size_max,
593 MemTxResult (*access_fn)
594 (MemoryRegion *mr,
595 hwaddr addr,
596 uint64_t *value,
597 unsigned size,
598 unsigned shift,
599 uint64_t mask,
600 MemTxAttrs attrs),
601 MemoryRegion *mr,
602 MemTxAttrs attrs)
603{
604 uint64_t access_mask;
605 unsigned access_size;
606 unsigned i;
607 MemTxResult r = MEMTX_OK;
608
609 if (!access_size_min) {
610 access_size_min = 1;
611 }
612 if (!access_size_max) {
613 access_size_max = 4;
614 }
615
616 /* FIXME: support unaligned access? */
617 access_size = MAX(MIN(size, access_size_max), access_size_min);
618 access_mask = -1ULL >> (64 - access_size * 8);
619 if (memory_region_big_endian(mr)) {
620 for (i = 0; i < size; i += access_size) {
621 r |= access_fn(mr, addr + i, value, access_size,
622 (size - access_size - i) * 8, access_mask, attrs);
623 }
624 } else {
625 for (i = 0; i < size; i += access_size) {
626 r |= access_fn(mr, addr + i, value, access_size, i * 8,
627 access_mask, attrs);
628 }
629 }
630 return r;
631}
632
633static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
634{
635 AddressSpace *as;
636
637 while (mr->container) {
638 mr = mr->container;
639 }
640 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
641 if (mr == as->root) {
642 return as;
643 }
644 }
645 return NULL;
646}
647
648/* Render a memory region into the global view. Ranges in @view obscure
649 * ranges in @mr.
650 */
651static void render_memory_region(FlatView *view,
652 MemoryRegion *mr,
653 Int128 base,
654 AddrRange clip,
655 bool readonly)
656{
657 MemoryRegion *subregion;
658 unsigned i;
659 hwaddr offset_in_region;
660 Int128 remain;
661 Int128 now;
662 FlatRange fr;
663 AddrRange tmp;
664
665 if (!mr->enabled) {
666 return;
667 }
668
669 int128_addto(&base, int128_make64(mr->addr));
670 readonly |= mr->readonly;
671
672 tmp = addrrange_make(base, mr->size);
673
674 if (!addrrange_intersects(tmp, clip)) {
675 return;
676 }
677
678 clip = addrrange_intersection(tmp, clip);
679
680 if (mr->alias) {
681 int128_subfrom(&base, int128_make64(mr->alias->addr));
682 int128_subfrom(&base, int128_make64(mr->alias_offset));
683 render_memory_region(view, mr->alias, base, clip, readonly);
684 return;
685 }
686
687 /* Render subregions in priority order. */
688 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
689 render_memory_region(view, subregion, base, clip, readonly);
690 }
691
692 if (!mr->terminates) {
693 return;
694 }
695
696 offset_in_region = int128_get64(int128_sub(clip.start, base));
697 base = clip.start;
698 remain = clip.size;
699
700 fr.mr = mr;
701 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
702 fr.romd_mode = mr->romd_mode;
703 fr.readonly = readonly;
704
705 /* Render the region itself into any gaps left by the current view. */
706 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
707 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
708 continue;
709 }
710 if (int128_lt(base, view->ranges[i].addr.start)) {
711 now = int128_min(remain,
712 int128_sub(view->ranges[i].addr.start, base));
713 fr.offset_in_region = offset_in_region;
714 fr.addr = addrrange_make(base, now);
715 flatview_insert(view, i, &fr);
716 ++i;
717 int128_addto(&base, now);
718 offset_in_region += int128_get64(now);
719 int128_subfrom(&remain, now);
720 }
721 now = int128_sub(int128_min(int128_add(base, remain),
722 addrrange_end(view->ranges[i].addr)),
723 base);
724 int128_addto(&base, now);
725 offset_in_region += int128_get64(now);
726 int128_subfrom(&remain, now);
727 }
728 if (int128_nz(remain)) {
729 fr.offset_in_region = offset_in_region;
730 fr.addr = addrrange_make(base, remain);
731 flatview_insert(view, i, &fr);
732 }
733}
734
735static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
736{
737 while (mr->enabled) {
738 if (mr->alias) {
739 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
740 /* The alias is included in its entirety. Use it as
741 * the "real" root, so that we can share more FlatViews.
742 */
743 mr = mr->alias;
744 continue;
745 }
746 } else if (!mr->terminates) {
747 unsigned int found = 0;
748 MemoryRegion *child, *next = NULL;
749 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
750 if (child->enabled) {
751 if (++found > 1) {
752 next = NULL;
753 break;
754 }
755 if (!child->addr && int128_ge(mr->size, child->size)) {
756 /* A child is included in its entirety. If it's the only
757 * enabled one, use it in the hope of finding an alias down the
758 * way. This will also let us share FlatViews.
759 */
760 next = child;
761 }
762 }
763 }
764 if (next) {
765 mr = next;
766 continue;
767 }
768 }
769
770 break;
771 }
772
773 return mr;
774}
775
776/* Render a memory topology into a list of disjoint absolute ranges. */
777static FlatView *generate_memory_topology(MemoryRegion *mr)
778{
779 int i;
780 FlatView *view;
781
782 view = flatview_new(mr);
783
784 if (mr) {
785 render_memory_region(view, mr, int128_zero(),
786 addrrange_make(int128_zero(), int128_2_64()), false);
787 }
788 flatview_simplify(view);
789
790 view->dispatch = address_space_dispatch_new(view);
791 for (i = 0; i < view->nr; i++) {
792 MemoryRegionSection mrs =
793 section_from_flat_range(&view->ranges[i], view);
794 flatview_add_to_dispatch(view, &mrs);
795 }
796 address_space_dispatch_compact(view->dispatch);
797 g_hash_table_replace(flat_views, mr, view);
798
799 return view;
800}
801
802static void address_space_add_del_ioeventfds(AddressSpace *as,
803 MemoryRegionIoeventfd *fds_new,
804 unsigned fds_new_nb,
805 MemoryRegionIoeventfd *fds_old,
806 unsigned fds_old_nb)
807{
808 unsigned iold, inew;
809 MemoryRegionIoeventfd *fd;
810 MemoryRegionSection section;
811
812 /* Generate a symmetric difference of the old and new fd sets, adding
813 * and deleting as necessary.
814 */
815
816 iold = inew = 0;
817 while (iold < fds_old_nb || inew < fds_new_nb) {
818 if (iold < fds_old_nb
819 && (inew == fds_new_nb
820 || memory_region_ioeventfd_before(fds_old[iold],
821 fds_new[inew]))) {
822 fd = &fds_old[iold];
823 section = (MemoryRegionSection) {
824 .fv = address_space_to_flatview(as),
825 .offset_within_address_space = int128_get64(fd->addr.start),
826 .size = fd->addr.size,
827 };
828 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
829 fd->match_data, fd->data, fd->e);
830 ++iold;
831 } else if (inew < fds_new_nb
832 && (iold == fds_old_nb
833 || memory_region_ioeventfd_before(fds_new[inew],
834 fds_old[iold]))) {
835 fd = &fds_new[inew];
836 section = (MemoryRegionSection) {
837 .fv = address_space_to_flatview(as),
838 .offset_within_address_space = int128_get64(fd->addr.start),
839 .size = fd->addr.size,
840 };
841 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
842 fd->match_data, fd->data, fd->e);
843 ++inew;
844 } else {
845 ++iold;
846 ++inew;
847 }
848 }
849}
850
851static FlatView *address_space_get_flatview(AddressSpace *as)
852{
853 FlatView *view;
854
855 rcu_read_lock();
856 do {
857 view = address_space_to_flatview(as);
858 /* If somebody has replaced as->current_map concurrently,
859 * flatview_ref returns false.
860 */
861 } while (!flatview_ref(view));
862 rcu_read_unlock();
863 return view;
864}
865
866static void address_space_update_ioeventfds(AddressSpace *as)
867{
868 FlatView *view;
869 FlatRange *fr;
870 unsigned ioeventfd_nb = 0;
871 MemoryRegionIoeventfd *ioeventfds = NULL;
872 AddrRange tmp;
873 unsigned i;
874
875 view = address_space_get_flatview(as);
876 FOR_EACH_FLAT_RANGE(fr, view) {
877 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
878 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
879 int128_sub(fr->addr.start,
880 int128_make64(fr->offset_in_region)));
881 if (addrrange_intersects(fr->addr, tmp)) {
882 ++ioeventfd_nb;
883 ioeventfds = g_realloc(ioeventfds,
884 ioeventfd_nb * sizeof(*ioeventfds));
885 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
886 ioeventfds[ioeventfd_nb-1].addr = tmp;
887 }
888 }
889 }
890
891 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
892 as->ioeventfds, as->ioeventfd_nb);
893
894 g_free(as->ioeventfds);
895 as->ioeventfds = ioeventfds;
896 as->ioeventfd_nb = ioeventfd_nb;
897 flatview_unref(view);
898}
899
900static void address_space_update_topology_pass(AddressSpace *as,
901 const FlatView *old_view,
902 const FlatView *new_view,
903 bool adding)
904{
905 unsigned iold, inew;
906 FlatRange *frold, *frnew;
907
908 /* Generate a symmetric difference of the old and new memory maps.
909 * Kill ranges in the old map, and instantiate ranges in the new map.
910 */
911 iold = inew = 0;
912 while (iold < old_view->nr || inew < new_view->nr) {
913 if (iold < old_view->nr) {
914 frold = &old_view->ranges[iold];
915 } else {
916 frold = NULL;
917 }
918 if (inew < new_view->nr) {
919 frnew = &new_view->ranges[inew];
920 } else {
921 frnew = NULL;
922 }
923
924 if (frold
925 && (!frnew
926 || int128_lt(frold->addr.start, frnew->addr.start)
927 || (int128_eq(frold->addr.start, frnew->addr.start)
928 && !flatrange_equal(frold, frnew)))) {
929 /* In old but not in new, or in both but attributes changed. */
930
931 if (!adding) {
932 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
933 }
934
935 ++iold;
936 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
937 /* In both and unchanged (except logging may have changed) */
938
939 if (adding) {
940 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
941 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
942 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
943 frold->dirty_log_mask,
944 frnew->dirty_log_mask);
945 }
946 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
947 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
948 frold->dirty_log_mask,
949 frnew->dirty_log_mask);
950 }
951 }
952
953 ++iold;
954 ++inew;
955 } else {
956 /* In new */
957
958 if (adding) {
959 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
960 }
961
962 ++inew;
963 }
964 }
965}
966
967static void flatviews_init(void)
968{
969 if (flat_views) {
970 return;
971 }
972
973 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
974 (GDestroyNotify) flatview_unref);
975}
976
977static void flatviews_reset(void)
978{
979 AddressSpace *as;
980
981 if (flat_views) {
982 g_hash_table_unref(flat_views);
983 flat_views = NULL;
984 }
985 flatviews_init();
986
987 /* Render unique FVs */
988 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
989 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
990
991 if (g_hash_table_lookup(flat_views, physmr)) {
992 continue;
993 }
994
995 generate_memory_topology(physmr);
996 }
997}
998
999static void address_space_set_flatview(AddressSpace *as)
1000{
1001 FlatView *old_view = address_space_to_flatview(as);
1002 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1003 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1004
1005 assert(new_view);
1006
1007 if (old_view == new_view) {
1008 return;
1009 }
1010
1011 if (old_view) {
1012 flatview_ref(old_view);
1013 }
1014
1015 flatview_ref(new_view);
1016
1017 if (!QTAILQ_EMPTY(&as->listeners)) {
1018 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1019
1020 if (!old_view2) {
1021 old_view2 = &tmpview;
1022 }
1023 address_space_update_topology_pass(as, old_view2, new_view, false);
1024 address_space_update_topology_pass(as, old_view2, new_view, true);
1025 }
1026
1027 /* Writes are protected by the BQL. */
1028 atomic_rcu_set(&as->current_map, new_view);
1029 if (old_view) {
1030 flatview_unref(old_view);
1031 }
1032
1033 /* Note that all the old MemoryRegions are still alive up to this
1034 * point. This relieves most MemoryListeners from the need to
1035 * ref/unref the MemoryRegions they get---unless they use them
1036 * outside the iothread mutex, in which case precise reference
1037 * counting is necessary.
1038 */
1039 if (old_view) {
1040 flatview_unref(old_view);
1041 }
1042}
1043
1044static void address_space_update_topology(AddressSpace *as)
1045{
1046 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1047
1048 flatviews_init();
1049 if (!g_hash_table_lookup(flat_views, physmr)) {
1050 generate_memory_topology(physmr);
1051 }
1052 address_space_set_flatview(as);
1053}
1054
1055void memory_region_transaction_begin(void)
1056{
1057 qemu_flush_coalesced_mmio_buffer();
1058 ++memory_region_transaction_depth;
1059}
1060
1061void memory_region_transaction_commit(void)
1062{
1063 AddressSpace *as;
1064
1065 assert(memory_region_transaction_depth);
1066 assert(qemu_mutex_iothread_locked());
1067
1068 --memory_region_transaction_depth;
1069 if (!memory_region_transaction_depth) {
1070 if (memory_region_update_pending) {
1071 flatviews_reset();
1072
1073 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1074
1075 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1076 address_space_set_flatview(as);
1077 address_space_update_ioeventfds(as);
1078 }
1079 memory_region_update_pending = false;
1080 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1081 } else if (ioeventfd_update_pending) {
1082 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1083 address_space_update_ioeventfds(as);
1084 }
1085 ioeventfd_update_pending = false;
1086 }
1087 }
1088}
1089
1090static void memory_region_destructor_none(MemoryRegion *mr)
1091{
1092}
1093
1094static void memory_region_destructor_ram(MemoryRegion *mr)
1095{
1096 qemu_ram_free(mr->ram_block);
1097}
1098
1099static bool memory_region_need_escape(char c)
1100{
1101 return c == '/' || c == '[' || c == '\\' || c == ']';
1102}
1103
1104static char *memory_region_escape_name(const char *name)
1105{
1106 const char *p;
1107 char *escaped, *q;
1108 uint8_t c;
1109 size_t bytes = 0;
1110
1111 for (p = name; *p; p++) {
1112 bytes += memory_region_need_escape(*p) ? 4 : 1;
1113 }
1114 if (bytes == p - name) {
1115 return g_memdup(name, bytes + 1);
1116 }
1117
1118 escaped = g_malloc(bytes + 1);
1119 for (p = name, q = escaped; *p; p++) {
1120 c = *p;
1121 if (unlikely(memory_region_need_escape(c))) {
1122 *q++ = '\\';
1123 *q++ = 'x';
1124 *q++ = "0123456789abcdef"[c >> 4];
1125 c = "0123456789abcdef"[c & 15];
1126 }
1127 *q++ = c;
1128 }
1129 *q = 0;
1130 return escaped;
1131}
1132
1133static void memory_region_do_init(MemoryRegion *mr,
1134 Object *owner,
1135 const char *name,
1136 uint64_t size)
1137{
1138 mr->size = int128_make64(size);
1139 if (size == UINT64_MAX) {
1140 mr->size = int128_2_64();
1141 }
1142 mr->name = g_strdup(name);
1143 mr->owner = owner;
1144 mr->ram_block = NULL;
1145
1146 if (name) {
1147 char *escaped_name = memory_region_escape_name(name);
1148 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1149
1150 if (!owner) {
1151 owner = container_get(qdev_get_machine(), "/unattached");
1152 }
1153
1154 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1155 object_unref(OBJECT(mr));
1156 g_free(name_array);
1157 g_free(escaped_name);
1158 }
1159}
1160
1161void memory_region_init(MemoryRegion *mr,
1162 Object *owner,
1163 const char *name,
1164 uint64_t size)
1165{
1166 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1167 memory_region_do_init(mr, owner, name, size);
1168}
1169
1170static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1171 void *opaque, Error **errp)
1172{
1173 MemoryRegion *mr = MEMORY_REGION(obj);
1174 uint64_t value = mr->addr;
1175
1176 visit_type_uint64(v, name, &value, errp);
1177}
1178
1179static void memory_region_get_container(Object *obj, Visitor *v,
1180 const char *name, void *opaque,
1181 Error **errp)
1182{
1183 MemoryRegion *mr = MEMORY_REGION(obj);
1184 gchar *path = (gchar *)"";
1185
1186 if (mr->container) {
1187 path = object_get_canonical_path(OBJECT(mr->container));
1188 }
1189 visit_type_str(v, name, &path, errp);
1190 if (mr->container) {
1191 g_free(path);
1192 }
1193}
1194
1195static Object *memory_region_resolve_container(Object *obj, void *opaque,
1196 const char *part)
1197{
1198 MemoryRegion *mr = MEMORY_REGION(obj);
1199
1200 return OBJECT(mr->container);
1201}
1202
1203static void memory_region_get_priority(Object *obj, Visitor *v,
1204 const char *name, void *opaque,
1205 Error **errp)
1206{
1207 MemoryRegion *mr = MEMORY_REGION(obj);
1208 int32_t value = mr->priority;
1209
1210 visit_type_int32(v, name, &value, errp);
1211}
1212
1213static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1214 void *opaque, Error **errp)
1215{
1216 MemoryRegion *mr = MEMORY_REGION(obj);
1217 uint64_t value = memory_region_size(mr);
1218
1219 visit_type_uint64(v, name, &value, errp);
1220}
1221
1222static void memory_region_initfn(Object *obj)
1223{
1224 MemoryRegion *mr = MEMORY_REGION(obj);
1225 ObjectProperty *op;
1226
1227 mr->ops = &unassigned_mem_ops;
1228 mr->enabled = true;
1229 mr->romd_mode = true;
1230 mr->global_locking = true;
1231 mr->destructor = memory_region_destructor_none;
1232 QTAILQ_INIT(&mr->subregions);
1233 QTAILQ_INIT(&mr->coalesced);
1234
1235 op = object_property_add(OBJECT(mr), "container",
1236 "link<" TYPE_MEMORY_REGION ">",
1237 memory_region_get_container,
1238 NULL, /* memory_region_set_container */
1239 NULL, NULL, &error_abort);
1240 op->resolve = memory_region_resolve_container;
1241
1242 object_property_add(OBJECT(mr), "addr", "uint64",
1243 memory_region_get_addr,
1244 NULL, /* memory_region_set_addr */
1245 NULL, NULL, &error_abort);
1246 object_property_add(OBJECT(mr), "priority", "uint32",
1247 memory_region_get_priority,
1248 NULL, /* memory_region_set_priority */
1249 NULL, NULL, &error_abort);
1250 object_property_add(OBJECT(mr), "size", "uint64",
1251 memory_region_get_size,
1252 NULL, /* memory_region_set_size, */
1253 NULL, NULL, &error_abort);
1254}
1255
1256static void iommu_memory_region_initfn(Object *obj)
1257{
1258 MemoryRegion *mr = MEMORY_REGION(obj);
1259
1260 mr->is_iommu = true;
1261}
1262
1263static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1264 unsigned size)
1265{
1266#ifdef DEBUG_UNASSIGNED
1267 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1268#endif
1269 if (current_cpu != NULL) {
1270 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1271 }
1272 return 0;
1273}
1274
1275static void unassigned_mem_write(void *opaque, hwaddr addr,
1276 uint64_t val, unsigned size)
1277{
1278#ifdef DEBUG_UNASSIGNED
1279 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1280#endif
1281 if (current_cpu != NULL) {
1282 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1283 }
1284}
1285
1286static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1287 unsigned size, bool is_write)
1288{
1289 return false;
1290}
1291
1292const MemoryRegionOps unassigned_mem_ops = {
1293 .valid.accepts = unassigned_mem_accepts,
1294 .endianness = DEVICE_NATIVE_ENDIAN,
1295};
1296
1297static uint64_t memory_region_ram_device_read(void *opaque,
1298 hwaddr addr, unsigned size)
1299{
1300 MemoryRegion *mr = opaque;
1301 uint64_t data = (uint64_t)~0;
1302
1303 switch (size) {
1304 case 1:
1305 data = *(uint8_t *)(mr->ram_block->host + addr);
1306 break;
1307 case 2:
1308 data = *(uint16_t *)(mr->ram_block->host + addr);
1309 break;
1310 case 4:
1311 data = *(uint32_t *)(mr->ram_block->host + addr);
1312 break;
1313 case 8:
1314 data = *(uint64_t *)(mr->ram_block->host + addr);
1315 break;
1316 }
1317
1318 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1319
1320 return data;
1321}
1322
1323static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1324 uint64_t data, unsigned size)
1325{
1326 MemoryRegion *mr = opaque;
1327
1328 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1329
1330 switch (size) {
1331 case 1:
1332 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1333 break;
1334 case 2:
1335 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1336 break;
1337 case 4:
1338 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1339 break;
1340 case 8:
1341 *(uint64_t *)(mr->ram_block->host + addr) = data;
1342 break;
1343 }
1344}
1345
1346static const MemoryRegionOps ram_device_mem_ops = {
1347 .read = memory_region_ram_device_read,
1348 .write = memory_region_ram_device_write,
1349 .endianness = DEVICE_HOST_ENDIAN,
1350 .valid = {
1351 .min_access_size = 1,
1352 .max_access_size = 8,
1353 .unaligned = true,
1354 },
1355 .impl = {
1356 .min_access_size = 1,
1357 .max_access_size = 8,
1358 .unaligned = true,
1359 },
1360};
1361
1362bool memory_region_access_valid(MemoryRegion *mr,
1363 hwaddr addr,
1364 unsigned size,
1365 bool is_write)
1366{
1367 int access_size_min, access_size_max;
1368 int access_size, i;
1369
1370 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1371 return false;
1372 }
1373
1374 if (!mr->ops->valid.accepts) {
1375 return true;
1376 }
1377
1378 access_size_min = mr->ops->valid.min_access_size;
1379 if (!mr->ops->valid.min_access_size) {
1380 access_size_min = 1;
1381 }
1382
1383 access_size_max = mr->ops->valid.max_access_size;
1384 if (!mr->ops->valid.max_access_size) {
1385 access_size_max = 4;
1386 }
1387
1388 access_size = MAX(MIN(size, access_size_max), access_size_min);
1389 for (i = 0; i < size; i += access_size) {
1390 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1391 is_write)) {
1392 return false;
1393 }
1394 }
1395
1396 return true;
1397}
1398
1399static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1400 hwaddr addr,
1401 uint64_t *pval,
1402 unsigned size,
1403 MemTxAttrs attrs)
1404{
1405 *pval = 0;
1406
1407 if (mr->ops->read) {
1408 return access_with_adjusted_size(addr, pval, size,
1409 mr->ops->impl.min_access_size,
1410 mr->ops->impl.max_access_size,
1411 memory_region_read_accessor,
1412 mr, attrs);
1413 } else if (mr->ops->read_with_attrs) {
1414 return access_with_adjusted_size(addr, pval, size,
1415 mr->ops->impl.min_access_size,
1416 mr->ops->impl.max_access_size,
1417 memory_region_read_with_attrs_accessor,
1418 mr, attrs);
1419 } else {
1420 return access_with_adjusted_size(addr, pval, size, 1, 4,
1421 memory_region_oldmmio_read_accessor,
1422 mr, attrs);
1423 }
1424}
1425
1426MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1427 hwaddr addr,
1428 uint64_t *pval,
1429 unsigned size,
1430 MemTxAttrs attrs)
1431{
1432 MemTxResult r;
1433
1434 if (!memory_region_access_valid(mr, addr, size, false)) {
1435 *pval = unassigned_mem_read(mr, addr, size);
1436 return MEMTX_DECODE_ERROR;
1437 }
1438
1439 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1440 adjust_endianness(mr, pval, size);
1441 return r;
1442}
1443
1444/* Return true if an eventfd was signalled */
1445static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1446 hwaddr addr,
1447 uint64_t data,
1448 unsigned size,
1449 MemTxAttrs attrs)
1450{
1451 MemoryRegionIoeventfd ioeventfd = {
1452 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1453 .data = data,
1454 };
1455 unsigned i;
1456
1457 for (i = 0; i < mr->ioeventfd_nb; i++) {
1458 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1459 ioeventfd.e = mr->ioeventfds[i].e;
1460
1461 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1462 event_notifier_set(ioeventfd.e);
1463 return true;
1464 }
1465 }
1466
1467 return false;
1468}
1469
1470MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1471 hwaddr addr,
1472 uint64_t data,
1473 unsigned size,
1474 MemTxAttrs attrs)
1475{
1476 if (!memory_region_access_valid(mr, addr, size, true)) {
1477 unassigned_mem_write(mr, addr, data, size);
1478 return MEMTX_DECODE_ERROR;
1479 }
1480
1481 adjust_endianness(mr, &data, size);
1482
1483 if ((!kvm_eventfds_enabled()) &&
1484 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1485 return MEMTX_OK;
1486 }
1487
1488 if (mr->ops->write) {
1489 return access_with_adjusted_size(addr, &data, size,
1490 mr->ops->impl.min_access_size,
1491 mr->ops->impl.max_access_size,
1492 memory_region_write_accessor, mr,
1493 attrs);
1494 } else if (mr->ops->write_with_attrs) {
1495 return
1496 access_with_adjusted_size(addr, &data, size,
1497 mr->ops->impl.min_access_size,
1498 mr->ops->impl.max_access_size,
1499 memory_region_write_with_attrs_accessor,
1500 mr, attrs);
1501 } else {
1502 return access_with_adjusted_size(addr, &data, size, 1, 4,
1503 memory_region_oldmmio_write_accessor,
1504 mr, attrs);
1505 }
1506}
1507
1508void memory_region_init_io(MemoryRegion *mr,
1509 Object *owner,
1510 const MemoryRegionOps *ops,
1511 void *opaque,
1512 const char *name,
1513 uint64_t size)
1514{
1515 memory_region_init(mr, owner, name, size);
1516 mr->ops = ops ? ops : &unassigned_mem_ops;
1517 mr->opaque = opaque;
1518 mr->terminates = true;
1519}
1520
1521void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1522 Object *owner,
1523 const char *name,
1524 uint64_t size,
1525 Error **errp)
1526{
1527 memory_region_init(mr, owner, name, size);
1528 mr->ram = true;
1529 mr->terminates = true;
1530 mr->destructor = memory_region_destructor_ram;
1531 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1532 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1533}
1534
1535void memory_region_init_resizeable_ram(MemoryRegion *mr,
1536 Object *owner,
1537 const char *name,
1538 uint64_t size,
1539 uint64_t max_size,
1540 void (*resized)(const char*,
1541 uint64_t length,
1542 void *host),
1543 Error **errp)
1544{
1545 memory_region_init(mr, owner, name, size);
1546 mr->ram = true;
1547 mr->terminates = true;
1548 mr->destructor = memory_region_destructor_ram;
1549 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1550 mr, errp);
1551 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1552}
1553
1554#ifdef __linux__
1555void memory_region_init_ram_from_file(MemoryRegion *mr,
1556 struct Object *owner,
1557 const char *name,
1558 uint64_t size,
1559 bool share,
1560 const char *path,
1561 Error **errp)
1562{
1563 memory_region_init(mr, owner, name, size);
1564 mr->ram = true;
1565 mr->terminates = true;
1566 mr->destructor = memory_region_destructor_ram;
1567 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1568 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1569}
1570
1571void memory_region_init_ram_from_fd(MemoryRegion *mr,
1572 struct Object *owner,
1573 const char *name,
1574 uint64_t size,
1575 bool share,
1576 int fd,
1577 Error **errp)
1578{
1579 memory_region_init(mr, owner, name, size);
1580 mr->ram = true;
1581 mr->terminates = true;
1582 mr->destructor = memory_region_destructor_ram;
1583 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1584 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1585}
1586#endif
1587
1588void memory_region_init_ram_ptr(MemoryRegion *mr,
1589 Object *owner,
1590 const char *name,
1591 uint64_t size,
1592 void *ptr)
1593{
1594 memory_region_init(mr, owner, name, size);
1595 mr->ram = true;
1596 mr->terminates = true;
1597 mr->destructor = memory_region_destructor_ram;
1598 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1599
1600 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1601 assert(ptr != NULL);
1602 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1603}
1604
1605void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1606 Object *owner,
1607 const char *name,
1608 uint64_t size,
1609 void *ptr)
1610{
1611 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1612 mr->ram_device = true;
1613 mr->ops = &ram_device_mem_ops;
1614 mr->opaque = mr;
1615}
1616
1617void memory_region_init_alias(MemoryRegion *mr,
1618 Object *owner,
1619 const char *name,
1620 MemoryRegion *orig,
1621 hwaddr offset,
1622 uint64_t size)
1623{
1624 memory_region_init(mr, owner, name, size);
1625 mr->alias = orig;
1626 mr->alias_offset = offset;
1627}
1628
1629void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1630 struct Object *owner,
1631 const char *name,
1632 uint64_t size,
1633 Error **errp)
1634{
1635 memory_region_init(mr, owner, name, size);
1636 mr->ram = true;
1637 mr->readonly = true;
1638 mr->terminates = true;
1639 mr->destructor = memory_region_destructor_ram;
1640 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1641 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1642}
1643
1644void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1645 Object *owner,
1646 const MemoryRegionOps *ops,
1647 void *opaque,
1648 const char *name,
1649 uint64_t size,
1650 Error **errp)
1651{
1652 assert(ops);
1653 memory_region_init(mr, owner, name, size);
1654 mr->ops = ops;
1655 mr->opaque = opaque;
1656 mr->terminates = true;
1657 mr->rom_device = true;
1658 mr->destructor = memory_region_destructor_ram;
1659 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1660}
1661
1662void memory_region_init_iommu(void *_iommu_mr,
1663 size_t instance_size,
1664 const char *mrtypename,
1665 Object *owner,
1666 const char *name,
1667 uint64_t size)
1668{
1669 struct IOMMUMemoryRegion *iommu_mr;
1670 struct MemoryRegion *mr;
1671
1672 object_initialize(_iommu_mr, instance_size, mrtypename);
1673 mr = MEMORY_REGION(_iommu_mr);
1674 memory_region_do_init(mr, owner, name, size);
1675 iommu_mr = IOMMU_MEMORY_REGION(mr);
1676 mr->terminates = true; /* then re-forwards */
1677 QLIST_INIT(&iommu_mr->iommu_notify);
1678 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1679}
1680
1681static void memory_region_finalize(Object *obj)
1682{
1683 MemoryRegion *mr = MEMORY_REGION(obj);
1684
1685 assert(!mr->container);
1686
1687 /* We know the region is not visible in any address space (it
1688 * does not have a container and cannot be a root either because
1689 * it has no references, so we can blindly clear mr->enabled.
1690 * memory_region_set_enabled instead could trigger a transaction
1691 * and cause an infinite loop.
1692 */
1693 mr->enabled = false;
1694 memory_region_transaction_begin();
1695 while (!QTAILQ_EMPTY(&mr->subregions)) {
1696 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1697 memory_region_del_subregion(mr, subregion);
1698 }
1699 memory_region_transaction_commit();
1700
1701 mr->destructor(mr);
1702 memory_region_clear_coalescing(mr);
1703 g_free((char *)mr->name);
1704 g_free(mr->ioeventfds);
1705}
1706
1707Object *memory_region_owner(MemoryRegion *mr)
1708{
1709 Object *obj = OBJECT(mr);
1710 return obj->parent;
1711}
1712
1713void memory_region_ref(MemoryRegion *mr)
1714{
1715 /* MMIO callbacks most likely will access data that belongs
1716 * to the owner, hence the need to ref/unref the owner whenever
1717 * the memory region is in use.
1718 *
1719 * The memory region is a child of its owner. As long as the
1720 * owner doesn't call unparent itself on the memory region,
1721 * ref-ing the owner will also keep the memory region alive.
1722 * Memory regions without an owner are supposed to never go away;
1723 * we do not ref/unref them because it slows down DMA sensibly.
1724 */
1725 if (mr && mr->owner) {
1726 object_ref(mr->owner);
1727 }
1728}
1729
1730void memory_region_unref(MemoryRegion *mr)
1731{
1732 if (mr && mr->owner) {
1733 object_unref(mr->owner);
1734 }
1735}
1736
1737uint64_t memory_region_size(MemoryRegion *mr)
1738{
1739 if (int128_eq(mr->size, int128_2_64())) {
1740 return UINT64_MAX;
1741 }
1742 return int128_get64(mr->size);
1743}
1744
1745const char *memory_region_name(const MemoryRegion *mr)
1746{
1747 if (!mr->name) {
1748 ((MemoryRegion *)mr)->name =
1749 object_get_canonical_path_component(OBJECT(mr));
1750 }
1751 return mr->name;
1752}
1753
1754bool memory_region_is_ram_device(MemoryRegion *mr)
1755{
1756 return mr->ram_device;
1757}
1758
1759uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1760{
1761 uint8_t mask = mr->dirty_log_mask;
1762 if (global_dirty_log && mr->ram_block) {
1763 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1764 }
1765 return mask;
1766}
1767
1768bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1769{
1770 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1771}
1772
1773static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1774{
1775 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1776 IOMMUNotifier *iommu_notifier;
1777 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1778
1779 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1780 flags |= iommu_notifier->notifier_flags;
1781 }
1782
1783 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1784 imrc->notify_flag_changed(iommu_mr,
1785 iommu_mr->iommu_notify_flags,
1786 flags);
1787 }
1788
1789 iommu_mr->iommu_notify_flags = flags;
1790}
1791
1792void memory_region_register_iommu_notifier(MemoryRegion *mr,
1793 IOMMUNotifier *n)
1794{
1795 IOMMUMemoryRegion *iommu_mr;
1796
1797 if (mr->alias) {
1798 memory_region_register_iommu_notifier(mr->alias, n);
1799 return;
1800 }
1801
1802 /* We need to register for at least one bitfield */
1803 iommu_mr = IOMMU_MEMORY_REGION(mr);
1804 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1805 assert(n->start <= n->end);
1806 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1807 memory_region_update_iommu_notify_flags(iommu_mr);
1808}
1809
1810uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1811{
1812 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1813
1814 if (imrc->get_min_page_size) {
1815 return imrc->get_min_page_size(iommu_mr);
1816 }
1817 return TARGET_PAGE_SIZE;
1818}
1819
1820void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1821{
1822 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1823 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1824 hwaddr addr, granularity;
1825 IOMMUTLBEntry iotlb;
1826
1827 /* If the IOMMU has its own replay callback, override */
1828 if (imrc->replay) {
1829 imrc->replay(iommu_mr, n);
1830 return;
1831 }
1832
1833 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1834
1835 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1836 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1837 if (iotlb.perm != IOMMU_NONE) {
1838 n->notify(n, &iotlb);
1839 }
1840
1841 /* if (2^64 - MR size) < granularity, it's possible to get an
1842 * infinite loop here. This should catch such a wraparound */
1843 if ((addr + granularity) < addr) {
1844 break;
1845 }
1846 }
1847}
1848
1849void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1850{
1851 IOMMUNotifier *notifier;
1852
1853 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1854 memory_region_iommu_replay(iommu_mr, notifier);
1855 }
1856}
1857
1858void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1859 IOMMUNotifier *n)
1860{
1861 IOMMUMemoryRegion *iommu_mr;
1862
1863 if (mr->alias) {
1864 memory_region_unregister_iommu_notifier(mr->alias, n);
1865 return;
1866 }
1867 QLIST_REMOVE(n, node);
1868 iommu_mr = IOMMU_MEMORY_REGION(mr);
1869 memory_region_update_iommu_notify_flags(iommu_mr);
1870}
1871
1872void memory_region_notify_one(IOMMUNotifier *notifier,
1873 IOMMUTLBEntry *entry)
1874{
1875 IOMMUNotifierFlag request_flags;
1876
1877 /*
1878 * Skip the notification if the notification does not overlap
1879 * with registered range.
1880 */
1881 if (notifier->start > entry->iova + entry->addr_mask + 1 ||
1882 notifier->end < entry->iova) {
1883 return;
1884 }
1885
1886 if (entry->perm & IOMMU_RW) {
1887 request_flags = IOMMU_NOTIFIER_MAP;
1888 } else {
1889 request_flags = IOMMU_NOTIFIER_UNMAP;
1890 }
1891
1892 if (notifier->notifier_flags & request_flags) {
1893 notifier->notify(notifier, entry);
1894 }
1895}
1896
1897void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1898 IOMMUTLBEntry entry)
1899{
1900 IOMMUNotifier *iommu_notifier;
1901
1902 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1903
1904 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1905 memory_region_notify_one(iommu_notifier, &entry);
1906 }
1907}
1908
1909void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1910{
1911 uint8_t mask = 1 << client;
1912 uint8_t old_logging;
1913
1914 assert(client == DIRTY_MEMORY_VGA);
1915 old_logging = mr->vga_logging_count;
1916 mr->vga_logging_count += log ? 1 : -1;
1917 if (!!old_logging == !!mr->vga_logging_count) {
1918 return;
1919 }
1920
1921 memory_region_transaction_begin();
1922 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1923 memory_region_update_pending |= mr->enabled;
1924 memory_region_transaction_commit();
1925}
1926
1927bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1928 hwaddr size, unsigned client)
1929{
1930 assert(mr->ram_block);
1931 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1932 size, client);
1933}
1934
1935void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1936 hwaddr size)
1937{
1938 assert(mr->ram_block);
1939 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1940 size,
1941 memory_region_get_dirty_log_mask(mr));
1942}
1943
1944bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1945 hwaddr size, unsigned client)
1946{
1947 assert(mr->ram_block);
1948 return cpu_physical_memory_test_and_clear_dirty(
1949 memory_region_get_ram_addr(mr) + addr, size, client);
1950}
1951
1952DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1953 hwaddr addr,
1954 hwaddr size,
1955 unsigned client)
1956{
1957 assert(mr->ram_block);
1958 return cpu_physical_memory_snapshot_and_clear_dirty(
1959 memory_region_get_ram_addr(mr) + addr, size, client);
1960}
1961
1962bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1963 hwaddr addr, hwaddr size)
1964{
1965 assert(mr->ram_block);
1966 return cpu_physical_memory_snapshot_get_dirty(snap,
1967 memory_region_get_ram_addr(mr) + addr, size);
1968}
1969
1970void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1971{
1972 MemoryListener *listener;
1973 AddressSpace *as;
1974 FlatView *view;
1975 FlatRange *fr;
1976
1977 /* If the same address space has multiple log_sync listeners, we
1978 * visit that address space's FlatView multiple times. But because
1979 * log_sync listeners are rare, it's still cheaper than walking each
1980 * address space once.
1981 */
1982 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1983 if (!listener->log_sync) {
1984 continue;
1985 }
1986 as = listener->address_space;
1987 view = address_space_get_flatview(as);
1988 FOR_EACH_FLAT_RANGE(fr, view) {
1989 if (fr->mr == mr) {
1990 MemoryRegionSection mrs = section_from_flat_range(fr, view);
1991 listener->log_sync(listener, &mrs);
1992 }
1993 }
1994 flatview_unref(view);
1995 }
1996}
1997
1998void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1999{
2000 if (mr->readonly != readonly) {
2001 memory_region_transaction_begin();
2002 mr->readonly = readonly;
2003 memory_region_update_pending |= mr->enabled;
2004 memory_region_transaction_commit();
2005 }
2006}
2007
2008void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2009{
2010 if (mr->romd_mode != romd_mode) {
2011 memory_region_transaction_begin();
2012 mr->romd_mode = romd_mode;
2013 memory_region_update_pending |= mr->enabled;
2014 memory_region_transaction_commit();
2015 }
2016}
2017
2018void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2019 hwaddr size, unsigned client)
2020{
2021 assert(mr->ram_block);
2022 cpu_physical_memory_test_and_clear_dirty(
2023 memory_region_get_ram_addr(mr) + addr, size, client);
2024}
2025
2026int memory_region_get_fd(MemoryRegion *mr)
2027{
2028 int fd;
2029
2030 rcu_read_lock();
2031 while (mr->alias) {
2032 mr = mr->alias;
2033 }
2034 fd = mr->ram_block->fd;
2035 rcu_read_unlock();
2036
2037 return fd;
2038}
2039
2040void *memory_region_get_ram_ptr(MemoryRegion *mr)
2041{
2042 void *ptr;
2043 uint64_t offset = 0;
2044
2045 rcu_read_lock();
2046 while (mr->alias) {
2047 offset += mr->alias_offset;
2048 mr = mr->alias;
2049 }
2050 assert(mr->ram_block);
2051 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2052 rcu_read_unlock();
2053
2054 return ptr;
2055}
2056
2057MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2058{
2059 RAMBlock *block;
2060
2061 block = qemu_ram_block_from_host(ptr, false, offset);
2062 if (!block) {
2063 return NULL;
2064 }
2065
2066 return block->mr;
2067}
2068
2069ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2070{
2071 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2072}
2073
2074void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2075{
2076 assert(mr->ram_block);
2077
2078 qemu_ram_resize(mr->ram_block, newsize, errp);
2079}
2080
2081static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2082{
2083 FlatView *view;
2084 FlatRange *fr;
2085 CoalescedMemoryRange *cmr;
2086 AddrRange tmp;
2087 MemoryRegionSection section;
2088
2089 view = address_space_get_flatview(as);
2090 FOR_EACH_FLAT_RANGE(fr, view) {
2091 if (fr->mr == mr) {
2092 section = (MemoryRegionSection) {
2093 .fv = view,
2094 .offset_within_address_space = int128_get64(fr->addr.start),
2095 .size = fr->addr.size,
2096 };
2097
2098 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2099 int128_get64(fr->addr.start),
2100 int128_get64(fr->addr.size));
2101 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2102 tmp = addrrange_shift(cmr->addr,
2103 int128_sub(fr->addr.start,
2104 int128_make64(fr->offset_in_region)));
2105 if (!addrrange_intersects(tmp, fr->addr)) {
2106 continue;
2107 }
2108 tmp = addrrange_intersection(tmp, fr->addr);
2109 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2110 int128_get64(tmp.start),
2111 int128_get64(tmp.size));
2112 }
2113 }
2114 }
2115 flatview_unref(view);
2116}
2117
2118static void memory_region_update_coalesced_range(MemoryRegion *mr)
2119{
2120 AddressSpace *as;
2121
2122 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2123 memory_region_update_coalesced_range_as(mr, as);
2124 }
2125}
2126
2127void memory_region_set_coalescing(MemoryRegion *mr)
2128{
2129 memory_region_clear_coalescing(mr);
2130 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2131}
2132
2133void memory_region_add_coalescing(MemoryRegion *mr,
2134 hwaddr offset,
2135 uint64_t size)
2136{
2137 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2138
2139 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2140 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2141 memory_region_update_coalesced_range(mr);
2142 memory_region_set_flush_coalesced(mr);
2143}
2144
2145void memory_region_clear_coalescing(MemoryRegion *mr)
2146{
2147 CoalescedMemoryRange *cmr;
2148 bool updated = false;
2149
2150 qemu_flush_coalesced_mmio_buffer();
2151 mr->flush_coalesced_mmio = false;
2152
2153 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2154 cmr = QTAILQ_FIRST(&mr->coalesced);
2155 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2156 g_free(cmr);
2157 updated = true;
2158 }
2159
2160 if (updated) {
2161 memory_region_update_coalesced_range(mr);
2162 }
2163}
2164
2165void memory_region_set_flush_coalesced(MemoryRegion *mr)
2166{
2167 mr->flush_coalesced_mmio = true;
2168}
2169
2170void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2171{
2172 qemu_flush_coalesced_mmio_buffer();
2173 if (QTAILQ_EMPTY(&mr->coalesced)) {
2174 mr->flush_coalesced_mmio = false;
2175 }
2176}
2177
2178void memory_region_set_global_locking(MemoryRegion *mr)
2179{
2180 mr->global_locking = true;
2181}
2182
2183void memory_region_clear_global_locking(MemoryRegion *mr)
2184{
2185 mr->global_locking = false;
2186}
2187
2188static bool userspace_eventfd_warning;
2189
2190void memory_region_add_eventfd(MemoryRegion *mr,
2191 hwaddr addr,
2192 unsigned size,
2193 bool match_data,
2194 uint64_t data,
2195 EventNotifier *e)
2196{
2197 MemoryRegionIoeventfd mrfd = {
2198 .addr.start = int128_make64(addr),
2199 .addr.size = int128_make64(size),
2200 .match_data = match_data,
2201 .data = data,
2202 .e = e,
2203 };
2204 unsigned i;
2205
2206 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2207 userspace_eventfd_warning))) {
2208 userspace_eventfd_warning = true;
2209 error_report("Using eventfd without MMIO binding in KVM. "
2210 "Suboptimal performance expected");
2211 }
2212
2213 if (size) {
2214 adjust_endianness(mr, &mrfd.data, size);
2215 }
2216 memory_region_transaction_begin();
2217 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2218 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2219 break;
2220 }
2221 }
2222 ++mr->ioeventfd_nb;
2223 mr->ioeventfds = g_realloc(mr->ioeventfds,
2224 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2225 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2226 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2227 mr->ioeventfds[i] = mrfd;
2228 ioeventfd_update_pending |= mr->enabled;
2229 memory_region_transaction_commit();
2230}
2231
2232void memory_region_del_eventfd(MemoryRegion *mr,
2233 hwaddr addr,
2234 unsigned size,
2235 bool match_data,
2236 uint64_t data,
2237 EventNotifier *e)
2238{
2239 MemoryRegionIoeventfd mrfd = {
2240 .addr.start = int128_make64(addr),
2241 .addr.size = int128_make64(size),
2242 .match_data = match_data,
2243 .data = data,
2244 .e = e,
2245 };
2246 unsigned i;
2247
2248 if (size) {
2249 adjust_endianness(mr, &mrfd.data, size);
2250 }
2251 memory_region_transaction_begin();
2252 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2253 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2254 break;
2255 }
2256 }
2257 assert(i != mr->ioeventfd_nb);
2258 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2259 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2260 --mr->ioeventfd_nb;
2261 mr->ioeventfds = g_realloc(mr->ioeventfds,
2262 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2263 ioeventfd_update_pending |= mr->enabled;
2264 memory_region_transaction_commit();
2265}
2266
2267static void memory_region_update_container_subregions(MemoryRegion *subregion)
2268{
2269 MemoryRegion *mr = subregion->container;
2270 MemoryRegion *other;
2271
2272 memory_region_transaction_begin();
2273
2274 memory_region_ref(subregion);
2275 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2276 if (subregion->priority >= other->priority) {
2277 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2278 goto done;
2279 }
2280 }
2281 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2282done:
2283 memory_region_update_pending |= mr->enabled && subregion->enabled;
2284 memory_region_transaction_commit();
2285}
2286
2287static void memory_region_add_subregion_common(MemoryRegion *mr,
2288 hwaddr offset,
2289 MemoryRegion *subregion)
2290{
2291 assert(!subregion->container);
2292 subregion->container = mr;
2293 subregion->addr = offset;
2294 memory_region_update_container_subregions(subregion);
2295}
2296
2297void memory_region_add_subregion(MemoryRegion *mr,
2298 hwaddr offset,
2299 MemoryRegion *subregion)
2300{
2301 subregion->priority = 0;
2302 memory_region_add_subregion_common(mr, offset, subregion);
2303}
2304
2305void memory_region_add_subregion_overlap(MemoryRegion *mr,
2306 hwaddr offset,
2307 MemoryRegion *subregion,
2308 int priority)
2309{
2310 subregion->priority = priority;
2311 memory_region_add_subregion_common(mr, offset, subregion);
2312}
2313
2314void memory_region_del_subregion(MemoryRegion *mr,
2315 MemoryRegion *subregion)
2316{
2317 memory_region_transaction_begin();
2318 assert(subregion->container == mr);
2319 subregion->container = NULL;
2320 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2321 memory_region_unref(subregion);
2322 memory_region_update_pending |= mr->enabled && subregion->enabled;
2323 memory_region_transaction_commit();
2324}
2325
2326void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2327{
2328 if (enabled == mr->enabled) {
2329 return;
2330 }
2331 memory_region_transaction_begin();
2332 mr->enabled = enabled;
2333 memory_region_update_pending = true;
2334 memory_region_transaction_commit();
2335}
2336
2337void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2338{
2339 Int128 s = int128_make64(size);
2340
2341 if (size == UINT64_MAX) {
2342 s = int128_2_64();
2343 }
2344 if (int128_eq(s, mr->size)) {
2345 return;
2346 }
2347 memory_region_transaction_begin();
2348 mr->size = s;
2349 memory_region_update_pending = true;
2350 memory_region_transaction_commit();
2351}
2352
2353static void memory_region_readd_subregion(MemoryRegion *mr)
2354{
2355 MemoryRegion *container = mr->container;
2356
2357 if (container) {
2358 memory_region_transaction_begin();
2359 memory_region_ref(mr);
2360 memory_region_del_subregion(container, mr);
2361 mr->container = container;
2362 memory_region_update_container_subregions(mr);
2363 memory_region_unref(mr);
2364 memory_region_transaction_commit();
2365 }
2366}
2367
2368void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2369{
2370 if (addr != mr->addr) {
2371 mr->addr = addr;
2372 memory_region_readd_subregion(mr);
2373 }
2374}
2375
2376void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2377{
2378 assert(mr->alias);
2379
2380 if (offset == mr->alias_offset) {
2381 return;
2382 }
2383
2384 memory_region_transaction_begin();
2385 mr->alias_offset = offset;
2386 memory_region_update_pending |= mr->enabled;
2387 memory_region_transaction_commit();
2388}
2389
2390uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2391{
2392 return mr->align;
2393}
2394
2395static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2396{
2397 const AddrRange *addr = addr_;
2398 const FlatRange *fr = fr_;
2399
2400 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2401 return -1;
2402 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2403 return 1;
2404 }
2405 return 0;
2406}
2407
2408static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2409{
2410 return bsearch(&addr, view->ranges, view->nr,
2411 sizeof(FlatRange), cmp_flatrange_addr);
2412}
2413
2414bool memory_region_is_mapped(MemoryRegion *mr)
2415{
2416 return mr->container ? true : false;
2417}
2418
2419/* Same as memory_region_find, but it does not add a reference to the
2420 * returned region. It must be called from an RCU critical section.
2421 */
2422static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2423 hwaddr addr, uint64_t size)
2424{
2425 MemoryRegionSection ret = { .mr = NULL };
2426 MemoryRegion *root;
2427 AddressSpace *as;
2428 AddrRange range;
2429 FlatView *view;
2430 FlatRange *fr;
2431
2432 addr += mr->addr;
2433 for (root = mr; root->container; ) {
2434 root = root->container;
2435 addr += root->addr;
2436 }
2437
2438 as = memory_region_to_address_space(root);
2439 if (!as) {
2440 return ret;
2441 }
2442 range = addrrange_make(int128_make64(addr), int128_make64(size));
2443
2444 view = address_space_to_flatview(as);
2445 fr = flatview_lookup(view, range);
2446 if (!fr) {
2447 return ret;
2448 }
2449
2450 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2451 --fr;
2452 }
2453
2454 ret.mr = fr->mr;
2455 ret.fv = view;
2456 range = addrrange_intersection(range, fr->addr);
2457 ret.offset_within_region = fr->offset_in_region;
2458 ret.offset_within_region += int128_get64(int128_sub(range.start,
2459 fr->addr.start));
2460 ret.size = range.size;
2461 ret.offset_within_address_space = int128_get64(range.start);
2462 ret.readonly = fr->readonly;
2463 return ret;
2464}
2465
2466MemoryRegionSection memory_region_find(MemoryRegion *mr,
2467 hwaddr addr, uint64_t size)
2468{
2469 MemoryRegionSection ret;
2470 rcu_read_lock();
2471 ret = memory_region_find_rcu(mr, addr, size);
2472 if (ret.mr) {
2473 memory_region_ref(ret.mr);
2474 }
2475 rcu_read_unlock();
2476 return ret;
2477}
2478
2479bool memory_region_present(MemoryRegion *container, hwaddr addr)
2480{
2481 MemoryRegion *mr;
2482
2483 rcu_read_lock();
2484 mr = memory_region_find_rcu(container, addr, 1).mr;
2485 rcu_read_unlock();
2486 return mr && mr != container;
2487}
2488
2489void memory_global_dirty_log_sync(void)
2490{
2491 MemoryListener *listener;
2492 AddressSpace *as;
2493 FlatView *view;
2494 FlatRange *fr;
2495
2496 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2497 if (!listener->log_sync) {
2498 continue;
2499 }
2500 as = listener->address_space;
2501 view = address_space_get_flatview(as);
2502 FOR_EACH_FLAT_RANGE(fr, view) {
2503 if (fr->dirty_log_mask) {
2504 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2505
2506 listener->log_sync(listener, &mrs);
2507 }
2508 }
2509 flatview_unref(view);
2510 }
2511}
2512
2513static VMChangeStateEntry *vmstate_change;
2514
2515void memory_global_dirty_log_start(void)
2516{
2517 if (vmstate_change) {
2518 qemu_del_vm_change_state_handler(vmstate_change);
2519 vmstate_change = NULL;
2520 }
2521
2522 global_dirty_log = true;
2523
2524 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2525
2526 /* Refresh DIRTY_LOG_MIGRATION bit. */
2527 memory_region_transaction_begin();
2528 memory_region_update_pending = true;
2529 memory_region_transaction_commit();
2530}
2531
2532static void memory_global_dirty_log_do_stop(void)
2533{
2534 global_dirty_log = false;
2535
2536 /* Refresh DIRTY_LOG_MIGRATION bit. */
2537 memory_region_transaction_begin();
2538 memory_region_update_pending = true;
2539 memory_region_transaction_commit();
2540
2541 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2542}
2543
2544static void memory_vm_change_state_handler(void *opaque, int running,
2545 RunState state)
2546{
2547 if (running) {
2548 memory_global_dirty_log_do_stop();
2549
2550 if (vmstate_change) {
2551 qemu_del_vm_change_state_handler(vmstate_change);
2552 vmstate_change = NULL;
2553 }
2554 }
2555}
2556
2557void memory_global_dirty_log_stop(void)
2558{
2559 if (!runstate_is_running()) {
2560 if (vmstate_change) {
2561 return;
2562 }
2563 vmstate_change = qemu_add_vm_change_state_handler(
2564 memory_vm_change_state_handler, NULL);
2565 return;
2566 }
2567
2568 memory_global_dirty_log_do_stop();
2569}
2570
2571static void listener_add_address_space(MemoryListener *listener,
2572 AddressSpace *as)
2573{
2574 FlatView *view;
2575 FlatRange *fr;
2576
2577 if (listener->begin) {
2578 listener->begin(listener);
2579 }
2580 if (global_dirty_log) {
2581 if (listener->log_global_start) {
2582 listener->log_global_start(listener);
2583 }
2584 }
2585
2586 view = address_space_get_flatview(as);
2587 FOR_EACH_FLAT_RANGE(fr, view) {
2588 MemoryRegionSection section = {
2589 .mr = fr->mr,
2590 .fv = view,
2591 .offset_within_region = fr->offset_in_region,
2592 .size = fr->addr.size,
2593 .offset_within_address_space = int128_get64(fr->addr.start),
2594 .readonly = fr->readonly,
2595 };
2596 if (fr->dirty_log_mask && listener->log_start) {
2597 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2598 }
2599 if (listener->region_add) {
2600 listener->region_add(listener, &section);
2601 }
2602 }
2603 if (listener->commit) {
2604 listener->commit(listener);
2605 }
2606 flatview_unref(view);
2607}
2608
2609void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2610{
2611 MemoryListener *other = NULL;
2612
2613 listener->address_space = as;
2614 if (QTAILQ_EMPTY(&memory_listeners)
2615 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2616 memory_listeners)->priority) {
2617 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2618 } else {
2619 QTAILQ_FOREACH(other, &memory_listeners, link) {
2620 if (listener->priority < other->priority) {
2621 break;
2622 }
2623 }
2624 QTAILQ_INSERT_BEFORE(other, listener, link);
2625 }
2626
2627 if (QTAILQ_EMPTY(&as->listeners)
2628 || listener->priority >= QTAILQ_LAST(&as->listeners,
2629 memory_listeners)->priority) {
2630 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2631 } else {
2632 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2633 if (listener->priority < other->priority) {
2634 break;
2635 }
2636 }
2637 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2638 }
2639
2640 listener_add_address_space(listener, as);
2641}
2642
2643void memory_listener_unregister(MemoryListener *listener)
2644{
2645 if (!listener->address_space) {
2646 return;
2647 }
2648
2649 QTAILQ_REMOVE(&memory_listeners, listener, link);
2650 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2651 listener->address_space = NULL;
2652}
2653
2654bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2655{
2656 void *host;
2657 unsigned size = 0;
2658 unsigned offset = 0;
2659 Object *new_interface;
2660
2661 if (!mr || !mr->ops->request_ptr) {
2662 return false;
2663 }
2664
2665 /*
2666 * Avoid an update if the request_ptr call
2667 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2668 * a cache.
2669 */
2670 memory_region_transaction_begin();
2671
2672 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2673
2674 if (!host || !size) {
2675 memory_region_transaction_commit();
2676 return false;
2677 }
2678
2679 new_interface = object_new("mmio_interface");
2680 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2681 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2682 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2683 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2684 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2685 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2686
2687 memory_region_transaction_commit();
2688 return true;
2689}
2690
2691typedef struct MMIOPtrInvalidate {
2692 MemoryRegion *mr;
2693 hwaddr offset;
2694 unsigned size;
2695 int busy;
2696 int allocated;
2697} MMIOPtrInvalidate;
2698
2699#define MAX_MMIO_INVALIDATE 10
2700static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2701
2702static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2703 run_on_cpu_data data)
2704{
2705 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2706 MemoryRegion *mr = invalidate_data->mr;
2707 hwaddr offset = invalidate_data->offset;
2708 unsigned size = invalidate_data->size;
2709 MemoryRegionSection section = memory_region_find(mr, offset, size);
2710
2711 qemu_mutex_lock_iothread();
2712
2713 /* Reset dirty so this doesn't happen later. */
2714 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2715
2716 if (section.mr != mr) {
2717 /* memory_region_find add a ref on section.mr */
2718 memory_region_unref(section.mr);
2719 if (MMIO_INTERFACE(section.mr->owner)) {
2720 /* We found the interface just drop it. */
2721 object_property_set_bool(section.mr->owner, false, "realized",
2722 NULL);
2723 object_unref(section.mr->owner);
2724 object_unparent(section.mr->owner);
2725 }
2726 }
2727
2728 qemu_mutex_unlock_iothread();
2729
2730 if (invalidate_data->allocated) {
2731 g_free(invalidate_data);
2732 } else {
2733 invalidate_data->busy = 0;
2734 }
2735}
2736
2737void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2738 unsigned size)
2739{
2740 size_t i;
2741 MMIOPtrInvalidate *invalidate_data = NULL;
2742
2743 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2744 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2745 invalidate_data = &mmio_ptr_invalidate_list[i];
2746 break;
2747 }
2748 }
2749
2750 if (!invalidate_data) {
2751 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2752 invalidate_data->allocated = 1;
2753 }
2754
2755 invalidate_data->mr = mr;
2756 invalidate_data->offset = offset;
2757 invalidate_data->size = size;
2758
2759 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2760 RUN_ON_CPU_HOST_PTR(invalidate_data));
2761}
2762
2763void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2764{
2765 memory_region_ref(root);
2766 as->root = root;
2767 as->current_map = NULL;
2768 as->ioeventfd_nb = 0;
2769 as->ioeventfds = NULL;
2770 QTAILQ_INIT(&as->listeners);
2771 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2772 as->name = g_strdup(name ? name : "anonymous");
2773 address_space_update_topology(as);
2774 address_space_update_ioeventfds(as);
2775}
2776
2777static void do_address_space_destroy(AddressSpace *as)
2778{
2779 assert(QTAILQ_EMPTY(&as->listeners));
2780
2781 flatview_unref(as->current_map);
2782 g_free(as->name);
2783 g_free(as->ioeventfds);
2784 memory_region_unref(as->root);
2785}
2786
2787void address_space_destroy(AddressSpace *as)
2788{
2789 MemoryRegion *root = as->root;
2790
2791 /* Flush out anything from MemoryListeners listening in on this */
2792 memory_region_transaction_begin();
2793 as->root = NULL;
2794 memory_region_transaction_commit();
2795 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2796
2797 /* At this point, as->dispatch and as->current_map are dummy
2798 * entries that the guest should never use. Wait for the old
2799 * values to expire before freeing the data.
2800 */
2801 as->root = root;
2802 call_rcu(as, do_address_space_destroy, rcu);
2803}
2804
2805static const char *memory_region_type(MemoryRegion *mr)
2806{
2807 if (memory_region_is_ram_device(mr)) {
2808 return "ramd";
2809 } else if (memory_region_is_romd(mr)) {
2810 return "romd";
2811 } else if (memory_region_is_rom(mr)) {
2812 return "rom";
2813 } else if (memory_region_is_ram(mr)) {
2814 return "ram";
2815 } else {
2816 return "i/o";
2817 }
2818}
2819
2820typedef struct MemoryRegionList MemoryRegionList;
2821
2822struct MemoryRegionList {
2823 const MemoryRegion *mr;
2824 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2825};
2826
2827typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2828
2829#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2830 int128_sub((size), int128_one())) : 0)
2831#define MTREE_INDENT " "
2832
2833static void mtree_print_mr(fprintf_function mon_printf, void *f,
2834 const MemoryRegion *mr, unsigned int level,
2835 hwaddr base,
2836 MemoryRegionListHead *alias_print_queue)
2837{
2838 MemoryRegionList *new_ml, *ml, *next_ml;
2839 MemoryRegionListHead submr_print_queue;
2840 const MemoryRegion *submr;
2841 unsigned int i;
2842 hwaddr cur_start, cur_end;
2843
2844 if (!mr) {
2845 return;
2846 }
2847
2848 for (i = 0; i < level; i++) {
2849 mon_printf(f, MTREE_INDENT);
2850 }
2851
2852 cur_start = base + mr->addr;
2853 cur_end = cur_start + MR_SIZE(mr->size);
2854
2855 /*
2856 * Try to detect overflow of memory region. This should never
2857 * happen normally. When it happens, we dump something to warn the
2858 * user who is observing this.
2859 */
2860 if (cur_start < base || cur_end < cur_start) {
2861 mon_printf(f, "[DETECTED OVERFLOW!] ");
2862 }
2863
2864 if (mr->alias) {
2865 MemoryRegionList *ml;
2866 bool found = false;
2867
2868 /* check if the alias is already in the queue */
2869 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2870 if (ml->mr == mr->alias) {
2871 found = true;
2872 }
2873 }
2874
2875 if (!found) {
2876 ml = g_new(MemoryRegionList, 1);
2877 ml->mr = mr->alias;
2878 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2879 }
2880 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2881 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2882 "-" TARGET_FMT_plx "%s\n",
2883 cur_start, cur_end,
2884 mr->priority,
2885 memory_region_type((MemoryRegion *)mr),
2886 memory_region_name(mr),
2887 memory_region_name(mr->alias),
2888 mr->alias_offset,
2889 mr->alias_offset + MR_SIZE(mr->size),
2890 mr->enabled ? "" : " [disabled]");
2891 } else {
2892 mon_printf(f,
2893 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2894 cur_start, cur_end,
2895 mr->priority,
2896 memory_region_type((MemoryRegion *)mr),
2897 memory_region_name(mr),
2898 mr->enabled ? "" : " [disabled]");
2899 }
2900
2901 QTAILQ_INIT(&submr_print_queue);
2902
2903 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2904 new_ml = g_new(MemoryRegionList, 1);
2905 new_ml->mr = submr;
2906 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2907 if (new_ml->mr->addr < ml->mr->addr ||
2908 (new_ml->mr->addr == ml->mr->addr &&
2909 new_ml->mr->priority > ml->mr->priority)) {
2910 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2911 new_ml = NULL;
2912 break;
2913 }
2914 }
2915 if (new_ml) {
2916 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2917 }
2918 }
2919
2920 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2921 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2922 alias_print_queue);
2923 }
2924
2925 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2926 g_free(ml);
2927 }
2928}
2929
2930struct FlatViewInfo {
2931 fprintf_function mon_printf;
2932 void *f;
2933 int counter;
2934 bool dispatch_tree;
2935};
2936
2937static void mtree_print_flatview(gpointer key, gpointer value,
2938 gpointer user_data)
2939{
2940 FlatView *view = key;
2941 GArray *fv_address_spaces = value;
2942 struct FlatViewInfo *fvi = user_data;
2943 fprintf_function p = fvi->mon_printf;
2944 void *f = fvi->f;
2945 FlatRange *range = &view->ranges[0];
2946 MemoryRegion *mr;
2947 int n = view->nr;
2948 int i;
2949 AddressSpace *as;
2950
2951 p(f, "FlatView #%d\n", fvi->counter);
2952 ++fvi->counter;
2953
2954 for (i = 0; i < fv_address_spaces->len; ++i) {
2955 as = g_array_index(fv_address_spaces, AddressSpace*, i);
2956 p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
2957 if (as->root->alias) {
2958 p(f, ", alias %s", memory_region_name(as->root->alias));
2959 }
2960 p(f, "\n");
2961 }
2962
2963 p(f, " Root memory region: %s\n",
2964 view->root ? memory_region_name(view->root) : "(none)");
2965
2966 if (n <= 0) {
2967 p(f, MTREE_INDENT "No rendered FlatView\n\n");
2968 return;
2969 }
2970
2971 while (n--) {
2972 mr = range->mr;
2973 if (range->offset_in_region) {
2974 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2975 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2976 int128_get64(range->addr.start),
2977 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2978 mr->priority,
2979 range->readonly ? "rom" : memory_region_type(mr),
2980 memory_region_name(mr),
2981 range->offset_in_region);
2982 } else {
2983 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2984 TARGET_FMT_plx " (prio %d, %s): %s\n",
2985 int128_get64(range->addr.start),
2986 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2987 mr->priority,
2988 range->readonly ? "rom" : memory_region_type(mr),
2989 memory_region_name(mr));
2990 }
2991 range++;
2992 }
2993
2994#if !defined(CONFIG_USER_ONLY)
2995 if (fvi->dispatch_tree && view->root) {
2996 mtree_print_dispatch(p, f, view->dispatch, view->root);
2997 }
2998#endif
2999
3000 p(f, "\n");
3001}
3002
3003static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3004 gpointer user_data)
3005{
3006 FlatView *view = key;
3007 GArray *fv_address_spaces = value;
3008
3009 g_array_unref(fv_address_spaces);
3010 flatview_unref(view);
3011
3012 return true;
3013}
3014
3015void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3016 bool dispatch_tree)
3017{
3018 MemoryRegionListHead ml_head;
3019 MemoryRegionList *ml, *ml2;
3020 AddressSpace *as;
3021
3022 if (flatview) {
3023 FlatView *view;
3024 struct FlatViewInfo fvi = {
3025 .mon_printf = mon_printf,
3026 .f = f,
3027 .counter = 0,
3028 .dispatch_tree = dispatch_tree
3029 };
3030 GArray *fv_address_spaces;
3031 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3032
3033 /* Gather all FVs in one table */
3034 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3035 view = address_space_get_flatview(as);
3036
3037 fv_address_spaces = g_hash_table_lookup(views, view);
3038 if (!fv_address_spaces) {
3039 fv_address_spaces = g_array_new(false, false, sizeof(as));
3040 g_hash_table_insert(views, view, fv_address_spaces);
3041 }
3042
3043 g_array_append_val(fv_address_spaces, as);
3044 }
3045
3046 /* Print */
3047 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3048
3049 /* Free */
3050 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3051 g_hash_table_unref(views);
3052
3053 return;
3054 }
3055
3056 QTAILQ_INIT(&ml_head);
3057
3058 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3059 mon_printf(f, "address-space: %s\n", as->name);
3060 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
3061 mon_printf(f, "\n");
3062 }
3063
3064 /* print aliased regions */
3065 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3066 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3067 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
3068 mon_printf(f, "\n");
3069 }
3070
3071 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3072 g_free(ml);
3073 }
3074}
3075
3076void memory_region_init_ram(MemoryRegion *mr,
3077 struct Object *owner,
3078 const char *name,
3079 uint64_t size,
3080 Error **errp)
3081{
3082 DeviceState *owner_dev;
3083 Error *err = NULL;
3084
3085 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3086 if (err) {
3087 error_propagate(errp, err);
3088 return;
3089 }
3090 /* This will assert if owner is neither NULL nor a DeviceState.
3091 * We only want the owner here for the purposes of defining a
3092 * unique name for migration. TODO: Ideally we should implement
3093 * a naming scheme for Objects which are not DeviceStates, in
3094 * which case we can relax this restriction.
3095 */
3096 owner_dev = DEVICE(owner);
3097 vmstate_register_ram(mr, owner_dev);
3098}
3099
3100void memory_region_init_rom(MemoryRegion *mr,
3101 struct Object *owner,
3102 const char *name,
3103 uint64_t size,
3104 Error **errp)
3105{
3106 DeviceState *owner_dev;
3107 Error *err = NULL;
3108
3109 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3110 if (err) {
3111 error_propagate(errp, err);
3112 return;
3113 }
3114 /* This will assert if owner is neither NULL nor a DeviceState.
3115 * We only want the owner here for the purposes of defining a
3116 * unique name for migration. TODO: Ideally we should implement
3117 * a naming scheme for Objects which are not DeviceStates, in
3118 * which case we can relax this restriction.
3119 */
3120 owner_dev = DEVICE(owner);
3121 vmstate_register_ram(mr, owner_dev);
3122}
3123
3124void memory_region_init_rom_device(MemoryRegion *mr,
3125 struct Object *owner,
3126 const MemoryRegionOps *ops,
3127 void *opaque,
3128 const char *name,
3129 uint64_t size,
3130 Error **errp)
3131{
3132 DeviceState *owner_dev;
3133 Error *err = NULL;
3134
3135 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3136 name, size, &err);
3137 if (err) {
3138 error_propagate(errp, err);
3139 return;
3140 }
3141 /* This will assert if owner is neither NULL nor a DeviceState.
3142 * We only want the owner here for the purposes of defining a
3143 * unique name for migration. TODO: Ideally we should implement
3144 * a naming scheme for Objects which are not DeviceStates, in
3145 * which case we can relax this restriction.
3146 */
3147 owner_dev = DEVICE(owner);
3148 vmstate_register_ram(mr, owner_dev);
3149}
3150
3151static const TypeInfo memory_region_info = {
3152 .parent = TYPE_OBJECT,
3153 .name = TYPE_MEMORY_REGION,
3154 .instance_size = sizeof(MemoryRegion),
3155 .instance_init = memory_region_initfn,
3156 .instance_finalize = memory_region_finalize,
3157};
3158
3159static const TypeInfo iommu_memory_region_info = {
3160 .parent = TYPE_MEMORY_REGION,
3161 .name = TYPE_IOMMU_MEMORY_REGION,
3162 .class_size = sizeof(IOMMUMemoryRegionClass),
3163 .instance_size = sizeof(IOMMUMemoryRegion),
3164 .instance_init = iommu_memory_region_initfn,
3165 .abstract = true,
3166};
3167
3168static void memory_register_types(void)
3169{
3170 type_register_static(&memory_region_info);
3171 type_register_static(&iommu_memory_region_info);
3172}
3173
3174type_init(memory_register_types)
QEMU mirror