]> git.proxmox.com Git - mirror_qemu.git/blame_incremental - target/riscv/insn32.decode
Merge tag 'pull-target-arm-20240111' of https://git.linaro.org/people/pmaydell/qemu...
[mirror_qemu.git] / target / riscv / insn32.decode
... / ...
CommitLineData
1#
2# RISC-V translation routines for the RVXI Base Integer Instruction Set.
3#
4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms and conditions of the GNU General Public License,
9# version 2 or later, as published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14# more details.
15#
16# You should have received a copy of the GNU General Public License along with
17# this program. If not, see <http://www.gnu.org/licenses/>.
18
19# Fields:
20%rs3 27:5
21%rs2 20:5
22%rs1 15:5
23%rd 7:5
24%sh5 20:5
25%sh6 20:6
26
27%sh7 20:7
28%csr 20:12
29%rm 12:3
30%nf 29:3 !function=ex_plus_1
31
32# immediates:
33%imm_i 20:s12
34%imm_s 25:s7 7:5
35%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1
36%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1
37%imm_u 12:s20 !function=ex_shift_12
38%imm_bs 30:2 !function=ex_shift_3
39%imm_rnum 20:4
40%imm_z6 26:1 15:5
41
42# Argument sets:
43&empty
44&b imm rs2 rs1
45&i imm rs1 rd
46&j imm rd
47&r rd rs1 rs2
48&r2 rd rs1
49&r2_s rs1 rs2
50&s imm rs1 rs2
51&u imm rd
52&shift shamt rs1 rd
53&atomic aq rl rs2 rs1 rd
54&rmrr vm rd rs1 rs2
55&rmr vm rd rs2
56&r2nfvm vm rd rs1 nf
57&rnfvm vm rd rs1 rs2 nf
58&k_aes shamt rs2 rs1 rd
59
60# Formats 32:
61@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd
62@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd
63@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1
64@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1
65@u .................... ..... ....... &u imm=%imm_u %rd
66@j .................... ..... ....... &j imm=%imm_j %rd
67
68@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd
69@csr ............ ..... ... ..... ....... %csr %rs1 %rd
70
71@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd
72@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd
73
74@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
75@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
76@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd
77@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd
78@r2_vm_1 ...... . ..... ..... ... ..... ....... &rmr vm=1 %rs2 %rd
79@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
80@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
81@r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd
82@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
83@r2rd ....... ..... ..... ... ..... ....... %rs2 %rd
84@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
85@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd
86@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd
87@r2_zimm6 ..... . vm:1 ..... ..... ... ..... ....... &rmrr %rs2 rs1=%imm_z6 %rd
88@r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd
89@r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd
90@r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1
91
92@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1
93@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1
94
95@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1
96@sfence_vm ....... ..... ..... ... ..... ....... %rs1
97
98@k_aes .. ..... ..... ..... ... ..... ....... &k_aes shamt=%imm_bs %rs2 %rs1 %rd
99@i_aes .. ..... ..... ..... ... ..... ....... &i imm=%imm_rnum %rs1 %rd
100
101# Formats 64:
102@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd
103
104# Formats 128:
105@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
106
107# *** Privileged Instructions ***
108ecall 000000000000 00000 000 00000 1110011
109ebreak 000000000001 00000 000 00000 1110011
110uret 0000000 00010 00000 000 00000 1110011
111sret 0001000 00010 00000 000 00000 1110011
112mret 0011000 00010 00000 000 00000 1110011
113wfi 0001000 00101 00000 000 00000 1110011
114sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma
115sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm
116
117# *** RV32I Base Instruction Set ***
118lui .................... ..... 0110111 @u
119auipc .................... ..... 0010111 @u
120jal .................... ..... 1101111 @j
121jalr ............ ..... 000 ..... 1100111 @i
122beq ....... ..... ..... 000 ..... 1100011 @b
123bne ....... ..... ..... 001 ..... 1100011 @b
124blt ....... ..... ..... 100 ..... 1100011 @b
125bge ....... ..... ..... 101 ..... 1100011 @b
126bltu ....... ..... ..... 110 ..... 1100011 @b
127bgeu ....... ..... ..... 111 ..... 1100011 @b
128lb ............ ..... 000 ..... 0000011 @i
129lh ............ ..... 001 ..... 0000011 @i
130lw ............ ..... 010 ..... 0000011 @i
131lbu ............ ..... 100 ..... 0000011 @i
132lhu ............ ..... 101 ..... 0000011 @i
133sb ....... ..... ..... 000 ..... 0100011 @s
134sh ....... ..... ..... 001 ..... 0100011 @s
135sw ....... ..... ..... 010 ..... 0100011 @s
136addi ............ ..... 000 ..... 0010011 @i
137slti ............ ..... 010 ..... 0010011 @i
138sltiu ............ ..... 011 ..... 0010011 @i
139xori ............ ..... 100 ..... 0010011 @i
140# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded.
141ori ............ ..... 110 ..... 0010011 @i
142andi ............ ..... 111 ..... 0010011 @i
143slli 00000. ...... ..... 001 ..... 0010011 @sh
144srli 00000. ...... ..... 101 ..... 0010011 @sh
145srai 01000. ...... ..... 101 ..... 0010011 @sh
146add 0000000 ..... ..... 000 ..... 0110011 @r
147sub 0100000 ..... ..... 000 ..... 0110011 @r
148sll 0000000 ..... ..... 001 ..... 0110011 @r
149slt 0000000 ..... ..... 010 ..... 0110011 @r
150sltu 0000000 ..... ..... 011 ..... 0110011 @r
151xor 0000000 ..... ..... 100 ..... 0110011 @r
152srl 0000000 ..... ..... 101 ..... 0110011 @r
153sra 0100000 ..... ..... 101 ..... 0110011 @r
154or 0000000 ..... ..... 110 ..... 0110011 @r
155and 0000000 ..... ..... 111 ..... 0110011 @r
156
157{
158 pause 0000 0001 0000 00000 000 00000 0001111
159 fence ---- pred:4 succ:4 ----- 000 ----- 0001111
160}
161
162fence_i ---- ---- ---- ----- 001 ----- 0001111
163csrrw ............ ..... 001 ..... 1110011 @csr
164csrrs ............ ..... 010 ..... 1110011 @csr
165csrrc ............ ..... 011 ..... 1110011 @csr
166csrrwi ............ ..... 101 ..... 1110011 @csr
167csrrsi ............ ..... 110 ..... 1110011 @csr
168csrrci ............ ..... 111 ..... 1110011 @csr
169
170# *** RV64I Base Instruction Set (in addition to RV32I) ***
171lwu ............ ..... 110 ..... 0000011 @i
172ld ............ ..... 011 ..... 0000011 @i
173sd ....... ..... ..... 011 ..... 0100011 @s
174addiw ............ ..... 000 ..... 0011011 @i
175slliw 0000000 ..... ..... 001 ..... 0011011 @sh5
176srliw 0000000 ..... ..... 101 ..... 0011011 @sh5
177sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5
178addw 0000000 ..... ..... 000 ..... 0111011 @r
179subw 0100000 ..... ..... 000 ..... 0111011 @r
180sllw 0000000 ..... ..... 001 ..... 0111011 @r
181srlw 0000000 ..... ..... 101 ..... 0111011 @r
182sraw 0100000 ..... ..... 101 ..... 0111011 @r
183
184# *** RV128I Base Instruction Set (in addition to RV64I) ***
185ldu ............ ..... 111 ..... 0000011 @i
186{
187 [
188 # *** RV32 Zicbom Standard Extension ***
189 cbo_clean 0000000 00001 ..... 010 00000 0001111 @sfence_vm
190 cbo_flush 0000000 00010 ..... 010 00000 0001111 @sfence_vm
191 cbo_inval 0000000 00000 ..... 010 00000 0001111 @sfence_vm
192
193 # *** RV32 Zicboz Standard Extension ***
194 cbo_zero 0000000 00100 ..... 010 00000 0001111 @sfence_vm
195 ]
196
197 # *** RVI128 lq ***
198 lq ............ ..... 010 ..... 0001111 @i
199}
200sq ............ ..... 100 ..... 0100011 @s
201addid ............ ..... 000 ..... 1011011 @i
202sllid 000000 ...... ..... 001 ..... 1011011 @sh6
203srlid 000000 ...... ..... 101 ..... 1011011 @sh6
204sraid 010000 ...... ..... 101 ..... 1011011 @sh6
205addd 0000000 ..... ..... 000 ..... 1111011 @r
206subd 0100000 ..... ..... 000 ..... 1111011 @r
207slld 0000000 ..... ..... 001 ..... 1111011 @r
208srld 0000000 ..... ..... 101 ..... 1111011 @r
209srad 0100000 ..... ..... 101 ..... 1111011 @r
210
211# *** RV32M Standard Extension ***
212mul 0000001 ..... ..... 000 ..... 0110011 @r
213mulh 0000001 ..... ..... 001 ..... 0110011 @r
214mulhsu 0000001 ..... ..... 010 ..... 0110011 @r
215mulhu 0000001 ..... ..... 011 ..... 0110011 @r
216div 0000001 ..... ..... 100 ..... 0110011 @r
217divu 0000001 ..... ..... 101 ..... 0110011 @r
218rem 0000001 ..... ..... 110 ..... 0110011 @r
219remu 0000001 ..... ..... 111 ..... 0110011 @r
220
221# *** RV64M Standard Extension (in addition to RV32M) ***
222mulw 0000001 ..... ..... 000 ..... 0111011 @r
223divw 0000001 ..... ..... 100 ..... 0111011 @r
224divuw 0000001 ..... ..... 101 ..... 0111011 @r
225remw 0000001 ..... ..... 110 ..... 0111011 @r
226remuw 0000001 ..... ..... 111 ..... 0111011 @r
227
228# *** RV128M Standard Extension (in addition to RV64M) ***
229muld 0000001 ..... ..... 000 ..... 1111011 @r
230divd 0000001 ..... ..... 100 ..... 1111011 @r
231divud 0000001 ..... ..... 101 ..... 1111011 @r
232remd 0000001 ..... ..... 110 ..... 1111011 @r
233remud 0000001 ..... ..... 111 ..... 1111011 @r
234
235# *** RV32A Standard Extension ***
236lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
237sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st
238amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st
239amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st
240amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st
241amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st
242amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st
243amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st
244amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st
245amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st
246amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st
247
248# *** RV64A Standard Extension (in addition to RV32A) ***
249lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
250sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st
251amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st
252amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st
253amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st
254amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st
255amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st
256amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st
257amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st
258amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st
259amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st
260
261# *** RV32F Standard Extension ***
262flw ............ ..... 010 ..... 0000111 @i
263fsw ....... ..... ..... 010 ..... 0100111 @s
264fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm
265fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm
266fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm
267fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm
268fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm
269fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm
270fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm
271fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm
272fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm
273fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r
274fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r
275fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r
276fmin_s 0010100 ..... ..... 000 ..... 1010011 @r
277fmax_s 0010100 ..... ..... 001 ..... 1010011 @r
278fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm
279fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm
280fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2
281feq_s 1010000 ..... ..... 010 ..... 1010011 @r
282flt_s 1010000 ..... ..... 001 ..... 1010011 @r
283fle_s 1010000 ..... ..... 000 ..... 1010011 @r
284fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2
285fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm
286fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm
287fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2
288
289# *** RV64F Standard Extension (in addition to RV32F) ***
290fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm
291fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm
292fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm
293fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm
294
295# *** RV32D Standard Extension ***
296fld ............ ..... 011 ..... 0000111 @i
297fsd ....... ..... ..... 011 ..... 0100111 @s
298fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm
299fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm
300fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm
301fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm
302fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm
303fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm
304fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm
305fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm
306fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm
307fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r
308fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r
309fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r
310fmin_d 0010101 ..... ..... 000 ..... 1010011 @r
311fmax_d 0010101 ..... ..... 001 ..... 1010011 @r
312fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm
313fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm
314feq_d 1010001 ..... ..... 010 ..... 1010011 @r
315flt_d 1010001 ..... ..... 001 ..... 1010011 @r
316fle_d 1010001 ..... ..... 000 ..... 1010011 @r
317fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2
318fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm
319fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm
320fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm
321fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm
322
323# *** RV64D Standard Extension (in addition to RV32D) ***
324fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm
325fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm
326fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2
327fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm
328fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm
329fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2
330
331# *** RV32H Base Instruction Set ***
332hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2
333hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2
334hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2
335hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2
336hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2
337hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2
338hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2
339hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s
340hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s
341hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s
342hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma
343hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma
344
345# *** RV64H Base Instruction Set ***
346hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2
347hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2
348hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s
349
350# *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
351# Vector unit-stride load/store insns.
352vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
353vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
354vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
355vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
356vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
357vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
358vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
359vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
360
361# Vector unit-stride mask load/store insns.
362vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2
363vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2
364
365# Vector strided insns.
366vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
367vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
368vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
369vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
370vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
371vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
372vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
373vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
374
375# Vector ordered-indexed and unordered-indexed load insns.
376vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm
377vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm
378vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm
379vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm
380
381# Vector ordered-indexed and unordered-indexed store insns.
382vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm
383vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm
384vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm
385vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm
386
387# Vector unit-stride fault-only-first load insns.
388vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
389vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
390vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
391vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
392
393# Vector whole register insns
394vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2
395vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2
396vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2
397vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2
398vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2
399vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2
400vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2
401vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2
402vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2
403vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2
404vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2
405vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2
406vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2
407vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2
408vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2
409vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2
410vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2
411vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2
412vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2
413vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2
414
415# *** new major opcode OP-V ***
416vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm
417vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm
418vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm
419vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm
420vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm
421vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm
422vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm
423vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm
424vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm
425vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm
426vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm
427vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm
428vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm
429vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm
430vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm
431vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm
432vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm
433vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm
434vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm
435vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm
436vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm
437vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm
438vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm
439vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1
440vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1
441vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1
442vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm
443vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm
444vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm
445vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1
446vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1
447vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm
448vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm
449vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm
450vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm
451vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm
452vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm
453vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm
454vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm
455vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm
456vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm
457vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm
458vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm
459vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm
460vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm
461vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm
462vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm
463vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm
464vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm
465vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm
466vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm
467vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm
468vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm
469vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm
470vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm
471vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm
472vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm
473vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm
474vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm
475vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm
476vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm
477vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm
478vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm
479vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm
480vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm
481vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm
482vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm
483vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm
484vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm
485vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm
486vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm
487vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm
488vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm
489vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm
490vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm
491vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm
492vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm
493vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm
494vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm
495vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm
496vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm
497vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm
498vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm
499vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm
500vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm
501vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm
502vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm
503vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm
504vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm
505vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm
506vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm
507vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm
508vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm
509vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm
510vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm
511vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm
512vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm
513vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm
514vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm
515vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm
516vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm
517vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm
518vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm
519vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm
520vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm
521vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm
522vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm
523vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm
524vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm
525vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm
526vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm
527vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm
528vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm
529vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm
530vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm
531vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm
532vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm
533vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm
534vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm
535vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm
536vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm
537vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm
538vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2
539vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2
540vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2
541vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
542vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
543vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
544vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm
545vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm
546vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm
547vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm
548vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm
549vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm
550vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm
551vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm
552vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm
553vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm
554vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm
555vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm
556vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm
557vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm
558vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm
559vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm
560vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm
561vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm
562vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm
563vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm
564vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm
565vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm
566vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm
567vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm
568vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm
569vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm
570vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm
571vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm
572vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm
573vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm
574vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm
575vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm
576vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm
577vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm
578vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm
579vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm
580vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm
581vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm
582vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm
583vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm
584vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm
585vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm
586vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm
587vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm
588vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm
589vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm
590vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm
591vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm
592vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm
593vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm
594vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm
595vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm
596vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm
597vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm
598vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm
599vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm
600vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm
601vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm
602vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm
603vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm
604vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm
605vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm
606vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm
607vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm
608vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm
609vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm
610vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm
611vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm
612vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm
613vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm
614vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm
615vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm
616vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm
617vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm
618vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm
619vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm
620vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm
621vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm
622vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm
623vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm
624vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm
625vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm
626vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm
627vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm
628vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm
629vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm
630vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm
631vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm
632vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm
633vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm
634vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm
635vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm
636vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm
637vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm
638vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm
639vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm
640vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm
641vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm
642vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm
643vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm
644vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm
645vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm
646vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
647vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2
648
649vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm
650vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm
651vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm
652vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm
653vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm
654vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm
655
656vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm
657vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm
658vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm
659vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm
660vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm
661vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm
662vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm
663
664vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm
665vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm
666vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm
667vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm
668vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm
669vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm
670vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm
671vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm
672
673vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm
674vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm
675vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm
676vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm
677vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm
678vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm
679vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm
680vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm
681vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm
682vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm
683# Vector ordered and unordered reduction sum
684vfredusum_vs 000001 . ..... ..... 001 ..... 1010111 @r_vm
685vfredosum_vs 000011 . ..... ..... 001 ..... 1010111 @r_vm
686vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm
687vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm
688# Vector widening ordered and unordered float reduction sum
689vfwredusum_vs 110001 . ..... ..... 001 ..... 1010111 @r_vm
690vfwredosum_vs 110011 . ..... ..... 001 ..... 1010111 @r_vm
691vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r
692vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r
693vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r
694vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r
695vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r
696vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r
697vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r
698vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r
699vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm
700vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm
701vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm
702vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm
703vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm
704viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm
705vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm
706vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd
707vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2
708vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd
709vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2
710vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm
711vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm
712vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm
713vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm
714vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm
715vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm
716vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm
717vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm
718vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm
719vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm
720vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r
721vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd
722vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd
723vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd
724vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd
725
726# Vector Integer Extension
727vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm
728vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm
729vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm
730vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm
731vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm
732vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm
733
734vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11
735vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10
736vsetvl 1000000 ..... ..... 111 ..... 1010111 @r
737
738# *** Zawrs Standard Extension ***
739wrs_nto 000000001101 00000 000 00000 1110011
740wrs_sto 000000011101 00000 000 00000 1110011
741
742# *** RV32 Zba Standard Extension ***
743sh1add 0010000 .......... 010 ..... 0110011 @r
744sh2add 0010000 .......... 100 ..... 0110011 @r
745sh3add 0010000 .......... 110 ..... 0110011 @r
746
747# *** RV64 Zba Standard Extension (in addition to RV32 Zba) ***
748add_uw 0000100 .......... 000 ..... 0111011 @r
749sh1add_uw 0010000 .......... 010 ..... 0111011 @r
750sh2add_uw 0010000 .......... 100 ..... 0111011 @r
751sh3add_uw 0010000 .......... 110 ..... 0111011 @r
752slli_uw 00001 ............ 001 ..... 0011011 @sh
753
754# *** RV32 Zbb/Zbkb Standard Extension ***
755andn 0100000 .......... 111 ..... 0110011 @r
756rol 0110000 .......... 001 ..... 0110011 @r
757ror 0110000 .......... 101 ..... 0110011 @r
758rori 01100 ............ 101 ..... 0010011 @sh
759# The encoding for rev8 differs between RV32 and RV64.
760# rev8_32 denotes the RV32 variant.
761rev8_32 011010 011000 ..... 101 ..... 0010011 @r2
762# The encoding for zext.h differs between RV32 and RV64.
763# zext_h_32 denotes the RV32 variant.
764{
765 zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2
766 pack 0000100 ..... ..... 100 ..... 0110011 @r
767}
768xnor 0100000 .......... 100 ..... 0110011 @r
769# *** RV32 extra Zbb Standard Extension ***
770clz 011000 000000 ..... 001 ..... 0010011 @r2
771cpop 011000 000010 ..... 001 ..... 0010011 @r2
772ctz 011000 000001 ..... 001 ..... 0010011 @r2
773max 0000101 .......... 110 ..... 0110011 @r
774maxu 0000101 .......... 111 ..... 0110011 @r
775min 0000101 .......... 100 ..... 0110011 @r
776minu 0000101 .......... 101 ..... 0110011 @r
777orc_b 001010 000111 ..... 101 ..... 0010011 @r2
778orn 0100000 .......... 110 ..... 0110011 @r
779sext_b 011000 000100 ..... 001 ..... 0010011 @r2
780sext_h 011000 000101 ..... 001 ..... 0010011 @r2
781# *** RV32 extra Zbkb Standard Extension ***
782brev8 0110100 00111 ..... 101 ..... 0010011 @r2 #grevi
783packh 0000100 .......... 111 ..... 0110011 @r
784unzip 0000100 01111 ..... 101 ..... 0010011 @r2 #unshfl
785zip 0000100 01111 ..... 001 ..... 0010011 @r2 #shfl
786
787# *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) ***
788# The encoding for rev8 differs between RV32 and RV64.
789# When executing on RV64, the encoding used in RV32 is an illegal
790# instruction, so we use different handler functions to differentiate.
791rev8_64 011010 111000 ..... 101 ..... 0010011 @r2
792rolw 0110000 .......... 001 ..... 0111011 @r
793roriw 0110000 .......... 101 ..... 0011011 @sh5
794rorw 0110000 .......... 101 ..... 0111011 @r
795# The encoding for zext.h differs between RV32 and RV64.
796# When executing on RV64, the encoding used in RV32 is an illegal
797# instruction, so we use different handler functions to differentiate.
798{
799 zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2
800 packw 0000100 ..... ..... 100 ..... 0111011 @r
801}
802# *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) ***
803clzw 0110000 00000 ..... 001 ..... 0011011 @r2
804ctzw 0110000 00001 ..... 001 ..... 0011011 @r2
805cpopw 0110000 00010 ..... 001 ..... 0011011 @r2
806
807# *** RV32 Zbc/Zbkc Standard Extension ***
808clmul 0000101 .......... 001 ..... 0110011 @r
809clmulh 0000101 .......... 011 ..... 0110011 @r
810# *** RV32 extra Zbc Standard Extension ***
811clmulr 0000101 .......... 010 ..... 0110011 @r
812
813# *** RV32 Zbkx Standard Extension ***
814xperm4 0010100 .......... 010 ..... 0110011 @r
815xperm8 0010100 .......... 100 ..... 0110011 @r
816
817# *** RV32 Zbs Standard Extension ***
818bclr 0100100 .......... 001 ..... 0110011 @r
819bclri 01001. ........... 001 ..... 0010011 @sh
820bext 0100100 .......... 101 ..... 0110011 @r
821bexti 01001. ........... 101 ..... 0010011 @sh
822binv 0110100 .......... 001 ..... 0110011 @r
823binvi 01101. ........... 001 ..... 0010011 @sh
824bset 0010100 .......... 001 ..... 0110011 @r
825bseti 00101. ........... 001 ..... 0010011 @sh
826
827# *** Zfa Standard Extension ***
828fli_s 1111000 00001 ..... 000 ..... 1010011 @r2
829fli_d 1111001 00001 ..... 000 ..... 1010011 @r2
830fli_h 1111010 00001 ..... 000 ..... 1010011 @r2
831fminm_s 0010100 ..... ..... 010 ..... 1010011 @r
832fmaxm_s 0010100 ..... ..... 011 ..... 1010011 @r
833fminm_d 0010101 ..... ..... 010 ..... 1010011 @r
834fmaxm_d 0010101 ..... ..... 011 ..... 1010011 @r
835fminm_h 0010110 ..... ..... 010 ..... 1010011 @r
836fmaxm_h 0010110 ..... ..... 011 ..... 1010011 @r
837fround_s 0100000 00100 ..... ... ..... 1010011 @r2_rm
838froundnx_s 0100000 00101 ..... ... ..... 1010011 @r2_rm
839fround_d 0100001 00100 ..... ... ..... 1010011 @r2_rm
840froundnx_d 0100001 00101 ..... ... ..... 1010011 @r2_rm
841fround_h 0100010 00100 ..... ... ..... 1010011 @r2_rm
842froundnx_h 0100010 00101 ..... ... ..... 1010011 @r2_rm
843fcvtmod_w_d 1100001 01000 ..... 001 ..... 1010011 @r2
844fmvh_x_d 1110001 00001 ..... 000 ..... 1010011 @r2
845fmvp_d_x 1011001 ..... ..... 000 ..... 1010011 @r
846fleq_s 1010000 ..... ..... 100 ..... 1010011 @r
847fltq_s 1010000 ..... ..... 101 ..... 1010011 @r
848fleq_d 1010001 ..... ..... 100 ..... 1010011 @r
849fltq_d 1010001 ..... ..... 101 ..... 1010011 @r
850fleq_h 1010010 ..... ..... 100 ..... 1010011 @r
851fltq_h 1010010 ..... ..... 101 ..... 1010011 @r
852
853# *** RV32 Zfh Extension ***
854flh ............ ..... 001 ..... 0000111 @i
855fsh ....... ..... ..... 001 ..... 0100111 @s
856fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm
857fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm
858fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm
859fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm
860fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm
861fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm
862fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm
863fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm
864fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm
865fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r
866fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r
867fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r
868fmin_h 0010110 ..... ..... 000 ..... 1010011 @r
869fmax_h 0010110 ..... ..... 001 ..... 1010011 @r
870fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm
871fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm
872fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm
873fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm
874fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm
875fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm
876fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2
877feq_h 1010010 ..... ..... 010 ..... 1010011 @r
878flt_h 1010010 ..... ..... 001 ..... 1010011 @r
879fle_h 1010010 ..... ..... 000 ..... 1010011 @r
880fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2
881fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm
882fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm
883fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2
884
885# *** RV64 Zfh Extension (in addition to RV32 Zfh) ***
886fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm
887fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm
888fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm
889fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm
890
891# *** Svinval Standard Extension ***
892sinval_vma 0001011 ..... ..... 000 00000 1110011 @sfence_vma
893sfence_w_inval 0001100 00000 00000 000 00000 1110011
894sfence_inval_ir 0001100 00001 00000 000 00000 1110011
895hinval_vvma 0010011 ..... ..... 000 00000 1110011 @hfence_vvma
896hinval_gvma 0110011 ..... ..... 000 00000 1110011 @hfence_gvma
897
898# *** RV32 Zknd Standard Extension ***
899aes32dsmi .. 10111 ..... ..... 000 ..... 0110011 @k_aes
900aes32dsi .. 10101 ..... ..... 000 ..... 0110011 @k_aes
901# *** RV64 Zknd Standard Extension ***
902aes64dsm 00 11111 ..... ..... 000 ..... 0110011 @r
903aes64ds 00 11101 ..... ..... 000 ..... 0110011 @r
904aes64im 00 11000 00000 ..... 001 ..... 0010011 @r2
905# *** RV32 Zkne Standard Extension ***
906aes32esmi .. 10011 ..... ..... 000 ..... 0110011 @k_aes
907aes32esi .. 10001 ..... ..... 000 ..... 0110011 @k_aes
908# *** RV64 Zkne Standard Extension ***
909aes64es 00 11001 ..... ..... 000 ..... 0110011 @r
910aes64esm 00 11011 ..... ..... 000 ..... 0110011 @r
911# *** RV64 Zkne/zknd Standard Extension ***
912aes64ks2 01 11111 ..... ..... 000 ..... 0110011 @r
913aes64ks1i 00 11000 1.... ..... 001 ..... 0010011 @i_aes
914# *** RV32 Zknh Standard Extension ***
915sha256sig0 00 01000 00010 ..... 001 ..... 0010011 @r2
916sha256sig1 00 01000 00011 ..... 001 ..... 0010011 @r2
917sha256sum0 00 01000 00000 ..... 001 ..... 0010011 @r2
918sha256sum1 00 01000 00001 ..... 001 ..... 0010011 @r2
919sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r
920sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r
921sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r
922sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r
923sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r
924sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r
925# *** RV64 Zknh Standard Extension ***
926sha512sig0 00 01000 00110 ..... 001 ..... 0010011 @r2
927sha512sig1 00 01000 00111 ..... 001 ..... 0010011 @r2
928sha512sum0 00 01000 00100 ..... 001 ..... 0010011 @r2
929sha512sum1 00 01000 00101 ..... 001 ..... 0010011 @r2
930# *** RV32 Zksh Standard Extension ***
931sm3p0 00 01000 01000 ..... 001 ..... 0010011 @r2
932sm3p1 00 01000 01001 ..... 001 ..... 0010011 @r2
933# *** RV32 Zksed Standard Extension ***
934sm4ed .. 11000 ..... ..... 000 ..... 0110011 @k_aes
935sm4ks .. 11010 ..... ..... 000 ..... 0110011 @k_aes
936
937# *** RV32 Zicond Standard Extension ***
938czero_eqz 0000111 ..... ..... 101 ..... 0110011 @r
939czero_nez 0000111 ..... ..... 111 ..... 0110011 @r
940
941# *** Zfbfmin Standard Extension ***
942fcvt_bf16_s 0100010 01000 ..... ... ..... 1010011 @r2_rm
943fcvt_s_bf16 0100000 00110 ..... ... ..... 1010011 @r2_rm
944
945# *** Zvfbfmin Standard Extension ***
946vfncvtbf16_f_f_w 010010 . ..... 11101 001 ..... 1010111 @r2_vm
947vfwcvtbf16_f_f_v 010010 . ..... 01101 001 ..... 1010111 @r2_vm
948
949# *** Zvfbfwma Standard Extension ***
950vfwmaccbf16_vv 111011 . ..... ..... 001 ..... 1010111 @r_vm
951vfwmaccbf16_vf 111011 . ..... ..... 101 ..... 1010111 @r_vm
952
953# *** Zvbc vector crypto extension ***
954vclmul_vv 001100 . ..... ..... 010 ..... 1010111 @r_vm
955vclmul_vx 001100 . ..... ..... 110 ..... 1010111 @r_vm
956vclmulh_vv 001101 . ..... ..... 010 ..... 1010111 @r_vm
957vclmulh_vx 001101 . ..... ..... 110 ..... 1010111 @r_vm
958
959# *** Zvbb vector crypto extension ***
960vrol_vv 010101 . ..... ..... 000 ..... 1010111 @r_vm
961vrol_vx 010101 . ..... ..... 100 ..... 1010111 @r_vm
962vror_vv 010100 . ..... ..... 000 ..... 1010111 @r_vm
963vror_vx 010100 . ..... ..... 100 ..... 1010111 @r_vm
964vror_vi 01010. . ..... ..... 011 ..... 1010111 @r2_zimm6
965vbrev8_v 010010 . ..... 01000 010 ..... 1010111 @r2_vm
966vrev8_v 010010 . ..... 01001 010 ..... 1010111 @r2_vm
967vandn_vv 000001 . ..... ..... 000 ..... 1010111 @r_vm
968vandn_vx 000001 . ..... ..... 100 ..... 1010111 @r_vm
969vbrev_v 010010 . ..... 01010 010 ..... 1010111 @r2_vm
970vclz_v 010010 . ..... 01100 010 ..... 1010111 @r2_vm
971vctz_v 010010 . ..... 01101 010 ..... 1010111 @r2_vm
972vcpop_v 010010 . ..... 01110 010 ..... 1010111 @r2_vm
973vwsll_vv 110101 . ..... ..... 000 ..... 1010111 @r_vm
974vwsll_vx 110101 . ..... ..... 100 ..... 1010111 @r_vm
975vwsll_vi 110101 . ..... ..... 011 ..... 1010111 @r_vm
976
977# *** Zvkned vector crypto extension ***
978vaesef_vv 101000 1 ..... 00011 010 ..... 1110111 @r2_vm_1
979vaesef_vs 101001 1 ..... 00011 010 ..... 1110111 @r2_vm_1
980vaesdf_vv 101000 1 ..... 00001 010 ..... 1110111 @r2_vm_1
981vaesdf_vs 101001 1 ..... 00001 010 ..... 1110111 @r2_vm_1
982vaesem_vv 101000 1 ..... 00010 010 ..... 1110111 @r2_vm_1
983vaesem_vs 101001 1 ..... 00010 010 ..... 1110111 @r2_vm_1
984vaesdm_vv 101000 1 ..... 00000 010 ..... 1110111 @r2_vm_1
985vaesdm_vs 101001 1 ..... 00000 010 ..... 1110111 @r2_vm_1
986vaesz_vs 101001 1 ..... 00111 010 ..... 1110111 @r2_vm_1
987vaeskf1_vi 100010 1 ..... ..... 010 ..... 1110111 @r_vm_1
988vaeskf2_vi 101010 1 ..... ..... 010 ..... 1110111 @r_vm_1
989
990# *** Zvknh vector crypto extension ***
991vsha2ms_vv 101101 1 ..... ..... 010 ..... 1110111 @r_vm_1
992vsha2ch_vv 101110 1 ..... ..... 010 ..... 1110111 @r_vm_1
993vsha2cl_vv 101111 1 ..... ..... 010 ..... 1110111 @r_vm_1
994
995# *** Zvksh vector crypto extension ***
996vsm3me_vv 100000 1 ..... ..... 010 ..... 1110111 @r_vm_1
997vsm3c_vi 101011 1 ..... ..... 010 ..... 1110111 @r_vm_1
998
999# *** Zvkg vector crypto extension ***
1000vghsh_vv 101100 1 ..... ..... 010 ..... 1110111 @r_vm_1
1001vgmul_vv 101000 1 ..... 10001 010 ..... 1110111 @r2_vm_1
1002
1003# *** Zvksed vector crypto extension ***
1004vsm4k_vi 100001 1 ..... ..... 010 ..... 1110111 @r_vm_1
1005vsm4r_vv 101000 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1006vsm4r_vs 101001 1 ..... 10000 010 ..... 1110111 @r2_vm_1
1007
1008# *** RV32 Zacas Standard Extension ***
1009amocas_w 00101 . . ..... ..... 010 ..... 0101111 @atom_st
1010amocas_d 00101 . . ..... ..... 011 ..... 0101111 @atom_st
1011# *** RV64 Zacas Standard Extension ***
1012amocas_q 00101 . . ..... ..... 100 ..... 0101111 @atom_st