]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * PowerPC emulation helpers header for qemu. | |
3 | * | |
4 | * Copyright (c) 2003-2007 Jocelyn Mayer | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #if defined(MEMSUFFIX) | |
22 | ||
23 | /* Memory load/store helpers */ | |
24 | void glue(do_lsw, MEMSUFFIX) (int dst); | |
25 | void glue(do_lsw_le, MEMSUFFIX) (int dst); | |
26 | void glue(do_stsw, MEMSUFFIX) (int src); | |
27 | void glue(do_stsw_le, MEMSUFFIX) (int src); | |
28 | void glue(do_lmw, MEMSUFFIX) (int dst); | |
29 | void glue(do_lmw_le, MEMSUFFIX) (int dst); | |
30 | void glue(do_stmw, MEMSUFFIX) (int src); | |
31 | void glue(do_stmw_le, MEMSUFFIX) (int src); | |
32 | void glue(do_icbi, MEMSUFFIX) (void); | |
33 | void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb); | |
34 | void glue(do_POWER2_lfq, MEMSUFFIX) (void); | |
35 | void glue(do_POWER2_lfq_le, MEMSUFFIX) (void); | |
36 | void glue(do_POWER2_stfq, MEMSUFFIX) (void); | |
37 | void glue(do_POWER2_stfq_le, MEMSUFFIX) (void); | |
38 | ||
39 | #if defined(TARGET_PPC64) | |
40 | void glue(do_lsw_64, MEMSUFFIX) (int dst); | |
41 | void glue(do_lsw_le_64, MEMSUFFIX) (int dst); | |
42 | void glue(do_stsw_64, MEMSUFFIX) (int src); | |
43 | void glue(do_stsw_le_64, MEMSUFFIX) (int src); | |
44 | void glue(do_lmw_64, MEMSUFFIX) (int dst); | |
45 | void glue(do_lmw_le_64, MEMSUFFIX) (int dst); | |
46 | void glue(do_stmw_64, MEMSUFFIX) (int src); | |
47 | void glue(do_stmw_le_64, MEMSUFFIX) (int src); | |
48 | void glue(do_icbi_64, MEMSUFFIX) (void); | |
49 | #endif | |
50 | ||
51 | #else | |
52 | ||
53 | /* Registers load and stores */ | |
54 | void do_load_cr (void); | |
55 | void do_store_cr (uint32_t mask); | |
56 | void do_load_xer (void); | |
57 | void do_store_xer (void); | |
58 | void do_load_fpscr (void); | |
59 | void do_store_fpscr (uint32_t mask); | |
60 | ||
61 | /* Integer arithmetic helpers */ | |
62 | void do_adde (void); | |
63 | void do_addmeo (void); | |
64 | void do_divwo (void); | |
65 | void do_divwuo (void); | |
66 | void do_mullwo (void); | |
67 | void do_nego (void); | |
68 | void do_subfe (void); | |
69 | void do_subfmeo (void); | |
70 | void do_subfzeo (void); | |
71 | void do_sraw (void); | |
72 | #if defined(TARGET_PPC64) | |
73 | void do_adde_64 (void); | |
74 | void do_addmeo_64 (void); | |
75 | void do_imul64 (uint64_t *tl, uint64_t *th); | |
76 | void do_mul64 (uint64_t *tl, uint64_t *th); | |
77 | void do_divdo (void); | |
78 | void do_divduo (void); | |
79 | void do_mulldo (void); | |
80 | void do_nego_64 (void); | |
81 | void do_subfe_64 (void); | |
82 | void do_subfmeo_64 (void); | |
83 | void do_subfzeo_64 (void); | |
84 | void do_srad (void); | |
85 | #endif | |
86 | void do_popcntb (void); | |
87 | #if defined(TARGET_PPC64) | |
88 | void do_popcntb_64 (void); | |
89 | #endif | |
90 | ||
91 | /* Floating-point arithmetic helpers */ | |
92 | void do_fsqrt (void); | |
93 | void do_fres (void); | |
94 | void do_frsqrte (void); | |
95 | void do_fsel (void); | |
96 | #if USE_PRECISE_EMULATION | |
97 | void do_fmadd (void); | |
98 | void do_fmsub (void); | |
99 | #endif | |
100 | void do_fnmadd (void); | |
101 | void do_fnmsub (void); | |
102 | void do_fctiw (void); | |
103 | void do_fctiwz (void); | |
104 | #if defined(TARGET_PPC64) | |
105 | void do_fcfid (void); | |
106 | void do_fctid (void); | |
107 | void do_fctidz (void); | |
108 | #endif | |
109 | void do_fcmpu (void); | |
110 | void do_fcmpo (void); | |
111 | ||
112 | /* Misc */ | |
113 | void do_tw (int flags); | |
114 | #if defined(TARGET_PPC64) | |
115 | void do_td (int flags); | |
116 | #endif | |
117 | #if !defined(CONFIG_USER_ONLY) | |
118 | void do_rfi (void); | |
119 | #if defined(TARGET_PPC64) | |
120 | void do_rfid (void); | |
121 | #endif | |
122 | void do_tlbia (void); | |
123 | void do_tlbie (void); | |
124 | #if defined(TARGET_PPC64) | |
125 | void do_tlbie_64 (void); | |
126 | #endif | |
127 | void do_load_6xx_tlb (int is_code); | |
128 | #if defined(TARGET_PPC64) | |
129 | void do_slbia (void); | |
130 | void do_slbie (void); | |
131 | #endif | |
132 | #endif | |
133 | ||
134 | /* POWER / PowerPC 601 specific helpers */ | |
135 | void do_store_601_batu (int nr); | |
136 | void do_POWER_abso (void); | |
137 | void do_POWER_clcs (void); | |
138 | void do_POWER_div (void); | |
139 | void do_POWER_divo (void); | |
140 | void do_POWER_divs (void); | |
141 | void do_POWER_divso (void); | |
142 | void do_POWER_dozo (void); | |
143 | void do_POWER_maskg (void); | |
144 | void do_POWER_mulo (void); | |
145 | #if !defined(CONFIG_USER_ONLY) | |
146 | void do_POWER_rac (void); | |
147 | void do_POWER_rfsvc (void); | |
148 | #endif | |
149 | ||
150 | /* PowerPC 602 specific helper */ | |
151 | #if !defined(CONFIG_USER_ONLY) | |
152 | void do_op_602_mfrom (void); | |
153 | #endif | |
154 | ||
155 | /* PowerPC 4xx specific helpers */ | |
156 | void do_405_check_ov (void); | |
157 | void do_405_check_sat (void); | |
158 | #if !defined(CONFIG_USER_ONLY) | |
159 | void do_load_dcr (void); | |
160 | void do_store_dcr (void); | |
161 | void do_40x_rfci (void); | |
162 | void do_rfci (void); | |
163 | void do_rfdi (void); | |
164 | void do_rfmci (void); | |
165 | void do_4xx_tlbre_lo (void); | |
166 | void do_4xx_tlbre_hi (void); | |
167 | void do_4xx_tlbsx (void); | |
168 | void do_4xx_tlbsx_ (void); | |
169 | void do_4xx_tlbwe_lo (void); | |
170 | void do_4xx_tlbwe_hi (void); | |
171 | #endif | |
172 | ||
173 | /* PowerPC 440 specific helpers */ | |
174 | void do_440_dlmzb (void); | |
175 | ||
176 | /* PowerPC 403 specific helpers */ | |
177 | #if !defined(CONFIG_USER_ONLY) | |
178 | void do_load_403_pb (int num); | |
179 | void do_store_403_pb (int num); | |
180 | #endif | |
181 | ||
182 | #if defined(TARGET_PPCSPE) | |
183 | /* SPE extension helpers */ | |
184 | void do_brinc (void); | |
185 | /* Fixed-point vector helpers */ | |
186 | void do_evabs (void); | |
187 | void do_evaddw (void); | |
188 | void do_evcntlsw (void); | |
189 | void do_evcntlzw (void); | |
190 | void do_evneg (void); | |
191 | void do_evrlw (void); | |
192 | void do_evsel (void); | |
193 | void do_evrndw (void); | |
194 | void do_evslw (void); | |
195 | void do_evsrws (void); | |
196 | void do_evsrwu (void); | |
197 | void do_evsubfw (void); | |
198 | void do_evcmpeq (void); | |
199 | void do_evcmpgts (void); | |
200 | void do_evcmpgtu (void); | |
201 | void do_evcmplts (void); | |
202 | void do_evcmpltu (void); | |
203 | ||
204 | /* Single precision floating-point helpers */ | |
205 | void do_efscmplt (void); | |
206 | void do_efscmpgt (void); | |
207 | void do_efscmpeq (void); | |
208 | void do_efscfsf (void); | |
209 | void do_efscfuf (void); | |
210 | void do_efsctsf (void); | |
211 | void do_efsctuf (void); | |
212 | ||
213 | void do_efscfsi (void); | |
214 | void do_efscfui (void); | |
215 | void do_efsctsi (void); | |
216 | void do_efsctui (void); | |
217 | void do_efsctsiz (void); | |
218 | void do_efsctuiz (void); | |
219 | ||
220 | /* Double precision floating-point helpers */ | |
221 | void do_efdcmplt (void); | |
222 | void do_efdcmpgt (void); | |
223 | void do_efdcmpeq (void); | |
224 | void do_efdcfsf (void); | |
225 | void do_efdcfuf (void); | |
226 | void do_efdctsf (void); | |
227 | void do_efdctuf (void); | |
228 | ||
229 | void do_efdcfsi (void); | |
230 | void do_efdcfui (void); | |
231 | void do_efdctsi (void); | |
232 | void do_efdctui (void); | |
233 | void do_efdctsiz (void); | |
234 | void do_efdctuiz (void); | |
235 | ||
236 | void do_efdcfs (void); | |
237 | void do_efscfd (void); | |
238 | ||
239 | /* Floating-point vector helpers */ | |
240 | void do_evfsabs (void); | |
241 | void do_evfsnabs (void); | |
242 | void do_evfsneg (void); | |
243 | void do_evfsadd (void); | |
244 | void do_evfssub (void); | |
245 | void do_evfsmul (void); | |
246 | void do_evfsdiv (void); | |
247 | void do_evfscmplt (void); | |
248 | void do_evfscmpgt (void); | |
249 | void do_evfscmpeq (void); | |
250 | void do_evfststlt (void); | |
251 | void do_evfststgt (void); | |
252 | void do_evfststeq (void); | |
253 | void do_evfscfsi (void); | |
254 | void do_evfscfui (void); | |
255 | void do_evfscfsf (void); | |
256 | void do_evfscfuf (void); | |
257 | void do_evfsctsf (void); | |
258 | void do_evfsctuf (void); | |
259 | void do_evfsctsi (void); | |
260 | void do_evfsctui (void); | |
261 | void do_evfsctsiz (void); | |
262 | void do_evfsctuiz (void); | |
263 | #endif /* defined(TARGET_PPCSPE) */ | |
264 | ||
265 | /* Inlined helpers: used in micro-operation as well as helpers */ | |
266 | /* Generic fixed-point helpers */ | |
267 | static inline int _do_cntlzw (uint32_t val) | |
268 | { | |
269 | int cnt = 0; | |
270 | if (!(val & 0xFFFF0000UL)) { | |
271 | cnt += 16; | |
272 | val <<= 16; | |
273 | } | |
274 | if (!(val & 0xFF000000UL)) { | |
275 | cnt += 8; | |
276 | val <<= 8; | |
277 | } | |
278 | if (!(val & 0xF0000000UL)) { | |
279 | cnt += 4; | |
280 | val <<= 4; | |
281 | } | |
282 | if (!(val & 0xC0000000UL)) { | |
283 | cnt += 2; | |
284 | val <<= 2; | |
285 | } | |
286 | if (!(val & 0x80000000UL)) { | |
287 | cnt++; | |
288 | val <<= 1; | |
289 | } | |
290 | if (!(val & 0x80000000UL)) { | |
291 | cnt++; | |
292 | } | |
293 | return cnt; | |
294 | } | |
295 | ||
296 | static inline int _do_cntlzd (uint64_t val) | |
297 | { | |
298 | int cnt = 0; | |
299 | #if HOST_LONG_BITS == 64 | |
300 | if (!(val & 0xFFFFFFFF00000000ULL)) { | |
301 | cnt += 32; | |
302 | val <<= 32; | |
303 | } | |
304 | if (!(val & 0xFFFF000000000000ULL)) { | |
305 | cnt += 16; | |
306 | val <<= 16; | |
307 | } | |
308 | if (!(val & 0xFF00000000000000ULL)) { | |
309 | cnt += 8; | |
310 | val <<= 8; | |
311 | } | |
312 | if (!(val & 0xF000000000000000ULL)) { | |
313 | cnt += 4; | |
314 | val <<= 4; | |
315 | } | |
316 | if (!(val & 0xC000000000000000ULL)) { | |
317 | cnt += 2; | |
318 | val <<= 2; | |
319 | } | |
320 | if (!(val & 0x8000000000000000ULL)) { | |
321 | cnt++; | |
322 | val <<= 1; | |
323 | } | |
324 | if (!(val & 0x8000000000000000ULL)) { | |
325 | cnt++; | |
326 | } | |
327 | #else | |
328 | /* Make it easier on 32 bits host machines */ | |
329 | if (!(val >> 32)) | |
330 | cnt = _do_cntlzw(val) + 32; | |
331 | else | |
332 | cnt = _do_cntlzw(val >> 32); | |
333 | #endif | |
334 | return cnt; | |
335 | } | |
336 | ||
337 | #if defined(TARGET_PPCSPE) | |
338 | /* SPE extension */ | |
339 | /* Single precision floating-point helpers */ | |
340 | static inline uint32_t _do_efsabs (uint32_t val) | |
341 | { | |
342 | return val & ~0x80000000; | |
343 | } | |
344 | static inline uint32_t _do_efsnabs (uint32_t val) | |
345 | { | |
346 | return val | 0x80000000; | |
347 | } | |
348 | static inline uint32_t _do_efsneg (uint32_t val) | |
349 | { | |
350 | return val ^ 0x80000000; | |
351 | } | |
352 | static inline uint32_t _do_efsadd (uint32_t op1, uint32_t op2) | |
353 | { | |
354 | union { | |
355 | uint32_t u; | |
356 | float32 f; | |
357 | } u1, u2; | |
358 | u1.u = op1; | |
359 | u2.u = op2; | |
360 | u1.f = float32_add(u1.f, u2.f, &env->spe_status); | |
361 | return u1.u; | |
362 | } | |
363 | static inline uint32_t _do_efssub (uint32_t op1, uint32_t op2) | |
364 | { | |
365 | union { | |
366 | uint32_t u; | |
367 | float32 f; | |
368 | } u1, u2; | |
369 | u1.u = op1; | |
370 | u2.u = op2; | |
371 | u1.f = float32_sub(u1.f, u2.f, &env->spe_status); | |
372 | return u1.u; | |
373 | } | |
374 | static inline uint32_t _do_efsmul (uint32_t op1, uint32_t op2) | |
375 | { | |
376 | union { | |
377 | uint32_t u; | |
378 | float32 f; | |
379 | } u1, u2; | |
380 | u1.u = op1; | |
381 | u2.u = op2; | |
382 | u1.f = float32_mul(u1.f, u2.f, &env->spe_status); | |
383 | return u1.u; | |
384 | } | |
385 | static inline uint32_t _do_efsdiv (uint32_t op1, uint32_t op2) | |
386 | { | |
387 | union { | |
388 | uint32_t u; | |
389 | float32 f; | |
390 | } u1, u2; | |
391 | u1.u = op1; | |
392 | u2.u = op2; | |
393 | u1.f = float32_div(u1.f, u2.f, &env->spe_status); | |
394 | return u1.u; | |
395 | } | |
396 | ||
397 | static inline int _do_efststlt (uint32_t op1, uint32_t op2) | |
398 | { | |
399 | union { | |
400 | uint32_t u; | |
401 | float32 f; | |
402 | } u1, u2; | |
403 | u1.u = op1; | |
404 | u2.u = op2; | |
405 | return float32_lt(u1.f, u2.f, &env->spe_status) ? 1 : 0; | |
406 | } | |
407 | static inline int _do_efststgt (uint32_t op1, uint32_t op2) | |
408 | { | |
409 | union { | |
410 | uint32_t u; | |
411 | float32 f; | |
412 | } u1, u2; | |
413 | u1.u = op1; | |
414 | u2.u = op2; | |
415 | return float32_le(u1.f, u2.f, &env->spe_status) ? 0 : 1; | |
416 | } | |
417 | static inline int _do_efststeq (uint32_t op1, uint32_t op2) | |
418 | { | |
419 | union { | |
420 | uint32_t u; | |
421 | float32 f; | |
422 | } u1, u2; | |
423 | u1.u = op1; | |
424 | u2.u = op2; | |
425 | return float32_eq(u1.f, u2.f, &env->spe_status) ? 1 : 0; | |
426 | } | |
427 | /* Double precision floating-point helpers */ | |
428 | static inline int _do_efdtstlt (uint64_t op1, uint64_t op2) | |
429 | { | |
430 | union { | |
431 | uint64_t u; | |
432 | float64 f; | |
433 | } u1, u2; | |
434 | u1.u = op1; | |
435 | u2.u = op2; | |
436 | return float64_lt(u1.f, u2.f, &env->spe_status) ? 1 : 0; | |
437 | } | |
438 | static inline int _do_efdtstgt (uint64_t op1, uint64_t op2) | |
439 | { | |
440 | union { | |
441 | uint64_t u; | |
442 | float64 f; | |
443 | } u1, u2; | |
444 | u1.u = op1; | |
445 | u2.u = op2; | |
446 | return float64_le(u1.f, u2.f, &env->spe_status) ? 0 : 1; | |
447 | } | |
448 | static inline int _do_efdtsteq (uint64_t op1, uint64_t op2) | |
449 | { | |
450 | union { | |
451 | uint64_t u; | |
452 | float64 f; | |
453 | } u1, u2; | |
454 | u1.u = op1; | |
455 | u2.u = op2; | |
456 | return float64_eq(u1.f, u2.f, &env->spe_status) ? 1 : 0; | |
457 | } | |
458 | #endif /* defined(TARGET_PPCSPE) */ | |
459 | #endif |