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1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25#include "tcg.h"
26#include "exec/helper-proto.h"
27#include "exec/helper-gen.h"
28
29/* Basic output routines. Not for general consumption. */
30
31void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg);
32void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg);
33void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg);
34void tcg_gen_op4(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
35void tcg_gen_op5(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
36 TCGArg, TCGArg);
37void tcg_gen_op6(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
38 TCGArg, TCGArg, TCGArg);
39
40
41static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
42{
43 tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I32(a1));
44}
45
46static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
47{
48 tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I64(a1));
49}
50
51static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
52{
53 tcg_gen_op1(&tcg_ctx, opc, a1);
54}
55
56static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
57{
58 tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2));
59}
60
61static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
62{
63 tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2));
64}
65
66static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
67{
68 tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), a2);
69}
70
71static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
72{
73 tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), a2);
74}
75
76static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
77{
78 tcg_gen_op2(&tcg_ctx, opc, a1, a2);
79}
80
81static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
82 TCGv_i32 a2, TCGv_i32 a3)
83{
84 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1),
85 GET_TCGV_I32(a2), GET_TCGV_I32(a3));
86}
87
88static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
89 TCGv_i64 a2, TCGv_i64 a3)
90{
91 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1),
92 GET_TCGV_I64(a2), GET_TCGV_I64(a3));
93}
94
95static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
96 TCGv_i32 a2, TCGArg a3)
97{
98 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3);
99}
100
101static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
102 TCGv_i64 a2, TCGArg a3)
103{
104 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3);
105}
106
107static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
108 TCGv_ptr base, TCGArg offset)
109{
110 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset);
111}
112
113static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
114 TCGv_ptr base, TCGArg offset)
115{
116 tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset);
117}
118
119static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
120 TCGv_i32 a3, TCGv_i32 a4)
121{
122 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
123 GET_TCGV_I32(a3), GET_TCGV_I32(a4));
124}
125
126static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
127 TCGv_i64 a3, TCGv_i64 a4)
128{
129 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
130 GET_TCGV_I64(a3), GET_TCGV_I64(a4));
131}
132
133static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
134 TCGv_i32 a3, TCGArg a4)
135{
136 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
137 GET_TCGV_I32(a3), a4);
138}
139
140static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
141 TCGv_i64 a3, TCGArg a4)
142{
143 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
144 GET_TCGV_I64(a3), a4);
145}
146
147static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
148 TCGArg a3, TCGArg a4)
149{
150 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4);
151}
152
153static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
154 TCGArg a3, TCGArg a4)
155{
156 tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4);
157}
158
159static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
160 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
161{
162 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
163 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5));
164}
165
166static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
167 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
168{
169 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
170 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5));
171}
172
173static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
174 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
175{
176 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
177 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5);
178}
179
180static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
181 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
182{
183 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
184 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5);
185}
186
187static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
188 TCGv_i32 a3, TCGArg a4, TCGArg a5)
189{
190 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
191 GET_TCGV_I32(a3), a4, a5);
192}
193
194static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
195 TCGv_i64 a3, TCGArg a4, TCGArg a5)
196{
197 tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
198 GET_TCGV_I64(a3), a4, a5);
199}
200
201static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
202 TCGv_i32 a3, TCGv_i32 a4,
203 TCGv_i32 a5, TCGv_i32 a6)
204{
205 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
206 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5),
207 GET_TCGV_I32(a6));
208}
209
210static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
211 TCGv_i64 a3, TCGv_i64 a4,
212 TCGv_i64 a5, TCGv_i64 a6)
213{
214 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
215 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5),
216 GET_TCGV_I64(a6));
217}
218
219static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
220 TCGv_i32 a3, TCGv_i32 a4,
221 TCGv_i32 a5, TCGArg a6)
222{
223 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
224 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6);
225}
226
227static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
228 TCGv_i64 a3, TCGv_i64 a4,
229 TCGv_i64 a5, TCGArg a6)
230{
231 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
232 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6);
233}
234
235static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
236 TCGv_i32 a3, TCGv_i32 a4,
237 TCGArg a5, TCGArg a6)
238{
239 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
240 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6);
241}
242
243static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
244 TCGv_i64 a3, TCGv_i64 a4,
245 TCGArg a5, TCGArg a6)
246{
247 tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
248 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6);
249}
250
251
252/* Generic ops. */
253
254static inline void gen_set_label(TCGLabel *l)
255{
256 tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, label_arg(l));
257}
258
259static inline void tcg_gen_br(TCGLabel *l)
260{
261 tcg_gen_op1(&tcg_ctx, INDEX_op_br, label_arg(l));
262}
263
264/* Helper calls. */
265
266/* 32 bit ops */
267
268void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
269void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
270void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
271void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
272void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
273void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
274void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
275void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
276void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
277void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
279void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
280void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
281void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
282void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
283void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
284void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
285void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
289void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
291void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
292 unsigned int ofs, unsigned int len);
293void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
294void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
295void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
296 TCGv_i32 arg1, TCGv_i32 arg2);
297void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
298 TCGv_i32 arg1, int32_t arg2);
299void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
300 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
301void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
302 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
303void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
304 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
305void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
306void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
307void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
308void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
309void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
310void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
311void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
312void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
313
314static inline void tcg_gen_discard_i32(TCGv_i32 arg)
315{
316 tcg_gen_op1_i32(INDEX_op_discard, arg);
317}
318
319static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
320{
321 if (!TCGV_EQUAL_I32(ret, arg)) {
322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
323 }
324}
325
326static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
327{
328 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
329}
330
331static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
332 tcg_target_long offset)
333{
334 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
335}
336
337static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
338 tcg_target_long offset)
339{
340 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
341}
342
343static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
344 tcg_target_long offset)
345{
346 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
347}
348
349static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
350 tcg_target_long offset)
351{
352 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
353}
354
355static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
356 tcg_target_long offset)
357{
358 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
359}
360
361static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
362 tcg_target_long offset)
363{
364 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
365}
366
367static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
368 tcg_target_long offset)
369{
370 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
371}
372
373static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
374 tcg_target_long offset)
375{
376 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
377}
378
379static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
380{
381 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
382}
383
384static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
385{
386 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
387}
388
389static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
390{
391 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
392}
393
394static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
395{
396 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
397}
398
399static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
400{
401 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
402}
403
404static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
405{
406 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
407}
408
409static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
410{
411 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
412}
413
414static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
415{
416 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
417}
418
419static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
420{
421 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
422}
423
424static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
425{
426 if (TCG_TARGET_HAS_neg_i32) {
427 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
428 } else {
429 tcg_gen_subfi_i32(ret, 0, arg);
430 }
431}
432
433static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
434{
435 if (TCG_TARGET_HAS_not_i32) {
436 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
437 } else {
438 tcg_gen_xori_i32(ret, arg, -1);
439 }
440}
441
442/* 64 bit ops */
443
444void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
445void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
446void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
447void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
448void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
449void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
450void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
451void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
452void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
453void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
454void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
455void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
456void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
457void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
458void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
459void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
460void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
461void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
462void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
463void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
464void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
465void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
466void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
467void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
468 unsigned int ofs, unsigned int len);
469void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
470void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
471void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
472 TCGv_i64 arg1, TCGv_i64 arg2);
473void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
474 TCGv_i64 arg1, int64_t arg2);
475void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
476 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
477void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
478 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
479void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
480 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
481void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
482void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
483void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
484void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
485void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
486void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
487void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
488void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
489void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
490void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
491void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
492void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
493
494#if TCG_TARGET_REG_BITS == 64
495static inline void tcg_gen_discard_i64(TCGv_i64 arg)
496{
497 tcg_gen_op1_i64(INDEX_op_discard, arg);
498}
499
500static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
501{
502 if (!TCGV_EQUAL_I64(ret, arg)) {
503 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
504 }
505}
506
507static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
508{
509 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
510}
511
512static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
513 tcg_target_long offset)
514{
515 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
516}
517
518static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
519 tcg_target_long offset)
520{
521 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
522}
523
524static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
525 tcg_target_long offset)
526{
527 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
528}
529
530static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
531 tcg_target_long offset)
532{
533 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
534}
535
536static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
537 tcg_target_long offset)
538{
539 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
540}
541
542static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
543 tcg_target_long offset)
544{
545 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
546}
547
548static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
549 tcg_target_long offset)
550{
551 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
552}
553
554static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
555 tcg_target_long offset)
556{
557 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
558}
559
560static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
561 tcg_target_long offset)
562{
563 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
564}
565
566static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
567 tcg_target_long offset)
568{
569 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
570}
571
572static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
573 tcg_target_long offset)
574{
575 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
576}
577
578static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
579{
580 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
581}
582
583static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
584{
585 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
586}
587
588static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
589{
590 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
591}
592
593static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
594{
595 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
596}
597
598static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
599{
600 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
601}
602
603static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
604{
605 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
606}
607
608static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
609{
610 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
611}
612
613static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
614{
615 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
616}
617
618static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
619{
620 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
621}
622#else /* TCG_TARGET_REG_BITS == 32 */
623static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
624 tcg_target_long offset)
625{
626 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
627}
628
629static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
630 tcg_target_long offset)
631{
632 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
633}
634
635static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
636 tcg_target_long offset)
637{
638 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
639}
640
641static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
642{
643 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
644 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
645}
646
647static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
648{
649 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
650 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
651}
652
653void tcg_gen_discard_i64(TCGv_i64 arg);
654void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
655void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
656void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
657void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
658void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
659void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
660void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
661void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
662void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
663void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
664void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
665void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
666void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
667void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
668void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
669void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
670void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
671#endif /* TCG_TARGET_REG_BITS */
672
673static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
674{
675 if (TCG_TARGET_HAS_neg_i64) {
676 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
677 } else {
678 tcg_gen_subfi_i64(ret, 0, arg);
679 }
680}
681
682/* Size changing operations. */
683
684void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
685void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
686void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
687void tcg_gen_trunc_shr_i64_i32(TCGv_i32 ret, TCGv_i64 arg, unsigned int c);
688void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
689void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
690
691static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
692{
693 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
694}
695
696static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
697{
698 tcg_gen_trunc_shr_i64_i32(ret, arg, 0);
699}
700
701/* QEMU specific operations. */
702
703#ifndef TARGET_LONG_BITS
704#error must include QEMU headers
705#endif
706
707/* debug info: write the PC of the corresponding QEMU CPU instruction */
708static inline void tcg_gen_debug_insn_start(uint64_t pc)
709{
710 /* XXX: must really use a 32 bit size for TCGArg in all cases */
711#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
712 tcg_gen_op2ii(INDEX_op_debug_insn_start,
713 (uint32_t)(pc), (uint32_t)(pc >> 32));
714#else
715 tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
716#endif
717}
718
719static inline void tcg_gen_exit_tb(uintptr_t val)
720{
721 tcg_gen_op1i(INDEX_op_exit_tb, val);
722}
723
724void tcg_gen_goto_tb(unsigned idx);
725
726#if TARGET_LONG_BITS == 32
727#define TCGv TCGv_i32
728#define tcg_temp_new() tcg_temp_new_i32()
729#define tcg_global_reg_new tcg_global_reg_new_i32
730#define tcg_global_mem_new tcg_global_mem_new_i32
731#define tcg_temp_local_new() tcg_temp_local_new_i32()
732#define tcg_temp_free tcg_temp_free_i32
733#define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
734#define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I32(x)
735#define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
736#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
737#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
738#else
739#define TCGv TCGv_i64
740#define tcg_temp_new() tcg_temp_new_i64()
741#define tcg_global_reg_new tcg_global_reg_new_i64
742#define tcg_global_mem_new tcg_global_mem_new_i64
743#define tcg_temp_local_new() tcg_temp_local_new_i64()
744#define tcg_temp_free tcg_temp_free_i64
745#define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
746#define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I64(x)
747#define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
748#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
749#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
750#endif
751
752void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
753void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
754void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
755void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
756
757static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
758{
759 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
760}
761
762static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
763{
764 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
765}
766
767static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
768{
769 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
770}
771
772static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
773{
774 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
775}
776
777static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
778{
779 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
780}
781
782static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
783{
784 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
785}
786
787static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
788{
789 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
790}
791
792static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
793{
794 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
795}
796
797static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
798{
799 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
800}
801
802static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
803{
804 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
805}
806
807static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
808{
809 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
810}
811
812#if TARGET_LONG_BITS == 64
813#define tcg_gen_movi_tl tcg_gen_movi_i64
814#define tcg_gen_mov_tl tcg_gen_mov_i64
815#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
816#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
817#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
818#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
819#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
820#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
821#define tcg_gen_ld_tl tcg_gen_ld_i64
822#define tcg_gen_st8_tl tcg_gen_st8_i64
823#define tcg_gen_st16_tl tcg_gen_st16_i64
824#define tcg_gen_st32_tl tcg_gen_st32_i64
825#define tcg_gen_st_tl tcg_gen_st_i64
826#define tcg_gen_add_tl tcg_gen_add_i64
827#define tcg_gen_addi_tl tcg_gen_addi_i64
828#define tcg_gen_sub_tl tcg_gen_sub_i64
829#define tcg_gen_neg_tl tcg_gen_neg_i64
830#define tcg_gen_subfi_tl tcg_gen_subfi_i64
831#define tcg_gen_subi_tl tcg_gen_subi_i64
832#define tcg_gen_and_tl tcg_gen_and_i64
833#define tcg_gen_andi_tl tcg_gen_andi_i64
834#define tcg_gen_or_tl tcg_gen_or_i64
835#define tcg_gen_ori_tl tcg_gen_ori_i64
836#define tcg_gen_xor_tl tcg_gen_xor_i64
837#define tcg_gen_xori_tl tcg_gen_xori_i64
838#define tcg_gen_not_tl tcg_gen_not_i64
839#define tcg_gen_shl_tl tcg_gen_shl_i64
840#define tcg_gen_shli_tl tcg_gen_shli_i64
841#define tcg_gen_shr_tl tcg_gen_shr_i64
842#define tcg_gen_shri_tl tcg_gen_shri_i64
843#define tcg_gen_sar_tl tcg_gen_sar_i64
844#define tcg_gen_sari_tl tcg_gen_sari_i64
845#define tcg_gen_brcond_tl tcg_gen_brcond_i64
846#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
847#define tcg_gen_setcond_tl tcg_gen_setcond_i64
848#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
849#define tcg_gen_mul_tl tcg_gen_mul_i64
850#define tcg_gen_muli_tl tcg_gen_muli_i64
851#define tcg_gen_div_tl tcg_gen_div_i64
852#define tcg_gen_rem_tl tcg_gen_rem_i64
853#define tcg_gen_divu_tl tcg_gen_divu_i64
854#define tcg_gen_remu_tl tcg_gen_remu_i64
855#define tcg_gen_discard_tl tcg_gen_discard_i64
856#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
857#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
858#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
859#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
860#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
861#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
862#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
863#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
864#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
865#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
866#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
867#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
868#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
869#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
870#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
871#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
872#define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
873#define tcg_gen_andc_tl tcg_gen_andc_i64
874#define tcg_gen_eqv_tl tcg_gen_eqv_i64
875#define tcg_gen_nand_tl tcg_gen_nand_i64
876#define tcg_gen_nor_tl tcg_gen_nor_i64
877#define tcg_gen_orc_tl tcg_gen_orc_i64
878#define tcg_gen_rotl_tl tcg_gen_rotl_i64
879#define tcg_gen_rotli_tl tcg_gen_rotli_i64
880#define tcg_gen_rotr_tl tcg_gen_rotr_i64
881#define tcg_gen_rotri_tl tcg_gen_rotri_i64
882#define tcg_gen_deposit_tl tcg_gen_deposit_i64
883#define tcg_const_tl tcg_const_i64
884#define tcg_const_local_tl tcg_const_local_i64
885#define tcg_gen_movcond_tl tcg_gen_movcond_i64
886#define tcg_gen_add2_tl tcg_gen_add2_i64
887#define tcg_gen_sub2_tl tcg_gen_sub2_i64
888#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
889#define tcg_gen_muls2_tl tcg_gen_muls2_i64
890#else
891#define tcg_gen_movi_tl tcg_gen_movi_i32
892#define tcg_gen_mov_tl tcg_gen_mov_i32
893#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
894#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
895#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
896#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
897#define tcg_gen_ld32u_tl tcg_gen_ld_i32
898#define tcg_gen_ld32s_tl tcg_gen_ld_i32
899#define tcg_gen_ld_tl tcg_gen_ld_i32
900#define tcg_gen_st8_tl tcg_gen_st8_i32
901#define tcg_gen_st16_tl tcg_gen_st16_i32
902#define tcg_gen_st32_tl tcg_gen_st_i32
903#define tcg_gen_st_tl tcg_gen_st_i32
904#define tcg_gen_add_tl tcg_gen_add_i32
905#define tcg_gen_addi_tl tcg_gen_addi_i32
906#define tcg_gen_sub_tl tcg_gen_sub_i32
907#define tcg_gen_neg_tl tcg_gen_neg_i32
908#define tcg_gen_subfi_tl tcg_gen_subfi_i32
909#define tcg_gen_subi_tl tcg_gen_subi_i32
910#define tcg_gen_and_tl tcg_gen_and_i32
911#define tcg_gen_andi_tl tcg_gen_andi_i32
912#define tcg_gen_or_tl tcg_gen_or_i32
913#define tcg_gen_ori_tl tcg_gen_ori_i32
914#define tcg_gen_xor_tl tcg_gen_xor_i32
915#define tcg_gen_xori_tl tcg_gen_xori_i32
916#define tcg_gen_not_tl tcg_gen_not_i32
917#define tcg_gen_shl_tl tcg_gen_shl_i32
918#define tcg_gen_shli_tl tcg_gen_shli_i32
919#define tcg_gen_shr_tl tcg_gen_shr_i32
920#define tcg_gen_shri_tl tcg_gen_shri_i32
921#define tcg_gen_sar_tl tcg_gen_sar_i32
922#define tcg_gen_sari_tl tcg_gen_sari_i32
923#define tcg_gen_brcond_tl tcg_gen_brcond_i32
924#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
925#define tcg_gen_setcond_tl tcg_gen_setcond_i32
926#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
927#define tcg_gen_mul_tl tcg_gen_mul_i32
928#define tcg_gen_muli_tl tcg_gen_muli_i32
929#define tcg_gen_div_tl tcg_gen_div_i32
930#define tcg_gen_rem_tl tcg_gen_rem_i32
931#define tcg_gen_divu_tl tcg_gen_divu_i32
932#define tcg_gen_remu_tl tcg_gen_remu_i32
933#define tcg_gen_discard_tl tcg_gen_discard_i32
934#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
935#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
936#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
937#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
938#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
939#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
940#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
941#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
942#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
943#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
944#define tcg_gen_ext32u_tl tcg_gen_mov_i32
945#define tcg_gen_ext32s_tl tcg_gen_mov_i32
946#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
947#define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
948#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
949#define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
950#define tcg_gen_andc_tl tcg_gen_andc_i32
951#define tcg_gen_eqv_tl tcg_gen_eqv_i32
952#define tcg_gen_nand_tl tcg_gen_nand_i32
953#define tcg_gen_nor_tl tcg_gen_nor_i32
954#define tcg_gen_orc_tl tcg_gen_orc_i32
955#define tcg_gen_rotl_tl tcg_gen_rotl_i32
956#define tcg_gen_rotli_tl tcg_gen_rotli_i32
957#define tcg_gen_rotr_tl tcg_gen_rotr_i32
958#define tcg_gen_rotri_tl tcg_gen_rotri_i32
959#define tcg_gen_deposit_tl tcg_gen_deposit_i32
960#define tcg_const_tl tcg_const_i32
961#define tcg_const_local_tl tcg_const_local_i32
962#define tcg_gen_movcond_tl tcg_gen_movcond_i32
963#define tcg_gen_add2_tl tcg_gen_add2_i32
964#define tcg_gen_sub2_tl tcg_gen_sub2_i32
965#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
966#define tcg_gen_muls2_tl tcg_gen_muls2_i32
967#endif
968
969#if UINTPTR_MAX == UINT32_MAX
970# define tcg_gen_ld_ptr(R, A, O) \
971 tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
972# define tcg_gen_discard_ptr(A) \
973 tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
974# define tcg_gen_add_ptr(R, A, B) \
975 tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
976# define tcg_gen_addi_ptr(R, A, B) \
977 tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
978# define tcg_gen_ext_i32_ptr(R, A) \
979 tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
980#else
981# define tcg_gen_ld_ptr(R, A, O) \
982 tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
983# define tcg_gen_discard_ptr(A) \
984 tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
985# define tcg_gen_add_ptr(R, A, B) \
986 tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
987# define tcg_gen_addi_ptr(R, A, B) \
988 tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
989# define tcg_gen_ext_i32_ptr(R, A) \
990 tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
991#endif /* UINTPTR_MAX == UINT32_MAX */
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