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1 Atmel AT91 device tree bindings.
2 ================================
3
4 PIT Timer required properties:
5 - compatible: Should be "atmel,at91sam9260-pit"
6 - reg: Should contain registers location and length
7 - interrupts: Should contain interrupt for the PIT which is the IRQ line
8 shared across all System Controller members.
9
10 System Timer (ST) required properties:
11 - compatible: Should be "atmel,at91rm9200-st"
12 - reg: Should contain registers location and length
13 - interrupts: Should contain interrupt for the ST which is the IRQ line
14 shared across all System Controller members.
15
16 TC/TCLIB Timer required properties:
17 - compatible: Should be "atmel,<chip>-tcb".
18 <chip> can be "at91rm9200" or "at91sam9x5"
19 - reg: Should contain registers location and length
20 - interrupts: Should contain all interrupts for the TC block
21 Note that you can specify several interrupt cells if the TC
22 block has one interrupt per channel.
23 - clock-names: tuple listing input clock names.
24 Required elements: "t0_clk"
25 Optional elements: "t1_clk", "t2_clk"
26 - clocks: phandles to input clocks.
27
28 Examples:
29
30 One interrupt per TC block:
31 tcb0: timer@fff7c000 {
32 compatible = "atmel,at91rm9200-tcb";
33 reg = <0xfff7c000 0x100>;
34 interrupts = <18 4>;
35 clocks = <&tcb0_clk>;
36 clock-names = "t0_clk";
37 };
38
39 One interrupt per TC channel in a TC block:
40 tcb1: timer@fffdc000 {
41 compatible = "atmel,at91rm9200-tcb";
42 reg = <0xfffdc000 0x100>;
43 interrupts = <26 4 27 4 28 4>;
44 clocks = <&tcb1_clk>;
45 clock-names = "t0_clk";
46 };
47
48 RSTC Reset Controller required properties:
49 - compatible: Should be "atmel,<chip>-rstc".
50 <chip> can be "at91sam9260" or "at91sam9g45"
51 - reg: Should contain registers location and length
52
53 Example:
54
55 rstc@fffffd00 {
56 compatible = "atmel,at91sam9260-rstc";
57 reg = <0xfffffd00 0x10>;
58 };
59
60 RAMC SDRAM/DDR Controller required properties:
61 - compatible: Should be "atmel,at91rm9200-sdramc",
62 "atmel,at91sam9260-sdramc",
63 "atmel,at91sam9g45-ddramc",
64 - reg: Should contain registers location and length
65 For at91sam9263 and at91sam9g45 you must specify 2 entries.
66
67 Examples:
68
69 ramc0: ramc@ffffe800 {
70 compatible = "atmel,at91sam9g45-ddramc";
71 reg = <0xffffe800 0x200>;
72 };
73
74 ramc0: ramc@ffffe400 {
75 compatible = "atmel,at91sam9g45-ddramc";
76 reg = <0xffffe400 0x200
77 0xffffe600 0x200>;
78 };
79
80 SHDWC Shutdown Controller
81
82 required properties:
83 - compatible: Should be "atmel,<chip>-shdwc".
84 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
85 - reg: Should contain registers location and length
86
87 optional properties:
88 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
89 Supported values are: "none", "high", "low", "any".
90 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
91
92 optional at91sam9260 properties:
93 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
94
95 optional at91sam9rl properties:
96 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
97 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
98
99 optional at91sam9x5 properties:
100 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
101
102 Example:
103
104 rstc@fffffd00 {
105 compatible = "atmel,at91sam9260-rstc";
106 reg = <0xfffffd00 0x10>;
107 };