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1 * CoreSight Components:
2
3 CoreSight components are compliant with the ARM CoreSight architecture
4 specification and can be connected in various topologies to suit a particular
5 SoCs tracing needs. These trace components can generally be classified as
6 sinks, links and sources. Trace data produced by one or more sources flows
7 through the intermediate links connecting the source to the currently selected
8 sink. Each CoreSight component device should use these properties to describe
9 its hardware characteristcs.
10
11 * Required properties for all components *except* non-configurable replicators:
12
13 * compatible: These have to be supplemented with "arm,primecell" as
14 drivers are using the AMBA bus interface. Possible values include:
15 - "arm,coresight-etb10", "arm,primecell";
16 - "arm,coresight-tpiu", "arm,primecell";
17 - "arm,coresight-tmc", "arm,primecell";
18 - "arm,coresight-funnel", "arm,primecell";
19 - "arm,coresight-etm3x", "arm,primecell";
20 - "qcom,coresight-replicator1x", "arm,primecell";
21
22 * reg: physical base address and length of the register
23 set(s) of the component.
24
25 * clocks: the clocks associated to this component.
26
27 * clock-names: the name of the clocks referenced by the code.
28 Since we are using the AMBA framework, the name of the clock
29 providing the interconnect should be "apb_pclk", and some
30 coresight blocks also have an additional clock "atclk", which
31 clocks the core of that coresight component. The latter clock
32 is optional.
33
34 * port or ports: The representation of the component's port
35 layout using the generic DT graph presentation found in
36 "bindings/graph.txt".
37
38 * Required properties for devices that don't show up on the AMBA bus, such as
39 non-configurable replicators:
40
41 * compatible: Currently supported value is (note the absence of the
42 AMBA markee):
43 - "arm,coresight-replicator"
44
45 * port or ports: same as above.
46
47 * Optional properties for ETM/PTMs:
48
49 * arm,cp14: must be present if the system accesses ETM/PTM management
50 registers via co-processor 14.
51
52 * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the
53 source is considered to belong to CPU0.
54
55 * Optional property for TMC:
56
57 * arm,buffer-size: size of contiguous buffer space for TMC ETR
58 (embedded trace router)
59
60
61 Example:
62
63 1. Sinks
64 etb@20010000 {
65 compatible = "arm,coresight-etb10", "arm,primecell";
66 reg = <0 0x20010000 0 0x1000>;
67
68 clocks = <&oscclk6a>;
69 clock-names = "apb_pclk";
70 port {
71 etb_in_port: endpoint@0 {
72 slave-mode;
73 remote-endpoint = <&replicator_out_port0>;
74 };
75 };
76 };
77
78 tpiu@20030000 {
79 compatible = "arm,coresight-tpiu", "arm,primecell";
80 reg = <0 0x20030000 0 0x1000>;
81
82 clocks = <&oscclk6a>;
83 clock-names = "apb_pclk";
84 port {
85 tpiu_in_port: endpoint@0 {
86 slave-mode;
87 remote-endpoint = <&replicator_out_port1>;
88 };
89 };
90 };
91
92 2. Links
93 replicator {
94 /* non-configurable replicators don't show up on the
95 * AMBA bus. As such no need to add "arm,primecell".
96 */
97 compatible = "arm,coresight-replicator";
98
99 ports {
100 #address-cells = <1>;
101 #size-cells = <0>;
102
103 /* replicator output ports */
104 port@0 {
105 reg = <0>;
106 replicator_out_port0: endpoint {
107 remote-endpoint = <&etb_in_port>;
108 };
109 };
110
111 port@1 {
112 reg = <1>;
113 replicator_out_port1: endpoint {
114 remote-endpoint = <&tpiu_in_port>;
115 };
116 };
117
118 /* replicator input port */
119 port@2 {
120 reg = <0>;
121 replicator_in_port0: endpoint {
122 slave-mode;
123 remote-endpoint = <&funnel_out_port0>;
124 };
125 };
126 };
127 };
128
129 funnel@20040000 {
130 compatible = "arm,coresight-funnel", "arm,primecell";
131 reg = <0 0x20040000 0 0x1000>;
132
133 clocks = <&oscclk6a>;
134 clock-names = "apb_pclk";
135 ports {
136 #address-cells = <1>;
137 #size-cells = <0>;
138
139 /* funnel output port */
140 port@0 {
141 reg = <0>;
142 funnel_out_port0: endpoint {
143 remote-endpoint =
144 <&replicator_in_port0>;
145 };
146 };
147
148 /* funnel input ports */
149 port@1 {
150 reg = <0>;
151 funnel_in_port0: endpoint {
152 slave-mode;
153 remote-endpoint = <&ptm0_out_port>;
154 };
155 };
156
157 port@2 {
158 reg = <1>;
159 funnel_in_port1: endpoint {
160 slave-mode;
161 remote-endpoint = <&ptm1_out_port>;
162 };
163 };
164
165 port@3 {
166 reg = <2>;
167 funnel_in_port2: endpoint {
168 slave-mode;
169 remote-endpoint = <&etm0_out_port>;
170 };
171 };
172
173 };
174 };
175
176 3. Sources
177 ptm@2201c000 {
178 compatible = "arm,coresight-etm3x", "arm,primecell";
179 reg = <0 0x2201c000 0 0x1000>;
180
181 cpu = <&cpu0>;
182 clocks = <&oscclk6a>;
183 clock-names = "apb_pclk";
184 port {
185 ptm0_out_port: endpoint {
186 remote-endpoint = <&funnel_in_port0>;
187 };
188 };
189 };
190
191 ptm@2201d000 {
192 compatible = "arm,coresight-etm3x", "arm,primecell";
193 reg = <0 0x2201d000 0 0x1000>;
194
195 cpu = <&cpu1>;
196 clocks = <&oscclk6a>;
197 clock-names = "apb_pclk";
198 port {
199 ptm1_out_port: endpoint {
200 remote-endpoint = <&funnel_in_port1>;
201 };
202 };
203 };