Documentation/devicetree/bindings/iio/adc/vf610-adc.txt

   1 Freescale vf610 Analog to Digital Converter bindings
   2
   3 The devicetree bindings are for the new ADC driver written for
   4 vf610/i.MX6slx and upward SoCs from Freescale.
   5
   6 Required properties:
   7 - compatible: Should contain "fsl,vf610-adc"
   8 - reg: Offset and length of the register set for the device
   9 - interrupts: Should contain the interrupt for the device
  10 - clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock.
  11 - clock-names: Must contain "adc", matching entry in the clocks property.
  12 - vref-supply: The regulator supply ADC reference voltage.
  13
  14 Recommended properties:
  15 - fsl,adck-max-frequency: Maximum frequencies according to datasheets operating
  16   requirements. Three values are required, depending on conversion mode:
  17   - Frequency in normal mode (ADLPC=0, ADHSC=0)
  18   - Frequency in high-speed mode (ADLPC=0, ADHSC=1)
  19   - Frequency in low-power mode (ADLPC=1, ADHSC=0)
  20
  21 Example:
  22 adc0: adc@4003b000 {
  23         compatible = "fsl,vf610-adc";
  24         reg = <0x4003b000 0x1000>;
  25         interrupts = <0 53 0x04>;
  26         clocks = <&clks VF610_CLK_ADC0>;
  27         clock-names = "adc";
  28         fsl,adck-max-frequency = <30000000>, <40000000>,
  29                                 <20000000>;
  30         vref-supply = <&reg_vcc_3v3_mcu>;
  31 };