1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips as the primary
14 package interrupt controller which can route local I/O interrupt to interrupt lines
18 - $ref: /schemas/interrupt-controller.yaml#
23 - const: loongson,liointc-1.0
24 - const: loongson,liointc-1.0a
29 interrupt-controller: true
33 Interrupt source of the CPU interrupts.
38 description: List of names for the parent interrupts.
50 'loongson,parent_int_map':
52 This property points how the children interrupts will be mapped into CPU
53 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
54 and each bit in the cell refers to a children interrupt fron 0 to 31.
55 If a CPU interrupt line didn't connected with liointc, then keep it's
57 $ref: /schemas/types.yaml#/definitions/uint32-array
65 - interrupt-controller
67 - 'loongson,parent_int_map'
72 iointc: interrupt-controller@3ff01400 {
73 compatible = "loongson,liointc-1.0";
74 reg = <0x3ff01400 0x64>;
77 #interrupt-cells = <2>;
79 interrupt-parent = <&cpuintc>;
80 interrupts = <2>, <3>;
81 interrupt-names = "int0", "int1";
83 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
84 <0x0f000000>, /* int1 */
85 <0x00000000>, /* int2 */
86 <0x00000000>; /* int3 */