1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright (C) 2020 Renesas Electronics Corp.
5 $id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
17 Each VIN instance has a single parallel input that supports RGB and YUV video,
18 with both external synchronization and BT.656 synchronization for the latter.
19 Depending on the instance the VIN input is connected to external SoC pins, or
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
27 - renesas,vin-r8a7742 # RZ/G1H
28 - renesas,vin-r8a7743 # RZ/G1M
29 - renesas,vin-r8a7744 # RZ/G1N
30 - renesas,vin-r8a7745 # RZ/G1E
31 - renesas,vin-r8a77470 # RZ/G1C
32 - renesas,vin-r8a7790 # R-Car H2
33 - renesas,vin-r8a7791 # R-Car M2-W
34 - renesas,vin-r8a7792 # R-Car V2H
35 - renesas,vin-r8a7793 # R-Car M2-N
36 - renesas,vin-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
41 - renesas,vin-r8a774a1 # RZ/G2M
42 - renesas,vin-r8a774b1 # RZ/G2N
43 - renesas,vin-r8a774c0 # RZ/G2E
44 - renesas,vin-r8a774e1 # RZ/G2H
45 - renesas,vin-r8a7778 # R-Car M1
46 - renesas,vin-r8a7779 # R-Car H1
47 - renesas,vin-r8a7795 # R-Car H3
48 - renesas,vin-r8a7796 # R-Car M3-W
49 - renesas,vin-r8a77965 # R-Car M3-N
50 - renesas,vin-r8a77970 # R-Car V3M
51 - renesas,vin-r8a77980 # R-Car V3H
52 - renesas,vin-r8a77990 # R-Car E3
53 - renesas,vin-r8a77995 # R-Car D3
70 #The per-board settings for Gen2 and RZ/G1 platforms:
74 A node containing a parallel input with a single endpoint definitions as
76 Documentation/devicetree/bindings/media/video-interfaces.txt
85 If both HSYNC and VSYNC polarities are not specified, embedded
86 synchronization is selected.
91 If both HSYNC and VSYNC polarities are not specified, embedded
92 synchronization is selected.
95 field-active-even: true
102 description: Polarity of CLKENB signal
109 remote-endpoint: true
114 additionalProperties: false
116 additionalProperties: false
118 #The per-board settings for Gen3 and RZ/G2 platforms:
120 description: VIN channel number
121 $ref: /schemas/types.yaml#/definitions/uint32
128 A node containing input nodes with endpoint definitions as documented in
129 Documentation/devicetree/bindings/media/video-interfaces.txt
135 Input port node, single endpoint describing a parallel input source.
147 If both HSYNC and VSYNC polarities are not specified, embedded
148 synchronization is selected.
153 If both HSYNC and VSYNC polarities are not specified, embedded
154 synchronization is selected.
157 field-active-even: true
164 description: Polarity of CLKENB signal
171 remote-endpoint: true
176 additionalProperties: false
181 additionalProperties: false
186 Input port node, multiple endpoints describing all the R-Car CSI-2
187 modules connected the VIN.
201 description: Endpoint connected to CSI20.
207 remote-endpoint: true
213 additionalProperties: false
217 description: Endpoint connected to CSI21.
223 remote-endpoint: true
229 additionalProperties: false
233 description: Endpoint connected to CSI40.
239 remote-endpoint: true
245 additionalProperties: false
249 description: Endpoint connected to CSI41.
255 remote-endpoint: true
261 additionalProperties: false
273 additionalProperties: false
288 - renesas,vin-r8a7778
289 - renesas,vin-r8a7779
290 - renesas,rcar-gen2-vin
299 additionalProperties: false
302 # Device node example for Gen2 platform
304 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
305 #include <dt-bindings/interrupt-controller/arm-gic.h>
306 #include <dt-bindings/power/r8a7790-sysc.h>
309 compatible = "renesas,vin-r8a7790",
310 "renesas,rcar-gen2-vin";
311 reg = <0xe6ef1000 0x1000>;
312 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
313 clocks = <&cpg CPG_MOD 810>;
314 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
319 remote-endpoint = <&adv7180>;
325 # Device node example for Gen3 platform with only CSI-2
327 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
328 #include <dt-bindings/interrupt-controller/arm-gic.h>
329 #include <dt-bindings/power/r8a7795-sysc.h>
331 vin0: video@e6ef0000 {
332 compatible = "renesas,vin-r8a7795";
333 reg = <0xe6ef0000 0x1000>;
334 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&cpg CPG_MOD 811>;
336 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
341 #address-cells = <1>;
345 #address-cells = <1>;
350 vin0csi20: endpoint@0 {
352 remote-endpoint= <&csi20vin0>;
354 vin0csi40: endpoint@2 {
356 remote-endpoint= <&csi40vin0>;
362 # Device node example for Gen3 platform with CSI-2 and parallel
364 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
365 #include <dt-bindings/interrupt-controller/arm-gic.h>
366 #include <dt-bindings/power/r8a77970-sysc.h>
368 vin2: video@e6ef2000 {
369 compatible = "renesas,vin-r8a77970";
370 reg = <0xe6ef2000 0x1000>;
371 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
372 clocks = <&cpg CPG_MOD 809>;
373 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
378 #address-cells = <1>;
385 remote-endpoint = <&adv7612_out>;
392 #address-cells = <1>;
397 vin2csi40: endpoint@2 {
399 remote-endpoint = <&csi40vin2>;