Documentation/devicetree/bindings/media/ti,da850-vpif.txt

   1 Texas Instruments VPIF
   2 ----------------------
   3
   4 The TI Video Port InterFace (VPIF) is the primary component for video
   5 capture and display on the DA850/AM18x family of TI DaVinci/Sitara
   6 SoCs.
   7
   8 TI Document reference: SPRUH82C, Chapter 35
   9 http://www.ti.com/lit/pdf/spruh82
  10
  11 Required properties:
  12 - compatible: must be "ti,da850-vpif"
  13 - reg: physical base address and length of the registers set for the device;
  14 - interrupts: should contain IRQ line for the VPIF
  15
  16 Video Capture:
  17
  18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
  19 single 16-bit channel.  It should contain at least one port child node
  20 with child 'endpoint' node. Please refer to the bindings defined in
  21 Documentation/devicetree/bindings/media/video-interfaces.txt.
  22
  23 Example using 2 8-bit input channels, one of which is connected to an
  24 I2C-connected TVP5147 decoder:
  25
  26         vpif: vpif@217000 {
  27                 compatible = "ti,da850-vpif";
  28                 reg = <0x217000 0x1000>;
  29                 interrupts = <92>;
  30
  31                 port {
  32                         vpif_ch0: endpoint@0 {
  33                                   reg = <0>;
  34                                   bus-width = <8>;
  35                                   remote-endpoint = <&composite>;
  36                         };
  37
  38                         vpif_ch1: endpoint@1 {
  39                                   reg = <1>;
  40                                   bus-width = <8>;
  41                                   data-shift = <8>;
  42                         };
  43                 };
  44         };
  45
  46 [ ... ]
  47
  48 &i2c0 {
  49
  50         tvp5147@5d {
  51                 compatible = "ti,tvp5147";
  52                 reg = <0x5d>;
  53                 status = "okay";
  54
  55                 port {
  56                         composite: endpoint {
  57                                 hsync-active = <1>;
  58                                 vsync-active = <1>;
  59                                 pclk-sample = <0>;
  60
  61                                 /* VPIF channel 0 (lower 8-bits) */
  62                                 remote-endpoint = <&vpif_ch0>;
  63                                 bus-width = <8>;
  64                         };
  65                 };
  66         };
  67 };
  68
  69
  70 Alternatively, an example when the bus is configured as a single
  71 16-bit input (e.g. for raw-capture mode):
  72
  73         vpif: vpif@217000 {
  74                 compatible = "ti,da850-vpif";
  75                 reg = <0x217000 0x1000>;
  76                 interrupts = <92>;
  77
  78                 port {
  79                         vpif_ch0: endpoint {
  80                                   bus-width = <16>;
  81                         };
  82                 };
  83         };