Documentation/devicetree/bindings/net/fsl-fec.txt

   1 * Freescale Fast Ethernet Controller (FEC)
   2
   3 Required properties:
   4 - compatible : Should be "fsl,<soc>-fec"
   5 - reg : Address and length of the register set for the device
   6 - interrupts : Should contain fec interrupt
   7 - phy-mode : See ethernet.txt file in the same directory
   8
   9 Optional properties:
  10 - phy-supply : regulator that powers the Ethernet PHY.
  11 - phy-handle : phandle to the PHY device connected to this device.
  12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
  13   Use instead of phy-handle.
  14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
  15   hw multi queues. Should specify the tx queue number, otherwise set tx queue
  16   number to 1.
  17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
  18   hw multi queues. Should specify the rx queue number, otherwise set rx queue
  19   number to 1.
  20 - fsl,magic-packet : If present, indicates that the hardware supports waking
  21   up via magic packet.
  22 - fsl,err006687-workaround-present: If present indicates that the system has
  23   the hardware workaround for ERR006687 applied and does not need a software
  24   workaround.
  25 - fsl,stop-mode: register bits of stop mode control, the format is
  26                  <&gpr req_gpr req_bit>.
  27                  gpr is the phandle to general purpose register node.
  28                  req_gpr is the gpr register offset for ENET stop request.
  29                  req_bit is the gpr bit offset for ENET stop request.
  30  -interrupt-names:  names of the interrupts listed in interrupts property in
  31   the same order. The defaults if not specified are
  32   __Number of interrupts__   __Default__
  33         1                       "int0"
  34         2                       "int0", "pps"
  35         3                       "int0", "int1", "int2"
  36         4                       "int0", "int1", "int2", "pps"
  37   The order may be changed as long as they correspond to the interrupts
  38   property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
  39   tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
  40   For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
  41   per second interrupt associated with 1588 precision time protocol(PTP).
  42
  43 Optional subnodes:
  44 - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
  45   according to phy.txt in the same directory
  46
  47 Deprecated optional properties:
  48         To avoid these, create a phy node according to phy.txt in the same
  49         directory, and point the fec's "phy-handle" property to it. Then use
  50         the phy's reset binding, again described by phy.txt.
  51 - phy-reset-gpios : Should specify the gpio for phy reset
  52 - phy-reset-duration : Reset duration in milliseconds.  Should present
  53   only if property "phy-reset-gpios" is available.  Missing the property
  54   will have the duration be 1 millisecond.  Numbers greater than 1000 are
  55   invalid and 1 millisecond will be used instead.
  56 - phy-reset-active-high : If present then the reset sequence using the GPIO
  57   specified in the "phy-reset-gpios" property is reversed (H=reset state,
  58   L=operation state).
  59 - phy-reset-post-delay : Post reset delay in milliseconds. If present then
  60   a delay of phy-reset-post-delay milliseconds will be observed after the
  61   phy-reset-gpios has been toggled. Can be omitted thus no delay is
  62   observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
  63
  64 Example:
  65
  66 ethernet@83fec000 {
  67         compatible = "fsl,imx51-fec", "fsl,imx27-fec";
  68         reg = <0x83fec000 0x4000>;
  69         interrupts = <87>;
  70         phy-mode = "mii";
  71         phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
  72         local-mac-address = [00 04 9F 01 1B B9];
  73         phy-supply = <&reg_fec_supply>;
  74 };
  75
  76 Example with phy specified:
  77
  78 ethernet@83fec000 {
  79         compatible = "fsl,imx51-fec", "fsl,imx27-fec";
  80         reg = <0x83fec000 0x4000>;
  81         interrupts = <87>;
  82         phy-mode = "mii";
  83         phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
  84         local-mac-address = [00 04 9F 01 1B B9];
  85         phy-supply = <&reg_fec_supply>;
  86         phy-handle = <&ethphy>;
  87         mdio {
  88                 clock-frequency = <5000000>;
  89                 ethphy: ethernet-phy@6 {
  90                         compatible = "ethernet-phy-ieee802.3-c22";
  91                         reg = <6>;
  92                         max-speed = <100>;
  93                 };
  94         };
  95 };