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1 NXP LPC18xx/43xx SCU pin controller Device Tree Bindings
2 --------------------------------------------------------
3
4 Required properties:
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
8
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
11
12 The following generic nodes are supported:
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
17 - bias-pull-down
18 - drive-strength
19 - input-enable
20 - input-disable
21 - input-schmitt-enable
22 - input-schmitt-disable
23 - slew-rate
24
25 Not all pins support all properties so either refer to the NXP 1850/4350
26 user manual or the pin table in the pinctrl-lpc18xx driver for supported
27 pin properties.
28
29 Example:
30 pinctrl: pinctrl@40086000 {
31 compatible = "nxp,lpc1850-scu";
32 reg = <0x40086000 0x1000>;
33 clocks = <&ccu1 CLK_CPU_SCU>;
34
35 i2c0_pins: i2c0-pins {
36 i2c0_pins_cfg {
37 pins = "i2c0_scl", "i2c0_sda";
38 function = "i2c0";
39 input-enable;
40 };
41 };
42
43 uart0_pins: uart0-pins {
44 uart0_rx_cfg {
45 pins = "pf_11";
46 function = "uart0";
47 bias-disable;
48 input-enable;
49 };
50
51 uart0_tx_cfg {
52 pins = "pf_10";
53 function = "uart0";
54 bias-disable;
55 };
56 };
57 };