Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

   1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
   2
   3 The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
   4 R8A73A4 and R8A7740 it also acts as a GPIO controller.
   5
   6
   7 Pin Control
   8 -----------
   9
  10 Required Properties:
  11
  12   - compatible: should be one of the following.
  13     - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
  14     - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
  15     - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
  16     - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
  17     - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
  18     - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
  19     - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
  20     - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
  21     - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
  22
  23   - reg: Base address and length of each memory resource used by the pin
  24     controller hardware module.
  25
  26 Optional properties:
  27
  28   - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
  29     otherwise. Should be 3.
  30
  31   - interrupts-extended: Specify the interrupts associated with external
  32     IRQ pins. This property is mandatory when the PFC handles GPIOs and
  33     forbidden otherwise. When specified, it must contain one interrupt per
  34     external IRQ, sorted by external IRQ number.
  35
  36 The PFC node also acts as a container for pin configuration nodes. Please refer
  37 to pinctrl-bindings.txt in this directory for the definition of the term "pin
  38 configuration node" and for the common pinctrl bindings used by client devices.
  39
  40 Each pin configuration node represents a desired configuration for a pin, a
  41 pin group, or a list of pins or pin groups. The configuration can include the
  42 function to select on those pin(s) and pin configuration parameters (such as
  43 pull-up and pull-down).
  44
  45 Pin configuration nodes contain pin configuration properties, either directly
  46 or grouped in child subnodes. Both pin muxing and configuration parameters can
  47 be grouped in that way and referenced as a single pin configuration node by
  48 client devices.
  49
  50 A configuration node or subnode must reference at least one pin (through the
  51 pins or pin groups properties) and contain at least a function or one
  52 configuration parameter. When the function is present only pin groups can be
  53 used to reference pins.
  54
  55 All pin configuration nodes and subnodes names are ignored. All of those nodes
  56 are parsed through phandles and processed purely based on their content.
  57
  58 Pin Configuration Node Properties:
  59
  60 - renesas,pins : An array of strings, each string containing the name of a pin.
  61 - renesas,groups : An array of strings, each string containing the name of a pin
  62   group.
  63
  64 - renesas,function: A string containing the name of the function to mux to the
  65   pin group(s) specified by the renesas,groups property
  66
  67   Valid values for pin, group and function names can be found in the group and
  68   function arrays of the PFC data file corresponding to the SoC
  69   (drivers/pinctrl/sh-pfc/pfc-*.c)
  70
  71 The pin configuration parameters use the generic pinconf bindings defined in
  72 pinctrl-bindings.txt in this directory. The supported parameters are
  73 bias-disable, bias-pull-up and bias-pull-down.
  74
  75
  76 GPIO
  77 ----
  78
  79 On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
  80
  81 Required Properties:
  82
  83   - gpio-controller: Marks the device node as a gpio controller.
  84
  85   - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
  86     cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
  87     GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
  88
  89 The syntax of the gpio specifier used by client nodes should be the following
  90 with values derived from the SoC user manual.
  91
  92   <[phandle of the gpio controller node]
  93    [pin number within the gpio controller]
  94    [flags]>
  95
  96 On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
  97 Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
  98 for documentation of the GPIO device tree bindings on those platforms.
  99
 100
 101 Examples
 102 --------
 103
 104 Example 1: SH73A0 (SH-Mobile AG5) pin controller node
 105
 106         pfc: pfc@e6050000 {
 107                 compatible = "renesas,pfc-sh73a0";
 108                 reg = <0xe6050000 0x8000>,
 109                       <0xe605801c 0x1c>;
 110                 gpio-controller;
 111                 #gpio-cells = <2>;
 112                 interrupts-extended =
 113                         <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
 114                         <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
 115                         <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
 116                         <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
 117                         <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
 118                         <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
 119                         <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
 120                         <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 121         };
 122
 123 Example 2: A GPIO LED node that references a GPIO
 124
 125         #include <dt-bindings/gpio/gpio.h>
 126
 127         leds {
 128                 compatible = "gpio-leds";
 129                 led1 {
 130                         gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
 131                 };
 132         };
 133
 134 Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
 135            for the MMCIF and SCIFA4 devices
 136
 137         &pfc {
 138                 pinctrl-0 = <&scifa4_pins>;
 139                 pinctrl-names = "default";
 140
 141                 mmcif_pins: mmcif {
 142                         mux {
 143                                 renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
 144                                 renesas,function = "mmc0";
 145                         };
 146                         cfg {
 147                                 renesas,groups = "mmc0_data8_0";
 148                                 renesas,pins = "PORT279";
 149                                 bias-pull-up;
 150                         };
 151                 };
 152
 153                 scifa4_pins: scifa4 {
 154                         renesas,groups = "scifa4_data", "scifa4_ctrl";
 155                         renesas,function = "scifa4";
 156                 };
 157         };
 158
 159 Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
 160
 161         &mmcif {
 162                 pinctrl-0 = <&mmcif_pins>;
 163                 pinctrl-names = "default";
 164
 165                 bus-width = <8>;
 166                 vmmc-supply = <&reg_1p8v>;
 167                 status = "okay";
 168         };