Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt

   1 * STM32 GPIO and Pin Mux/Config controller
   2
   3 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
   4 controller. It controls the input/output settings on the available pins and
   5 also provides ability to multiplex and configure the output of various on-chip
   6 controllers onto these pads.
   7
   8 Pin controller node:
   9 Required properies:
  10  - compatible: value should be one of the following:
  11    (a) "st,stm32f429-pinctrl"
  12    (b) "st,stm32f746-pinctrl"
  13  - #address-cells: The value of this property must be 1
  14  - #size-cells  : The value of this property must be 1
  15  - ranges       : defines mapping between pin controller node (parent) to
  16    gpio-bank node (children).
  17  - pins-are-numbered: Specify the subnodes are using numbered pinmux to
  18    specify pins.
  19
  20 GPIO controller/bank node:
  21 Required properties:
  22  - gpio-controller : Indicates this device is a GPIO controller
  23  - #gpio-cells    : Should be two.
  24                         The first cell is the pin number
  25                         The second one is the polarity:
  26                                 - 0 for active high
  27                                 - 1 for active low
  28  - reg            : The gpio address range, relative to the pinctrl range
  29  - clocks         : clock that drives this bank
  30  - st,bank-name   : Should be a name string for this bank as specified in
  31    the datasheet
  32
  33 Optional properties:
  34  - reset:         : Reference to the reset controller
  35  - interrupt-parent: phandle of the interrupt parent to which the external
  36    GPIO interrupts are forwarded to.
  37  - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
  38    which includes IRQ mux selection register, and the offset of the IRQ mux
  39    selection register.
  40
  41 Example:
  42 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
  43 ...
  44
  45         pin-controller {
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 compatible = "st,stm32f429-pinctrl";
  49                 ranges = <0 0x40020000 0x3000>;
  50                 pins-are-numbered;
  51
  52                 gpioa: gpio@40020000 {
  53                         gpio-controller;
  54                         #gpio-cells = <2>;
  55                         reg = <0x0 0x400>;
  56                         resets = <&reset_ahb1 0>;
  57                         st,bank-name = "GPIOA";
  58                 };
  59                 ...
  60                 pin-functions nodes follow...
  61         };
  62
  63 Contents of function subnode node:
  64 ----------------------------------
  65 Subnode format
  66 A pinctrl node should contain at least one subnode representing the
  67 pinctrl group available on the machine. Each subnode will list the
  68 pins it needs, and how they should be configured, with regard to muxer
  69 configuration, pullups, drive, output high/low and output speed.
  70
  71     node {
  72         pinmux = <PIN_NUMBER_PINMUX>;
  73         GENERIC_PINCONFIG;
  74     };
  75
  76 Required properties:
  77 - pinmux: integer array, represents gpio pin number and mux setting.
  78   Supported pin number and mux varies for different SoCs, and are defined in
  79   dt-bindings/pinctrl/<soc>-pinfunc.h directly.
  80   These defines are calculated as:
  81     ((port * 16 + line) << 8) | function
  82   With:
  83     - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
  84     - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
  85     - function: The function number, can be:
  86       * 0 : GPIO
  87       * 1 : Alternate Function 0
  88       * 2 : Alternate Function 1
  89       * 3 : Alternate Function 2
  90       * ...
  91       * 16 : Alternate Function 15
  92       * 17 : Analog
  93
  94 Optional properties:
  95 - GENERIC_PINCONFIG: is the generic pinconfig options to use.
  96   Available options are:
  97    - bias-disable,
  98    - bias-pull-down,
  99    - bias-pull-up,
 100    - drive-push-pull,
 101    - drive-open-drain,
 102    - output-low
 103    - output-high
 104    - slew-rate = <x>, with x being:
 105        < 0 > : Low speed
 106        < 1 > : Medium speed
 107        < 2 > : Fast speed
 108        < 3 > : High speed
 109
 110 Example:
 111
 112 pin-controller {
 113 ...
 114         usart1_pins_a: usart1@0 {
 115                 pins1 {
 116                         pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
 117                         bias-disable;
 118                         drive-push-pull;
 119                         slew-rate = <0>;
 120                 };
 121                 pins2 {
 122                         pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
 123                         bias-disable;
 124                 };
 125         };
 126 };
 127
 128 &usart1 {
 129         pinctrl-0 = <&usart1_pins_a>;
 130         pinctrl-names = "default";
 131         status = "okay";
 132 };