Documentation/devicetree/bindings/spi/spi-lantiq-ssc.txt

   1 Lantiq Synchronous Serial Controller (SSC) SPI master driver
   2
   3 Required properties:
   4 - compatible: "lantiq,ase-spi", "lantiq,falcon-spi", "lantiq,xrx100-spi",
   5   "intel,lgm-spi"
   6 - #address-cells: see spi-bus.txt
   7 - #size-cells: see spi-bus.txt
   8 - reg: address and length of the spi master registers
   9 - interrupts:
  10   For compatible "intel,lgm-ssc" - the common interrupt number for
  11   all of tx rx & err interrupts.
  12        or
  13   For rest of the compatibles, should contain the "spi_rx", "spi_tx" and
  14   "spi_err" interrupt.
  15
  16
  17 Optional properties:
  18 - clocks: spi clock phandle
  19 - num-cs: see spi-bus.txt, set to 8 if unset
  20 - base-cs: the number of the first chip select, set to 1 if unset.
  21
  22 Example:
  23
  24
  25 spi: spi@e100800 {
  26         compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
  27         reg = <0xE100800 0x100>;
  28         interrupt-parent = <&icu0>;
  29         interrupts = <22 23 24>;
  30         interrupt-names = "spi_rx", "spi_tx", "spi_err";
  31         #address-cells = <1>;
  32         #size-cells = <1>;
  33         num-cs = <6>;
  34         base-cs = <1>;
  35 };
  36
  37 ssc0: spi@e0800000 {
  38         compatible = "intel,lgm-spi";
  39         reg = <0xe0800000 0x400>;
  40         interrupt-parent = <&ioapic1>;
  41         interrupts = <35 1>;
  42         #address-cells = <1>;
  43         #size-cells = <0>;
  44         clocks = <&cgu0 LGM_CLK_NGI>, <&cgu0 LGM_GCLK_SSC0>;
  45         clock-names = "freq", "gate";
  46 };