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[mirror_ubuntu-hirsute-kernel.git] / Documentation / devicetree / bindings / thermal / rockchip-thermal.txt
1 * Temperature Sensor ADC (TSADC) on rockchip SoCs
2
3 Required properties:
4 - compatible : "rockchip,rk3288-tsadc"
5 - reg : physical base address of the controller and length of memory mapped
6 region.
7 - interrupts : The interrupt number to the cpu. The interrupt specifier format
8 depends on the interrupt controller.
9 - clocks : Must contain an entry for each entry in clock-names.
10 - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
11 the peripheral clock.
12 - resets : Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
14 - reset-names : Must include the name "tsadc-apb".
15 - pinctrl-names : The pin control state names;
16 - pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
17 - pinctrl-1 : The "default" pinctrl state, it will be set after reset the
18 TSADC controller.
19 - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
20 - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
21 - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
22 - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
23 - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
24 1:HIGH.
25
26 Exiample:
27 tsadc: tsadc@ff280000 {
28 compatible = "rockchip,rk3288-tsadc";
29 reg = <0xff280000 0x100>;
30 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
31 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
32 clock-names = "tsadc", "apb_pclk";
33 resets = <&cru SRST_TSADC>;
34 reset-names = "tsadc-apb";
35 pinctrl-names = "init", "default", "sleep";
36 pinctrl-0 = <&otp_gpio>;
37 pinctrl-1 = <&otp_out>;
38 pinctrl-2 = <&otp_gpio>;
39 #thermal-sensor-cells = <1>;
40 rockchip,hw-tshut-temp = <95000>;
41 rockchip,hw-tshut-mode = <0>;
42 rockchip,hw-tshut-polarity = <0>;
43 };
44
45 Example: referring to thermal sensors:
46 thermal-zones {
47 cpu_thermal: cpu_thermal {
48 polling-delay-passive = <1000>; /* milliseconds */
49 polling-delay = <5000>; /* milliseconds */
50
51 /* sensor ID */
52 thermal-sensors = <&tsadc 1>;
53
54 trips {
55 cpu_alert0: cpu_alert {
56 temperature = <70000>; /* millicelsius */
57 hysteresis = <2000>; /* millicelsius */
58 type = "passive";
59 };
60 cpu_crit: cpu_crit {
61 temperature = <90000>; /* millicelsius */
62 hysteresis = <2000>; /* millicelsius */
63 type = "critical";
64 };
65 };
66
67 cooling-maps {
68 map0 {
69 trip = <&cpu_alert0>;
70 cooling-device =
71 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
72 };
73 };
74 };
75 };