Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt

   1 * Universal Flash Storage (UFS) Host Controller
   2
   3 UFSHC nodes are defined to describe on-chip UFS host controllers.
   4 Each UFS controller instance should have its own node.
   5
   6 Required properties:
   7 - compatible            : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
   8
   9                           For Qualcomm SoCs must contain, as below, an
  10                           SoC-specific compatible along with "qcom,ufshc" and
  11                           the appropriate jedec string:
  12                             "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
  13                             "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
  14                             "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
  15 - interrupts        : <interrupt mapping for UFS host controller IRQ>
  16 - reg               : <registers mapping>
  17
  18 Optional properties:
  19 - phys                  : phandle to UFS PHY node
  20 - phy-names             : the string "ufsphy" when is found in a node, along
  21                           with "phys" attribute, provides phandle to UFS PHY node
  22 - vdd-hba-supply        : phandle to UFS host controller supply regulator node
  23 - vcc-supply            : phandle to VCC supply regulator node
  24 - vccq-supply           : phandle to VCCQ supply regulator node
  25 - vccq2-supply          : phandle to VCCQ2 supply regulator node
  26 - vcc-supply-1p8        : For embedded UFS devices, valid VCC range is 1.7-1.95V
  27                           or 2.7-3.6V. This boolean property when set, specifies
  28                           to use low voltage range of 1.7-1.95V. Note for external
  29                           UFS cards this property is invalid and valid VCC range is
  30                           always 2.7-3.6V.
  31 - vcc-max-microamp      : specifies max. load that can be drawn from vcc supply
  32 - vccq-max-microamp     : specifies max. load that can be drawn from vccq supply
  33 - vccq2-max-microamp    : specifies max. load that can be drawn from vccq2 supply
  34 - <name>-fixed-regulator : boolean property specifying that <name>-supply is a fixed regulator
  35
  36 - clocks                : List of phandle and clock specifier pairs
  37 - clock-names           : List of clock input name strings sorted in the same
  38                           order as the clocks property.
  39                           "ref_clk" indicates reference clock frequency.
  40                           UFS host supplies reference clock to UFS device and UFS device
  41                           specification allows host to provide one of the 4 frequencies (19.2 MHz,
  42                           26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
  43                           parsed and used to update the reference clock setting in device.
  44                           Defaults to 26 MHz(as per specification) if not specified by host.
  45 - freq-table-hz         : Array of <min max> operating frequencies stored in the same
  46                           order as the clocks property. If this property is not
  47                           defined or a value in the array is "0" then it is assumed
  48                           that the frequency is set by the parent clock or a
  49                           fixed rate clock source.
  50 -lanes-per-direction    : number of lanes available per direction - either 1 or 2.
  51                           Note that it is assume same number of lanes is used both
  52                           directions at once. If not specified, default is 2 lanes per direction.
  53 - resets            : reset node register
  54 - reset-names       : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
  55
  56 Note: If above properties are not defined it can be assumed that the supply
  57 regulators or clocks are always on.
  58
  59 Example:
  60         ufshc@fc598000 {
  61                 compatible = "jedec,ufs-1.1";
  62                 reg = <0xfc598000 0x800>;
  63                 interrupts = <0 28 0>;
  64
  65                 vdd-hba-supply = <&xxx_reg0>;
  66                 vdd-hba-fixed-regulator;
  67                 vcc-supply = <&xxx_reg1>;
  68                 vcc-supply-1p8;
  69                 vccq-supply = <&xxx_reg2>;
  70                 vccq2-supply = <&xxx_reg3>;
  71                 vcc-max-microamp = 500000;
  72                 vccq-max-microamp = 200000;
  73                 vccq2-max-microamp = 200000;
  74
  75                 clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>;
  76                 clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
  77                 freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
  78                 resets = <&reset 0 1>;
  79                 reset-names = "rst";
  80                 phys = <&ufsphy1>;
  81                 phy-names = "ufsphy";
  82         };