Documentation/hwmon/powr1220.rst

   1 Kernel driver powr1220
   2 ======================
   3
   4 Supported chips:
   5
   6   * Lattice POWR1220AT8
   7
   8     Prefix: 'powr1220'
   9
  10     Addresses scanned: none
  11
  12     Datasheet: Publicly available at the Lattice website
  13
  14                http://www.latticesemi.com/
  15
  16 Author: Scott Kanowitz <scott.kanowitz@gmail.com>
  17
  18 Description
  19 -----------
  20
  21 This driver supports the Lattice POWR1220AT8 chip. The POWR1220
  22 includes voltage monitoring for 14 inputs as well as trim settings
  23 for output voltages and GPIOs. This driver implements the voltage
  24 monitoring portion of the chip.
  25
  26 Voltages are sampled by a 12-bit ADC with a step size of 2 mV.
  27 An in-line attenuator allows measurements from 0 to 6 V. The
  28 attenuator is enabled or disabled depending on the setting of the
  29 input's max value. The driver will enable the attenuator for any
  30 value over the low measurement range maximum of 2 V.
  31
  32 The input naming convention is as follows:
  33
  34 ============== ========
  35 driver name    pin name
  36 ============== ========
  37 in0            VMON1
  38 in1            VMON2
  39 in2            VMON3
  40 in2            VMON4
  41 in4            VMON5
  42 in5            VMON6
  43 in6            VMON7
  44 in7            VMON8
  45 in8            VMON9
  46 in9            VMON10
  47 in10           VMON11
  48 in11           VMON12
  49 in12           VCCA
  50 in13           VCCINP
  51 ============== ========
  52
  53 The ADC readings are updated on request with a minimum period of 1s.