Documentation/hwmon/tps40422

   1 Kernel driver tps40422
   2 ======================
   3
   4 Supported chips:
   5   * TI TPS40422
   6     Prefix: 'tps40422'
   7     Addresses scanned: -
   8     Datasheet: http://www.ti.com/lit/gpn/tps40422
   9
  10 Author: Zhu Laiwen <richard.zhu@nsn.com>
  11
  12
  13 Description
  14 -----------
  15
  16 This driver supports TI TPS40422 Dual-Output or Two-Phase Synchronous Buck
  17 Controller with PMBus
  18
  19 The driver is a client driver to the core PMBus driver.
  20 Please see Documentation/hwmon/pmbus for details on PMBus client drivers.
  21
  22
  23 Usage Notes
  24 -----------
  25
  26 This driver does not auto-detect devices. You will have to instantiate the
  27 devices explicitly. Please see Documentation/i2c/instantiating-devices for
  28 details.
  29
  30
  31 Platform data support
  32 ---------------------
  33
  34 The driver supports standard PMBus driver platform data.
  35
  36
  37 Sysfs entries
  38 -------------
  39
  40 The following attributes are supported.
  41
  42 in[1-2]_label           "vout[1-2]"
  43 in[1-2]_input           Measured voltage. From READ_VOUT register.
  44 in[1-2]_alarm           voltage alarm.
  45
  46 curr[1-2]_input         Measured current. From READ_IOUT register.
  47 curr[1-2]_label         "iout[1-2]"
  48 curr1_max               Maximum current. From IOUT_OC_WARN_LIMIT register.
  49 curr1_crit              Critical maximum current. From IOUT_OC_FAULT_LIMIT register.
  50 curr1_max_alarm         Current high alarm. From IOUT_OC_WARN_LIMIT status.
  51 curr1_crit_alarm        Current critical high alarm. From IOUT_OC_FAULT status.
  52 curr2_alarm             Current high alarm. From IOUT_OC_WARNING status.
  53
  54 temp1_input             Measured temperature. From READ_TEMPERATURE_2 register on page 0.
  55 temp1_max               Maximum temperature. From OT_WARN_LIMIT register.
  56 temp1_crit              Critical high temperature. From OT_FAULT_LIMIT register.
  57 temp1_max_alarm         Chip temperature high alarm. Set by comparing
  58                         READ_TEMPERATURE_2 on page 0 with OT_WARN_LIMIT if TEMP_OT_WARNING
  59                         status is set.
  60 temp1_crit_alarm        Chip temperature critical high alarm. Set by comparing
  61                         READ_TEMPERATURE_2 on page 0 with OT_FAULT_LIMIT if TEMP_OT_FAULT
  62                         status is set.
  63 temp2_input             Measured temperature. From READ_TEMPERATURE_2 register on page 1.
  64 temp2_alarm             Chip temperature alarm on page 1.