6 This is a v4l2 device driver for the cx2388x chip.
14 - Overlay isn't supported.
17 - Works. The TV standard detection is made by the driver, as the
18 hardware has bugs to auto-detect.
19 - audio data dma (i.e. recording without loopback cable to the
20 sound card) is supported via cx88-alsa.
26 How to add support for new cards
27 --------------------------------
29 The driver needs some config info for the TV cards. This stuff is in
30 cx88-cards.c. If the driver doesn't work well you likely need a new
31 entry for your card in that file. Check the kernel log (using dmesg)
32 to see whenever the driver knows your card or not. There is a line
37 cx8800[0]: subsystem: 0070:3400, board: Hauppauge WinTV \
38 34xxx models [card=1,autodetected]
40 If your card is listed as "board: UNKNOWN/GENERIC" it is unknown to
41 the driver. What to do then?
43 1) Try upgrading to the latest snapshot, maybe it has been added
45 2) You can try to create a new entry yourself, have a look at
46 cx88-cards.c. If that worked, mail me your changes as unified
48 3) Or you can mail me the config information. We need at least the
49 following information to add the card:
51 - the PCI Subsystem ID ("0070:3400" from the line above,
52 "lspci -v" output is fine too).
53 - the tuner type used by the card. You can try to find one by
54 trial-and-error using the tuner=<n> insmod option. If you
55 know which one the card has you can also have a look at the
56 list in CARDLIST.tuner
58 Documentation missing at the cx88 datasheet
59 -------------------------------------------
61 MO_OUTPUT_FORMAT (0x310164)
65 Previous default from DScaler: 0x1c1f0008
69 Digit 7: 27-24 (0xc = 12 = b1100 )
72 (DScaler apparently set this to 1, resulted in sucky picture)
75 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
98 0x47 is the sync byte for MPEG-2 transport stream packets.
99 Datasheet incorrectly states to use 47 decimal. 188 is the length.
100 All DVB compliant frontends output packets with this start code.
102 Hauppauge WinTV cx88 IR information
103 -----------------------------------
105 The controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting.
107 ====== ======== =================================================
109 ====== ======== =================================================
113 1 1 Mono tuner bypass or CD passthru (tuner specific)
114 ====== ======== =================================================
116 GPIO 16(I believe) is tied to the IR port (if present).
121 - Register 24'h20004 PCI Interrupt Status
123 - bit [18] IR_SMP_INT Set when 32 input samples have been collected over
124 - gpio[16] pin into GP_SAMPLE register.
126 What's missing from the data sheet:
128 - Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5
130 - set register 0x35C050 to 0xa80a80
132 - set register 0x35C054 to 0x5
133 - enable the IRQ bit 18 in the interrupt mask register (and
134 provide for a handler)
136 GP_SAMPLE register is at 0x35C058
138 Bits are then right shifted into the GP_SAMPLE register at the specified
139 rate; you get an interrupt when a full DWORD is received.
140 You need to recover the actual RC5 bits out of the (oversampled) IR sensor
141 bits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data) An
142 actual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment.
144 I'm pretty sure when no IR signal is present the receiver is always in a
145 marking state(1); but stray light, etc can cause intermittent noise values
146 as well. Remember, this is a free running sample of the IR receiver state
147 over time, so don't assume any sample starts at any particular place.
152 This data sheet (google search) seems to have a lovely description of the
154 http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf
156 This document has more data:
157 http://www.nenya.be/beor/electronics/rc5.htm
159 This document has a how to decode a bi-phase data stream:
160 http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt
162 This document has still more info:
163 http://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm