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1 Overview of Linux kernel SPI support
2 ====================================
3
4 21-May-2007
5
6 What is SPI?
7 ------------
8 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
9 link used to connect microcontrollers to sensors, memory, and peripherals.
10 It's a simple "de facto" standard, not complicated enough to acquire a
11 standardization body. SPI uses a master/slave configuration.
12
13 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
14 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
15 Slave Out" (MISO) signals. (Other names are also used.) There are four
16 clocking modes through which data is exchanged; mode-0 and mode-3 are most
17 commonly used. Each clock cycle shifts data out and data in; the clock
18 doesn't cycle except when there is a data bit to shift. Not all data bits
19 are used though; not every protocol uses those full duplex capabilities.
20
21 SPI masters use a fourth "chip select" line to activate a given SPI slave
22 device, so those three signal wires may be connected to several chips
23 in parallel. All SPI slaves support chipselects; they are usually active
24 low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have
25 other signals, often including an interrupt to the master.
26
27 Unlike serial busses like USB or SMBus, even low level protocols for
28 SPI slave functions are usually not interoperable between vendors
29 (except for commodities like SPI memory chips).
30
31 - SPI may be used for request/response style device protocols, as with
32 touchscreen sensors and memory chips.
33
34 - It may also be used to stream data in either direction (half duplex),
35 or both of them at the same time (full duplex).
36
37 - Some devices may use eight bit words. Others may different word
38 lengths, such as streams of 12-bit or 20-bit digital samples.
39
40 - Words are usually sent with their most significant bit (MSB) first,
41 but sometimes the least significant bit (LSB) goes first instead.
42
43 - Sometimes SPI is used to daisy-chain devices, like shift registers.
44
45 In the same way, SPI slaves will only rarely support any kind of automatic
46 discovery/enumeration protocol. The tree of slave devices accessible from
47 a given SPI master will normally be set up manually, with configuration
48 tables.
49
50 SPI is only one of the names used by such four-wire protocols, and
51 most controllers have no problem handling "MicroWire" (think of it as
52 half-duplex SPI, for request/response protocols), SSP ("Synchronous
53 Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
54 related protocols.
55
56 Some chips eliminate a signal line by combining MOSI and MISO, and
57 limiting themselves to half-duplex at the hardware level. In fact
58 some SPI chips have this signal mode as a strapping option. These
59 can be accessed using the same programming interface as SPI, but of
60 course they won't handle full duplex transfers. You may find such
61 chips described as using "three wire" signaling: SCK, data, nCSx.
62 (That data line is sometimes called MOMI or SISO.)
63
64 Microcontrollers often support both master and slave sides of the SPI
65 protocol. This document (and Linux) currently only supports the master
66 side of SPI interactions.
67
68
69 Who uses it? On what kinds of systems?
70 ---------------------------------------
71 Linux developers using SPI are probably writing device drivers for embedded
72 systems boards. SPI is used to control external chips, and it is also a
73 protocol supported by every MMC or SD memory card. (The older "DataFlash"
74 cards, predating MMC cards but using the same connectors and card shape,
75 support only SPI.) Some PC hardware uses SPI flash for BIOS code.
76
77 SPI slave chips range from digital/analog converters used for analog
78 sensors and codecs, to memory, to peripherals like USB controllers
79 or Ethernet adapters; and more.
80
81 Most systems using SPI will integrate a few devices on a mainboard.
82 Some provide SPI links on expansion connectors; in cases where no
83 dedicated SPI controller exists, GPIO pins can be used to create a
84 low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI
85 controller; the reasons to use SPI focus on low cost and simple operation,
86 and if dynamic reconfiguration is important, USB will often be a more
87 appropriate low-pincount peripheral bus.
88
89 Many microcontrollers that can run Linux integrate one or more I/O
90 interfaces with SPI modes. Given SPI support, they could use MMC or SD
91 cards without needing a special purpose MMC/SD/SDIO controller.
92
93
94 I'm confused. What are these four SPI "clock modes"?
95 -----------------------------------------------------
96 It's easy to be confused here, and the vendor documentation you'll
97 find isn't necessarily helpful. The four modes combine two mode bits:
98
99 - CPOL indicates the initial clock polarity. CPOL=0 means the
100 clock starts low, so the first (leading) edge is rising, and
101 the second (trailing) edge is falling. CPOL=1 means the clock
102 starts high, so the first (leading) edge is falling.
103
104 - CPHA indicates the clock phase used to sample data; CPHA=0 says
105 sample on the leading edge, CPHA=1 means the trailing edge.
106
107 Since the signal needs to stablize before it's sampled, CPHA=0
108 implies that its data is written half a clock before the first
109 clock edge. The chipselect may have made it become available.
110
111 Chip specs won't always say "uses SPI mode X" in as many words,
112 but their timing diagrams will make the CPOL and CPHA modes clear.
113
114 In the SPI mode number, CPOL is the high order bit and CPHA is the
115 low order bit. So when a chip's timing diagram shows the clock
116 starting low (CPOL=0) and data stabilized for sampling during the
117 trailing clock edge (CPHA=1), that's SPI mode 1.
118
119
120 How do these driver programming interfaces work?
121 ------------------------------------------------
122 The <linux/spi/spi.h> header file includes kerneldoc, as does the
123 main source code, and you should certainly read that chapter of the
124 kernel API document. This is just an overview, so you get the big
125 picture before those details.
126
127 SPI requests always go into I/O queues. Requests for a given SPI device
128 are always executed in FIFO order, and complete asynchronously through
129 completion callbacks. There are also some simple synchronous wrappers
130 for those calls, including ones for common transaction types like writing
131 a command and then reading its response.
132
133 There are two types of SPI driver, here called:
134
135 Controller drivers ... controllers may be built in to System-On-Chip
136 processors, and often support both Master and Slave roles.
137 These drivers touch hardware registers and may use DMA.
138 Or they can be PIO bitbangers, needing just GPIO pins.
139
140 Protocol drivers ... these pass messages through the controller
141 driver to communicate with a Slave or Master device on the
142 other side of an SPI link.
143
144 So for example one protocol driver might talk to the MTD layer to export
145 data to filesystems stored on SPI flash like DataFlash; and others might
146 control audio interfaces, present touchscreen sensors as input interfaces,
147 or monitor temperature and voltage levels during industrial processing.
148 And those might all be sharing the same controller driver.
149
150 A "struct spi_device" encapsulates the master-side interface between
151 those two types of driver. At this writing, Linux has no slave side
152 programming interface.
153
154 There is a minimal core of SPI programming interfaces, focussing on
155 using the driver model to connect controller and protocol drivers using
156 device tables provided by board specific initialization code. SPI
157 shows up in sysfs in several locations:
158
159 /sys/devices/.../CTLR/spiB.C ... spi_device on bus "B",
160 chipselect C, accessed through CTLR.
161
162 /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver
163 that should be used with this device (for hotplug/coldplug)
164
165 /sys/bus/spi/devices/spiB.C ... symlink to the physical
166 spiB.C device
167
168 /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
169
170 /sys/class/spi_master/spiB ... class device for the controller
171 managing bus "B". All the spiB.* devices share the same
172 physical SPI bus segment, with SCLK, MOSI, and MISO.
173
174
175 How does board-specific init code declare SPI devices?
176 ------------------------------------------------------
177 Linux needs several kinds of information to properly configure SPI devices.
178 That information is normally provided by board-specific code, even for
179 chips that do support some of automated discovery/enumeration.
180
181 DECLARE CONTROLLERS
182
183 The first kind of information is a list of what SPI controllers exist.
184 For System-on-Chip (SOC) based boards, these will usually be platform
185 devices, and the controller may need some platform_data in order to
186 operate properly. The "struct platform_device" will include resources
187 like the physical address of the controller's first register and its IRQ.
188
189 Platforms will often abstract the "register SPI controller" operation,
190 maybe coupling it with code to initialize pin configurations, so that
191 the arch/.../mach-*/board-*.c files for several boards can all share the
192 same basic controller setup code. This is because most SOCs have several
193 SPI-capable controllers, and only the ones actually usable on a given
194 board should normally be set up and registered.
195
196 So for example arch/.../mach-*/board-*.c files might have code like:
197
198 #include <asm/arch/spi.h> /* for mysoc_spi_data */
199
200 /* if your mach-* infrastructure doesn't support kernels that can
201 * run on multiple boards, pdata wouldn't benefit from "__init".
202 */
203 static struct mysoc_spi_data __init pdata = { ... };
204
205 static __init board_init(void)
206 {
207 ...
208 /* this board only uses SPI controller #2 */
209 mysoc_register_spi(2, &pdata);
210 ...
211 }
212
213 And SOC-specific utility code might look something like:
214
215 #include <asm/arch/spi.h>
216
217 static struct platform_device spi2 = { ... };
218
219 void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata)
220 {
221 struct mysoc_spi_data *pdata2;
222
223 pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL);
224 *pdata2 = pdata;
225 ...
226 if (n == 2) {
227 spi2->dev.platform_data = pdata2;
228 register_platform_device(&spi2);
229
230 /* also: set up pin modes so the spi2 signals are
231 * visible on the relevant pins ... bootloaders on
232 * production boards may already have done this, but
233 * developer boards will often need Linux to do it.
234 */
235 }
236 ...
237 }
238
239 Notice how the platform_data for boards may be different, even if the
240 same SOC controller is used. For example, on one board SPI might use
241 an external clock, where another derives the SPI clock from current
242 settings of some master clock.
243
244
245 DECLARE SLAVE DEVICES
246
247 The second kind of information is a list of what SPI slave devices exist
248 on the target board, often with some board-specific data needed for the
249 driver to work correctly.
250
251 Normally your arch/.../mach-*/board-*.c files would provide a small table
252 listing the SPI devices on each board. (This would typically be only a
253 small handful.) That might look like:
254
255 static struct ads7846_platform_data ads_info = {
256 .vref_delay_usecs = 100,
257 .x_plate_ohms = 580,
258 .y_plate_ohms = 410,
259 };
260
261 static struct spi_board_info spi_board_info[] __initdata = {
262 {
263 .modalias = "ads7846",
264 .platform_data = &ads_info,
265 .mode = SPI_MODE_0,
266 .irq = GPIO_IRQ(31),
267 .max_speed_hz = 120000 /* max sample rate at 3V */ * 16,
268 .bus_num = 1,
269 .chip_select = 0,
270 },
271 };
272
273 Again, notice how board-specific information is provided; each chip may need
274 several types. This example shows generic constraints like the fastest SPI
275 clock to allow (a function of board voltage in this case) or how an IRQ pin
276 is wired, plus chip-specific constraints like an important delay that's
277 changed by the capacitance at one pin.
278
279 (There's also "controller_data", information that may be useful to the
280 controller driver. An example would be peripheral-specific DMA tuning
281 data or chipselect callbacks. This is stored in spi_device later.)
282
283 The board_info should provide enough information to let the system work
284 without the chip's driver being loaded. The most troublesome aspect of
285 that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since
286 sharing a bus with a device that interprets chipselect "backwards" is
287 not possible until the infrastructure knows how to deselect it.
288
289 Then your board initialization code would register that table with the SPI
290 infrastructure, so that it's available later when the SPI master controller
291 driver is registered:
292
293 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
294
295 Like with other static board-specific setup, you won't unregister those.
296
297 The widely used "card" style computers bundle memory, cpu, and little else
298 onto a card that's maybe just thirty square centimeters. On such systems,
299 your arch/.../mach-.../board-*.c file would primarily provide information
300 about the devices on the mainboard into which such a card is plugged. That
301 certainly includes SPI devices hooked up through the card connectors!
302
303
304 NON-STATIC CONFIGURATIONS
305
306 Developer boards often play by different rules than product boards, and one
307 example is the potential need to hotplug SPI devices and/or controllers.
308
309 For those cases you might need to use spi_busnum_to_master() to look
310 up the spi bus master, and will likely need spi_new_device() to provide the
311 board info based on the board that was hotplugged. Of course, you'd later
312 call at least spi_unregister_device() when that board is removed.
313
314 When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
315 configurations will also be dynamic. Fortunately, such devices all support
316 basic device identification probes, so they should hotplug normally.
317
318
319 How do I write an "SPI Protocol Driver"?
320 ----------------------------------------
321 Most SPI drivers are currently kernel drivers, but there's also support
322 for userspace drivers. Here we talk only about kernel drivers.
323
324 SPI protocol drivers somewhat resemble platform device drivers:
325
326 static struct spi_driver CHIP_driver = {
327 .driver = {
328 .name = "CHIP",
329 .owner = THIS_MODULE,
330 },
331
332 .probe = CHIP_probe,
333 .remove = __devexit_p(CHIP_remove),
334 .suspend = CHIP_suspend,
335 .resume = CHIP_resume,
336 };
337
338 The driver core will autmatically attempt to bind this driver to any SPI
339 device whose board_info gave a modalias of "CHIP". Your probe() code
340 might look like this unless you're creating a class_device:
341
342 static int __devinit CHIP_probe(struct spi_device *spi)
343 {
344 struct CHIP *chip;
345 struct CHIP_platform_data *pdata;
346
347 /* assuming the driver requires board-specific data: */
348 pdata = &spi->dev.platform_data;
349 if (!pdata)
350 return -ENODEV;
351
352 /* get memory for driver's per-chip state */
353 chip = kzalloc(sizeof *chip, GFP_KERNEL);
354 if (!chip)
355 return -ENOMEM;
356 spi_set_drvdata(spi, chip);
357
358 ... etc
359 return 0;
360 }
361
362 As soon as it enters probe(), the driver may issue I/O requests to
363 the SPI device using "struct spi_message". When remove() returns,
364 or after probe() fails, the driver guarantees that it won't submit
365 any more such messages.
366
367 - An spi_message is a sequence of protocol operations, executed
368 as one atomic sequence. SPI driver controls include:
369
370 + when bidirectional reads and writes start ... by how its
371 sequence of spi_transfer requests is arranged;
372
373 + optionally defining short delays after transfers ... using
374 the spi_transfer.delay_usecs setting;
375
376 + whether the chipselect becomes inactive after a transfer and
377 any delay ... by using the spi_transfer.cs_change flag;
378
379 + hinting whether the next message is likely to go to this same
380 device ... using the spi_transfer.cs_change flag on the last
381 transfer in that atomic group, and potentially saving costs
382 for chip deselect and select operations.
383
384 - Follow standard kernel rules, and provide DMA-safe buffers in
385 your messages. That way controller drivers using DMA aren't forced
386 to make extra copies unless the hardware requires it (e.g. working
387 around hardware errata that force the use of bounce buffering).
388
389 If standard dma_map_single() handling of these buffers is inappropriate,
390 you can use spi_message.is_dma_mapped to tell the controller driver
391 that you've already provided the relevant DMA addresses.
392
393 - The basic I/O primitive is spi_async(). Async requests may be
394 issued in any context (irq handler, task, etc) and completion
395 is reported using a callback provided with the message.
396 After any detected error, the chip is deselected and processing
397 of that spi_message is aborted.
398
399 - There are also synchronous wrappers like spi_sync(), and wrappers
400 like spi_read(), spi_write(), and spi_write_then_read(). These
401 may be issued only in contexts that may sleep, and they're all
402 clean (and small, and "optional") layers over spi_async().
403
404 - The spi_write_then_read() call, and convenience wrappers around
405 it, should only be used with small amounts of data where the
406 cost of an extra copy may be ignored. It's designed to support
407 common RPC-style requests, such as writing an eight bit command
408 and reading a sixteen bit response -- spi_w8r16() being one its
409 wrappers, doing exactly that.
410
411 Some drivers may need to modify spi_device characteristics like the
412 transfer mode, wordsize, or clock rate. This is done with spi_setup(),
413 which would normally be called from probe() before the first I/O is
414 done to the device. However, that can also be called at any time
415 that no message is pending for that device.
416
417 While "spi_device" would be the bottom boundary of the driver, the
418 upper boundaries might include sysfs (especially for sensor readings),
419 the input layer, ALSA, networking, MTD, the character device framework,
420 or other Linux subsystems.
421
422 Note that there are two types of memory your driver must manage as part
423 of interacting with SPI devices.
424
425 - I/O buffers use the usual Linux rules, and must be DMA-safe.
426 You'd normally allocate them from the heap or free page pool.
427 Don't use the stack, or anything that's declared "static".
428
429 - The spi_message and spi_transfer metadata used to glue those
430 I/O buffers into a group of protocol transactions. These can
431 be allocated anywhere it's convenient, including as part of
432 other allocate-once driver data structures. Zero-init these.
433
434 If you like, spi_message_alloc() and spi_message_free() convenience
435 routines are available to allocate and zero-initialize an spi_message
436 with several transfers.
437
438
439 How do I write an "SPI Master Controller Driver"?
440 -------------------------------------------------
441 An SPI controller will probably be registered on the platform_bus; write
442 a driver to bind to the device, whichever bus is involved.
443
444 The main task of this type of driver is to provide an "spi_master".
445 Use spi_alloc_master() to allocate the master, and class_get_devdata()
446 to get the driver-private data allocated for that device.
447
448 struct spi_master *master;
449 struct CONTROLLER *c;
450
451 master = spi_alloc_master(dev, sizeof *c);
452 if (!master)
453 return -ENODEV;
454
455 c = class_get_devdata(&master->cdev);
456
457 The driver will initialize the fields of that spi_master, including the
458 bus number (maybe the same as the platform device ID) and three methods
459 used to interact with the SPI core and SPI protocol drivers. It will
460 also initialize its own internal state. (See below about bus numbering
461 and those methods.)
462
463 After you initialize the spi_master, then use spi_register_master() to
464 publish it to the rest of the system. At that time, device nodes for
465 the controller and any predeclared spi devices will be made available,
466 and the driver model core will take care of binding them to drivers.
467
468 If you need to remove your SPI controller driver, spi_unregister_master()
469 will reverse the effect of spi_register_master().
470
471
472 BUS NUMBERING
473
474 Bus numbering is important, since that's how Linux identifies a given
475 SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
476 SOC systems, the bus numbers should match the numbers defined by the chip
477 manufacturer. For example, hardware controller SPI2 would be bus number 2,
478 and spi_board_info for devices connected to it would use that number.
479
480 If you don't have such hardware-assigned bus number, and for some reason
481 you can't just assign them, then provide a negative bus number. That will
482 then be replaced by a dynamically assigned number. You'd then need to treat
483 this as a non-static configuration (see above).
484
485
486 SPI MASTER METHODS
487
488 master->setup(struct spi_device *spi)
489 This sets up the device clock rate, SPI mode, and word sizes.
490 Drivers may change the defaults provided by board_info, and then
491 call spi_setup(spi) to invoke this routine. It may sleep.
492 Unless each SPI slave has its own configuration registers, don't
493 change them right away ... otherwise drivers could corrupt I/O
494 that's in progress for other SPI devices.
495
496 master->transfer(struct spi_device *spi, struct spi_message *message)
497 This must not sleep. Its responsibility is arrange that the
498 transfer happens and its complete() callback is issued. The two
499 will normally happen later, after other transfers complete, and
500 if the controller is idle it will need to be kickstarted.
501
502 master->cleanup(struct spi_device *spi)
503 Your controller driver may use spi_device.controller_state to hold
504 state it dynamically associates with that device. If you do that,
505 be sure to provide the cleanup() method to free that state.
506
507
508 SPI MESSAGE QUEUE
509
510 The bulk of the driver will be managing the I/O queue fed by transfer().
511
512 That queue could be purely conceptual. For example, a driver used only
513 for low-frequency sensor acess might be fine using synchronous PIO.
514
515 But the queue will probably be very real, using message->queue, PIO,
516 often DMA (especially if the root filesystem is in SPI flash), and
517 execution contexts like IRQ handlers, tasklets, or workqueues (such
518 as keventd). Your driver can be as fancy, or as simple, as you need.
519 Such a transfer() method would normally just add the message to a
520 queue, and then start some asynchronous transfer engine (unless it's
521 already running).
522
523
524 THANKS TO
525 ---------
526 Contributors to Linux-SPI discussions include (in alphabetical order,
527 by last name):
528
529 David Brownell
530 Russell King
531 Dmitry Pervushin
532 Stephen Street
533 Mark Underwood
534 Andrew Victor
535 Vitaly Wool
536