arch/alpha/kernel/head.S

   1 /*
   2  * alpha/boot/head.S
   3  *
   4  * initial boot stuff.. At this point, the bootloader has already
   5  * switched into OSF/1 PAL-code, and loaded us at the correct address
   6  * (START_ADDR).  So there isn't much left for us to do: just set up
   7  * the kernel global pointer and jump to the kernel entry-point.
   8  */
   9
  10 #include <linux/config.h>
  11 #include <asm/system.h>
  12 #include <asm/asm_offsets.h>
  13
  14 .globl swapper_pg_dir
  15 .globl _stext
  16 swapper_pg_dir=SWAPPER_PGD
  17
  18         .set noreorder
  19         .globl  __start
  20         .ent    __start
  21 _stext:
  22 __start:
  23         .prologue 0
  24         br      $27,1f
  25 1:      ldgp    $29,0($27)
  26         /* We need to get current_task_info loaded up...  */
  27         lda     $8,init_thread_union
  28         /* ... and find our stack ... */
  29         lda     $30,0x4000 - SIZEOF_PT_REGS($8)
  30         /* ... and then we can start the kernel.  */
  31         jsr     $26,start_kernel
  32         call_pal PAL_halt
  33         .end __start
  34
  35 #ifdef CONFIG_SMP
  36         .align 3
  37         .globl  __smp_callin
  38         .ent    __smp_callin
  39         /* On entry here from SRM console, the HWPCB of the per-cpu
  40            slot for this processor has been loaded.  We've arranged
  41            for the UNIQUE value for this process to contain the PCBB
  42            of the target idle task.  */
  43 __smp_callin:
  44         .prologue 1
  45         ldgp    $29,0($27)      # First order of business, load the GP.
  46
  47         call_pal PAL_rduniq     # Grab the target PCBB.
  48         mov     $0,$16          # Install it.
  49         call_pal PAL_swpctx
  50
  51         lda     $8,0x3fff       # Find "current".
  52         bic     $30,$8,$8
  53
  54         jsr     $26,smp_callin
  55         call_pal PAL_halt
  56         .end __smp_callin
  57 #endif /* CONFIG_SMP */
  58
  59         #
  60         # The following two functions are needed for supporting SRM PALcode
  61         # on the PC164 (at least), since that PALcode manages the interrupt
  62         # masking, and we cannot duplicate the effort without causing problems
  63         #
  64
  65         .align 3
  66         .globl  cserve_ena
  67         .ent    cserve_ena
  68 cserve_ena:
  69         .prologue 0
  70         bis     $16,$16,$17
  71         lda     $16,52($31)
  72         call_pal PAL_cserve
  73         ret     ($26)
  74         .end    cserve_ena
  75
  76         .align 3
  77         .globl  cserve_dis
  78         .ent    cserve_dis
  79 cserve_dis:
  80         .prologue 0
  81         bis     $16,$16,$17
  82         lda     $16,53($31)
  83         call_pal PAL_cserve
  84         ret     ($26)
  85         .end    cserve_dis
  86
  87         #
  88         # It is handy, on occasion, to make halt actually just loop.
  89         # Putting it here means we dont have to recompile the whole
  90         # kernel.
  91         #
  92
  93         .align 3
  94         .globl  halt
  95         .ent    halt
  96 halt:
  97         .prologue 0
  98         call_pal PAL_halt
  99         .end    halt