2 * linux/arch/alpha/lib/memset.S
4 * This is an efficient (and small) implementation of the C library "memset()"
5 * function for the alpha.
7 * (C) Copyright 1996 Linus Torvalds
9 * This routine is "moral-ware": you are free to use it any way you wish, and
10 * the only obligation I put on you is a moral one: if you make any improvements
11 * to the routine, please send me your improvements for me to use similarly.
13 * The scheduling comments are according to the EV5 documentation (and done by
14 * hand, so they might well be incorrect, please do tell me about it..)
24 .globl __constant_c_memset
32 and $17,255,$1 /* E1 */
33 insbl $17,1,$17 /* .. E0 */
34 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
35 sll $17,16,$1 /* E1 (p-c latency, next cycle) */
37 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
38 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
39 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
40 ldq_u $31,0($30) /* .. E1 */
44 addq $18,$16,$6 /* E0 */
45 bis $16,$16,$0 /* .. E1 */
46 xor $16,$6,$1 /* E0 */
47 ble $18,end /* .. E1 */
50 beq $1,within_one_quad /* .. E1 (note EV5 zero-latency forwarding) */
52 beq $3,aligned /* .. E1 (note EV5 zero-latency forwarding) */
54 ldq_u $4,0($16) /* E0 */
55 bis $16,$16,$5 /* .. E1 */
56 insql $17,$16,$2 /* E0 */
57 subq $3,8,$3 /* .. E1 */
59 addq $18,$3,$18 /* E0 $18 is new count ($3 is negative) */
60 mskql $4,$16,$4 /* .. E1 (and possible load stall) */
61 subq $16,$3,$16 /* E0 $16 is new aligned destination */
62 bis $2,$4,$1 /* .. E1 */
64 bis $31,$31,$31 /* E0 */
65 ldq_u $31,0($30) /* .. E1 */
66 stq_u $1,0($5) /* E0 */
67 bis $31,$31,$31 /* .. E1 */
72 and $18,7,$18 /* .. E1 */
73 bis $16,$16,$5 /* E0 */
74 beq $3,no_quad /* .. E1 */
78 stq $17,0($5) /* E0 */
79 subq $3,1,$3 /* .. E1 */
81 bne $3,loop /* .. E1 */
84 bis $31,$31,$31 /* E0 */
85 beq $18,end /* .. E1 */
87 mskqh $7,$6,$2 /* .. E1 (and load stall) */
89 insqh $17,$6,$4 /* E0 */
90 bis $2,$4,$1 /* .. E1 */
92 ret $31,($26),1 /* .. E1 */
96 ldq_u $1,0($16) /* E0 */
97 insql $17,$16,$2 /* E1 */
98 mskql $1,$16,$4 /* E0 (after load stall) */
101 mskql $2,$6,$4 /* E0 */
102 mskqh $1,$6,$2 /* .. E1 */
103 bis $2,$4,$1 /* E0 */
104 stq_u $1,0($16) /* E0 */
107 ret $31,($26),1 /* E1 */
115 inswl $17,0,$1 /* E0 */
116 inswl $17,2,$2 /* E0 */
117 inswl $17,4,$3 /* E0 */
118 or $1,$2,$1 /* .. E1 */
119 inswl $17,6,$4 /* E0 */
120 or $1,$3,$1 /* .. E1 */
121 or $1,$4,$17 /* E0 */
122 br __constant_c_memset /* .. E1 */