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1 #
2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 #
4 # This program is free software; you can redistribute it and/or modify
5 # it under the terms of the GNU General Public License version 2 as
6 # published by the Free Software Foundation.
7 #
8
9 config ARC
10 def_bool y
11 select CLONE_BACKWARDS
12 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
13 select DEVTMPFS if !INITRAMFS_SOURCE=""
14 select GENERIC_ATOMIC64
15 select GENERIC_CLOCKEVENTS
16 select GENERIC_FIND_FIRST_BIT
17 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_SHOW
19 select GENERIC_PENDING_IRQ if SMP
20 select GENERIC_SMP_IDLE_THREAD
21 select HAVE_ARCH_KGDB
22 select HAVE_ARCH_TRACEHOOK
23 select HAVE_IOREMAP_PROT
24 select HAVE_KPROBES
25 select HAVE_KRETPROBES
26 select HAVE_MEMBLOCK
27 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
28 select HAVE_OPROFILE
29 select HAVE_PERF_EVENTS
30 select IRQ_DOMAIN
31 select MODULES_USE_ELF_RELA
32 select NO_BOOTMEM
33 select OF
34 select OF_EARLY_FLATTREE
35 select PERF_USE_VMALLOC
36 select HAVE_DEBUG_STACKOVERFLOW
37
38 config TRACE_IRQFLAGS_SUPPORT
39 def_bool y
40
41 config LOCKDEP_SUPPORT
42 def_bool y
43
44 config SCHED_OMIT_FRAME_POINTER
45 def_bool y
46
47 config GENERIC_CSUM
48 def_bool y
49
50 config RWSEM_GENERIC_SPINLOCK
51 def_bool y
52
53 config ARCH_FLATMEM_ENABLE
54 def_bool y
55
56 config MMU
57 def_bool y
58
59 config NO_IOPORT
60 def_bool y
61
62 config GENERIC_CALIBRATE_DELAY
63 def_bool y
64
65 config GENERIC_HWEIGHT
66 def_bool y
67
68 config STACKTRACE_SUPPORT
69 def_bool y
70 select STACKTRACE
71
72 config HAVE_LATENCYTOP_SUPPORT
73 def_bool y
74
75 config NO_DMA
76 def_bool n
77
78 source "init/Kconfig"
79 source "kernel/Kconfig.freezer"
80
81 menu "ARC Architecture Configuration"
82
83 menu "ARC Platform/SoC/Board"
84
85 source "arch/arc/plat-arcfpga/Kconfig"
86 source "arch/arc/plat-tb10x/Kconfig"
87 #New platform adds here
88
89 endmenu
90
91 menu "ARC CPU Configuration"
92
93 choice
94 prompt "ARC Core"
95 default ARC_CPU_770
96
97 config ARC_CPU_750D
98 bool "ARC750D"
99 help
100 Support for ARC750 core
101
102 config ARC_CPU_770
103 bool "ARC770"
104 select ARC_CPU_REL_4_10
105 help
106 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
107 This core has a bunch of cool new features:
108 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
109 Shared Address Spaces (for sharing TLB entires in MMU)
110 -Caches: New Prog Model, Region Flush
111 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
112
113 endchoice
114
115 config CPU_BIG_ENDIAN
116 bool "Enable Big Endian Mode"
117 default n
118 help
119 Build kernel for Big Endian Mode of ARC CPU
120
121 # If a platform can't work with 0x8000_0000 based dma_addr_t
122 config ARC_PLAT_NEEDS_CPU_TO_DMA
123 bool
124
125 config SMP
126 bool "Symmetric Multi-Processing (Incomplete)"
127 default n
128 help
129 This enables support for systems with more than one CPU. If you have
130 a system with only one CPU, like most personal computers, say N. If
131 you have a system with more than one CPU, say Y.
132
133 if SMP
134
135 config ARC_HAS_COH_CACHES
136 def_bool n
137
138 config ARC_HAS_REENTRANT_IRQ_LV2
139 def_bool n
140
141 endif
142
143 config NR_CPUS
144 int "Maximum number of CPUs (2-4096)"
145 range 2 4096
146 depends on SMP
147 default "2"
148
149 menuconfig ARC_CACHE
150 bool "Enable Cache Support"
151 default y
152 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
153 depends on !SMP || ARC_HAS_COH_CACHES
154
155 if ARC_CACHE
156
157 config ARC_CACHE_LINE_SHIFT
158 int "Cache Line Length (as power of 2)"
159 range 5 7
160 default "6"
161 help
162 Starting with ARC700 4.9, Cache line length is configurable,
163 This option specifies "N", with Line-len = 2 power N
164 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
165 Linux only supports same line lengths for I and D caches.
166
167 config ARC_HAS_ICACHE
168 bool "Use Instruction Cache"
169 default y
170
171 config ARC_HAS_DCACHE
172 bool "Use Data Cache"
173 default y
174
175 config ARC_CACHE_PAGES
176 bool "Per Page Cache Control"
177 default y
178 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
179 help
180 This can be used to over-ride the global I/D Cache Enable on a
181 per-page basis (but only for pages accessed via MMU such as
182 Kernel Virtual address or User Virtual Address)
183 TLB entries have a per-page Cache Enable Bit.
184 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
185 Global DISABLE + Per Page ENABLE won't work
186
187 config ARC_CACHE_VIPT_ALIASING
188 bool "Support VIPT Aliasing D$"
189 depends on ARC_HAS_DCACHE
190 default n
191
192 endif #ARC_CACHE
193
194 config ARC_HAS_ICCM
195 bool "Use ICCM"
196 help
197 Single Cycle RAMS to store Fast Path Code
198 default n
199
200 config ARC_ICCM_SZ
201 int "ICCM Size in KB"
202 default "64"
203 depends on ARC_HAS_ICCM
204
205 config ARC_HAS_DCCM
206 bool "Use DCCM"
207 help
208 Single Cycle RAMS to store Fast Path Data
209 default n
210
211 config ARC_DCCM_SZ
212 int "DCCM Size in KB"
213 default "64"
214 depends on ARC_HAS_DCCM
215
216 config ARC_DCCM_BASE
217 hex "DCCM map address"
218 default "0xA0000000"
219 depends on ARC_HAS_DCCM
220
221 config ARC_HAS_HW_MPY
222 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
223 default y
224 help
225 Influences how gcc generates code for MPY operations.
226 If enabled, MPYxx insns are generated, provided by Standard/XMAC
227 Multipler. Otherwise software multipy lib is used
228
229 choice
230 prompt "ARC700 MMU Version"
231 default ARC_MMU_V3 if ARC_CPU_770
232 default ARC_MMU_V2 if ARC_CPU_750D
233
234 config ARC_MMU_V1
235 bool "MMU v1"
236 help
237 Orig ARC700 MMU
238
239 config ARC_MMU_V2
240 bool "MMU v2"
241 help
242 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
243 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
244
245 config ARC_MMU_V3
246 bool "MMU v3"
247 depends on ARC_CPU_770
248 help
249 Introduced with ARC700 4.10: New Features
250 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
251 Shared Address Spaces (SASID)
252
253 endchoice
254
255
256 choice
257 prompt "MMU Page Size"
258 default ARC_PAGE_SIZE_8K
259
260 config ARC_PAGE_SIZE_8K
261 bool "8KB"
262 help
263 Choose between 8k vs 16k
264
265 config ARC_PAGE_SIZE_16K
266 bool "16KB"
267 depends on ARC_MMU_V3
268
269 config ARC_PAGE_SIZE_4K
270 bool "4KB"
271 depends on ARC_MMU_V3
272
273 endchoice
274
275 config ARC_COMPACT_IRQ_LEVELS
276 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
277 default n
278 # Timer HAS to be high priority, for any other high priority config
279 select ARC_IRQ3_LV2
280 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
281 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
282
283 if ARC_COMPACT_IRQ_LEVELS
284
285 config ARC_IRQ3_LV2
286 bool
287
288 config ARC_IRQ5_LV2
289 bool
290
291 config ARC_IRQ6_LV2
292 bool
293
294 endif
295
296 config ARC_FPU_SAVE_RESTORE
297 bool "Enable FPU state persistence across context switch"
298 default n
299 help
300 Double Precision Floating Point unit had dedictaed regs which
301 need to be saved/restored across context-switch.
302 Note that ARC FPU is overly simplistic, unlike say x86, which has
303 hardware pieces to allow software to conditionally save/restore,
304 based on actual usage of FPU by a task. Thus our implemn does
305 this for all tasks in system.
306
307 config ARC_CANT_LLSC
308 def_bool n
309
310 menuconfig ARC_CPU_REL_4_10
311 bool "Enable support for Rel 4.10 features"
312 default n
313 help
314 -ARC770 (and dependent features) enabled
315 -ARC750 also shares some of the new features with 770
316
317 config ARC_HAS_LLSC
318 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
319 default y
320 depends on ARC_CPU_770 && !ARC_CANT_LLSC
321
322 config ARC_HAS_SWAPE
323 bool "Insn: SWAPE (endian-swap)"
324 default y
325 depends on ARC_CPU_REL_4_10
326
327 config ARC_HAS_RTSC
328 bool "Insn: RTSC (64-bit r/o cycle counter)"
329 default y
330 depends on ARC_CPU_REL_4_10
331 depends on !SMP
332
333 endmenu # "ARC CPU Configuration"
334
335 config LINUX_LINK_BASE
336 hex "Linux Link Address"
337 default "0x80000000"
338 help
339 ARC700 divides the 32 bit phy address space into two equal halves
340 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
341 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
342 Typically Linux kernel is linked at the start of untransalted addr,
343 hence the default value of 0x8zs.
344 However some customers have peripherals mapped at this addr, so
345 Linux needs to be scooted a bit.
346 If you don't know what the above means, leave this setting alone.
347
348 config ARC_CURR_IN_REG
349 bool "Dedicate Register r25 for current_task pointer"
350 default y
351 help
352 This reserved Register R25 to point to Current Task in
353 kernel mode. This saves memory access for each such access
354
355
356 config ARC_MISALIGN_ACCESS
357 bool "Emulate unaligned memory access (userspace only)"
358 default N
359 select SYSCTL_ARCH_UNALIGN_NO_WARN
360 select SYSCTL_ARCH_UNALIGN_ALLOW
361 help
362 This enables misaligned 16 & 32 bit memory access from user space.
363 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
364 potential bugs in code
365
366 config HZ
367 int "Timer Frequency"
368 default 100
369
370 config ARC_METAWARE_HLINK
371 bool "Support for Metaware debugger assisted Host access"
372 default n
373 help
374 This options allows a Linux userland apps to directly access
375 host file system (open/creat/read/write etc) with help from
376 Metaware Debugger. This can come in handy for Linux-host communication
377 when there is no real usable peripheral such as EMAC.
378
379 menuconfig ARC_DBG
380 bool "ARC debugging"
381 default y
382
383 config ARC_DW2_UNWIND
384 bool "Enable DWARF specific kernel stack unwind"
385 depends on ARC_DBG
386 default y
387 select KALLSYMS
388 help
389 Compiles the kernel with DWARF unwind information and can be used
390 to get stack backtraces.
391
392 If you say Y here the resulting kernel image will be slightly larger
393 but not slower, and it will give very useful debugging information.
394 If you don't debug the kernel, you can say N, but we may not be able
395 to solve problems without frame unwind information
396
397 config ARC_DBG_TLB_PARANOIA
398 bool "Paranoia Checks in Low Level TLB Handlers"
399 depends on ARC_DBG
400 default n
401
402 config ARC_DBG_TLB_MISS_COUNT
403 bool "Profile TLB Misses"
404 default n
405 select DEBUG_FS
406 depends on ARC_DBG
407 help
408 Counts number of I and D TLB Misses and exports them via Debugfs
409 The counters can be cleared via Debugfs as well
410
411 config CMDLINE_UBOOT
412 bool "Support U-boot kernel command line passing"
413 default n
414 help
415 If you are using U-boot (www.denx.de) and wish to pass the kernel
416 command line from the U-boot environment to the Linux kernel then
417 switch this option on.
418 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
419 to it. kernel startup code will append this to DeviceTree
420 /bootargs provided cmdline args.
421
422 config ARC_BUILTIN_DTB_NAME
423 string "Built in DTB"
424 help
425 Set the name of the DTB to embed in the vmlinux binary
426 Leaving it blank selects the minimal "skeleton" dtb
427
428 source "kernel/Kconfig.preempt"
429
430 menu "Executable file formats"
431 source "fs/Kconfig.binfmt"
432 endmenu
433
434 endmenu # "ARC Architecture Configuration"
435
436 source "mm/Kconfig"
437 source "net/Kconfig"
438 source "drivers/Kconfig"
439 source "fs/Kconfig"
440 source "arch/arc/Kconfig.debug"
441 source "security/Kconfig"
442 source "crypto/Kconfig"
443 source "lib/Kconfig"