]>
git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - arch/arc/include/asm/atomic.h
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #ifndef _ASM_ARC_ATOMIC_H
10 #define _ASM_ARC_ATOMIC_H
14 #include <linux/types.h>
15 #include <linux/compiler.h>
16 #include <asm/cmpxchg.h>
17 #include <asm/barrier.h>
20 #define atomic_read(v) ((v)->counter)
22 #ifdef CONFIG_ARC_HAS_LLSC
24 #define atomic_set(v, i) (((v)->counter) = (i))
26 #define ATOMIC_OP(op, c_op, asm_op) \
27 static inline void atomic_##op(int i, atomic_t *v) \
31 __asm__ __volatile__( \
32 "1: llock %0, [%1] \n" \
33 " " #asm_op " %0, %0, %2 \n" \
34 " scond %0, [%1] \n" \
36 : "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
37 : "r"(&v->counter), "ir"(i) \
41 #define ATOMIC_OP_RETURN(op, c_op, asm_op) \
42 static inline int atomic_##op##_return(int i, atomic_t *v) \
46 __asm__ __volatile__( \
47 "1: llock %0, [%1] \n" \
48 " " #asm_op " %0, %0, %2 \n" \
49 " scond %0, [%1] \n" \
52 : "r"(&v->counter), "ir"(i) \
58 #else /* !CONFIG_ARC_HAS_LLSC */
62 /* violating atomic_xxx API locking protocol in UP for optimization sake */
63 #define atomic_set(v, i) (((v)->counter) = (i))
67 static inline void atomic_set(atomic_t
*v
, int i
)
70 * Independent of hardware support, all of the atomic_xxx() APIs need
71 * to follow the same locking rules to make sure that a "hardware"
72 * atomic insn (e.g. LD) doesn't clobber an "emulated" atomic insn
75 * Thus atomic_set() despite being 1 insn (and seemingly atomic)
76 * requires the locking.
80 atomic_ops_lock(flags
);
82 atomic_ops_unlock(flags
);
88 * Non hardware assisted Atomic-R-M-W
89 * Locking would change to irq-disabling only (UP) and spinlocks (SMP)
92 #define ATOMIC_OP(op, c_op, asm_op) \
93 static inline void atomic_##op(int i, atomic_t *v) \
95 unsigned long flags; \
97 atomic_ops_lock(flags); \
99 atomic_ops_unlock(flags); \
102 #define ATOMIC_OP_RETURN(op, c_op) \
103 static inline int atomic_##op##_return(int i, atomic_t *v) \
105 unsigned long flags; \
106 unsigned long temp; \
108 atomic_ops_lock(flags); \
112 atomic_ops_unlock(flags); \
117 #endif /* !CONFIG_ARC_HAS_LLSC */
119 #define ATOMIC_OPS(op, c_op, asm_op) \
120 ATOMIC_OP(op, c_op, asm_op) \
121 ATOMIC_OP_RETURN(op, c_op, asm_op)
123 ATOMIC_OPS(add
, +=, add
)
124 ATOMIC_OPS(sub
, -=, sub
)
125 ATOMIC_OP(and, &=, and)
127 #define atomic_clear_mask(mask, v) atomic_and(~(mask), (v))
130 #undef ATOMIC_OP_RETURN
134 * __atomic_add_unless - add unless the number is a given value
135 * @v: pointer of type atomic_t
136 * @a: the amount to add to v...
137 * @u: ...unless v is equal to u.
139 * Atomically adds @a to @v, so long as it was not @u.
140 * Returns the old value of @v
142 #define __atomic_add_unless(v, a, u) \
145 c = atomic_read(v); \
146 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c)\
151 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
153 #define atomic_inc(v) atomic_add(1, v)
154 #define atomic_dec(v) atomic_sub(1, v)
156 #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
157 #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
158 #define atomic_inc_return(v) atomic_add_return(1, (v))
159 #define atomic_dec_return(v) atomic_sub_return(1, (v))
160 #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
162 #define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
164 #define ATOMIC_INIT(i) { (i) }
166 #include <asm-generic/atomic64.h>