2 #ifndef __ASM_ARC_ENTRY_ARCV2_H
3 #define __ASM_ARC_ENTRY_ARCV2_H
5 #include <asm/asm-offsets.h>
6 #include <asm/irqflags-arcv2.h>
7 #include <asm/thread_info.h> /* For THREAD_SIZE */
9 /*------------------------------------------------------------------------*/
10 .macro INTERRUPT_PROLOGUE called_from
12 ; Before jumping to Interrupt Vector
, hardware micro
-ops did following
:
13 ; 1. SP
auto-switched to kernel mode stack
14 ; 2. STATUS32
.Z flag set to U mode at time of
interrupt (U
:1, K
:0)
15 ; 3. Auto saved
: r0
-r11
, blink
, LPE
,LPS
,LPC
, JLI
,LDI
,EI
, PC
, STAT32
17 ; Now manually save
: r12
, sp
, fp
, gp
, r25
19 #ifdef CONFIG_ARC_HAS_ACCL_REGS
27 ; Saving pt_regs
->sp correctly requires some extra work due to the way
28 ; Auto stack
switch works
29 ; - U mode
: retrieve it from AUX_USER_SP
30 ; - K mode
: add the offset from current SP where H
/w starts
auto push
32 ; Utilize the fact that Z bit is set
if Intr taken in U mode
34 add
.nz r9
, r9
, SZ_PT_REGS
- PT_sp
- 4
44 #ifdef CONFIG_ARC_CURR_IN_REG
46 GET_CURR_TASK_ON_CPU r25
51 .ifnc \called_from
, exception
52 sub sp
, sp
, 12 ; BTA
/ECR
/orig_r0 placeholder per pt_regs
57 /*------------------------------------------------------------------------*/
58 .macro INTERRUPT_EPILOGUE called_from
60 .ifnc \called_from
, exception
61 add sp
, sp
, 12 ; skip BTA
/ECR
/orig_r0 placeholderss
64 #ifdef CONFIG_ARC_CURR_IN_REG
73 ; Don
't touch AUX_USER_SP if returning to K mode (Z bit set)
74 ; (Z bit set on K mode is inverse of INTERRUPT_PROLOGUE)
83 #ifdef CONFIG_ARC_HAS_ACCL_REGS
90 /*------------------------------------------------------------------------*/
91 .macro EXCEPTION_PROLOGUE
93 ; Before jumping to Exception Vector, hardware micro-ops did following:
94 ; 1. SP auto-switched to kernel mode stack
95 ; 2. STATUS32.Z flag set to U mode at time of interrupt (U:1,K:0)
97 ; Now manually save the complete reg file
99 PUSH r9 ; freeup a register: slot of erstatus
102 sub sp, sp, 12 ; skip JLI, LDI, EI
111 ld.as r9, [sp, 10] ; load stashed r9 (status32 stack slot)
113 st.as r10, [sp, 10] ; save status32 at it's right stack slot
126 ; -- for interrupts
, regs above are
auto-saved by h
/w in that order
--
127 ; Now
do what ISR prologue
does (manually save r12
, sp
, fp
, gp
, r25
)
129 ; Set Z flag
if this was from U
mode (expected by INTERRUPT_PROLOGUE
)
130 ; Although H
/w exception micro
-ops
do set Z flag
for U
mode (just like
131 ; for interrupts
), it could get clobbered in
case we soft land here from
132 ; a TLB Miss exception
handler (tlbex
.S
)
134 and r10
, r10
, STATUS_U_MASK
135 xor.f
0, r10
, STATUS_U_MASK
137 INTERRUPT_PROLOGUE exception
140 PUSHAX ecr
; r9 contains ECR
, expected by EV_Trap
145 /*------------------------------------------------------------------------*/
146 .macro EXCEPTION_EPILOGUE
148 ; Assumes r0 has PT_status32
149 btst r0
, STATUS_U_BIT
; Z flag set
if K
, used in INTERRUPT_EPILOGUE
151 add sp
, sp
, 8 ; orig_r0
/ECR don
't need restoring
154 INTERRUPT_EPILOGUE exception
176 add sp, sp, 12 ; skip JLI, LDI, EI
180 ld.as r9, [sp, -12] ; reload r9 which got clobbered
183 .macro FAKE_RET_FROM_EXCPN
185 bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK)
186 or r9, r9, (STATUS_L_MASK|STATUS_IE_MASK)
190 /* Get thread_info of "current" tsk */
191 .macro GET_CURR_THR_INFO_FROM_SP reg
192 bmskn \reg, sp, THREAD_SHIFT - 1
195 /* Get CPU-ID of this core */
196 .macro GET_CPU_ID reg
198 xbfu \reg, \reg, 0xE8 /* 00111 01000 */