arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/clk-provider.h>
  14 #include <linux/clocksource.h>
  15 #include <linux/console.h>
  16 #include <linux/module.h>
  17 #include <linux/cpu.h>
  18 #include <linux/of_fdt.h>
  19 #include <linux/of.h>
  20 #include <linux/cache.h>
  21 #include <asm/sections.h>
  22 #include <asm/arcregs.h>
  23 #include <asm/tlb.h>
  24 #include <asm/setup.h>
  25 #include <asm/page.h>
  26 #include <asm/irq.h>
  27 #include <asm/unwind.h>
  28 #include <asm/mach_desc.h>
  29 #include <asm/smp.h>
  30
  31 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  32
  33 unsigned int intr_to_DE_cnt;
  34
  35 /* Part of U-boot ABI: see head.S */
  36 int __initdata uboot_tag;
  37 char __initdata *uboot_arg;
  38
  39 const struct machine_desc *machine_desc;
  40
  41 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  42
  43 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  44
  45 static const struct id_to_str arc_cpu_rel[] = {
  46 #ifdef CONFIG_ISA_ARCOMPACT
  47         { 0x34, "R4.10"},
  48         { 0x35, "R4.11"},
  49 #else
  50         { 0x51, "R2.0" },
  51         { 0x52, "R2.1" },
  52         { 0x53, "R3.0" },
  53 #endif
  54         { 0x00, NULL   }
  55 };
  56
  57 static const struct id_to_str arc_cpu_nm[] = {
  58 #ifdef CONFIG_ISA_ARCOMPACT
  59         { 0x20, "ARC 600"   },
  60         { 0x30, "ARC 770"   },  /* 750 identified seperately */
  61 #else
  62         { 0x40, "ARC EM"  },
  63         { 0x50, "ARC HS38"  },
  64 #endif
  65         { 0x00, "Unknown"   }
  66 };
  67
  68 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  69 {
  70         if (is_isa_arcompact()) {
  71                 struct bcr_iccm_arcompact iccm;
  72                 struct bcr_dccm_arcompact dccm;
  73
  74                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  75                 if (iccm.ver) {
  76                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  77                         cpu->iccm.base_addr = iccm.base << 16;
  78                 }
  79
  80                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  81                 if (dccm.ver) {
  82                         unsigned long base;
  83                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  84
  85                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  86                         cpu->dccm.base_addr = base & ~0xF;
  87                 }
  88         } else {
  89                 struct bcr_iccm_arcv2 iccm;
  90                 struct bcr_dccm_arcv2 dccm;
  91                 unsigned long region;
  92
  93                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  94                 if (iccm.ver) {
  95                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  96                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  97                                 cpu->iccm.sz <<= iccm.sz01;
  98
  99                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 100                         cpu->iccm.base_addr = region & 0xF0000000;
 101                 }
 102
 103                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 104                 if (dccm.ver) {
 105                         cpu->dccm.sz = 256 << dccm.sz0;
 106                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 107                                 cpu->dccm.sz <<= dccm.sz1;
 108
 109                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 110                         cpu->dccm.base_addr = region & 0xF0000000;
 111                 }
 112         }
 113 }
 114
 115 static void read_arc_build_cfg_regs(void)
 116 {
 117         struct bcr_timer timer;
 118         struct bcr_generic bcr;
 119         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 120         const struct id_to_str *tbl;
 121
 122         FIX_PTR(cpu);
 123
 124         READ_BCR(AUX_IDENTITY, cpu->core);
 125         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
 126
 127         for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
 128                 if (cpu->core.family == tbl->id) {
 129                         cpu->details = tbl->str;
 130                         break;
 131                 }
 132         }
 133
 134         for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
 135                 if ((cpu->core.family & 0xF0) == tbl->id)
 136                         break;
 137         }
 138         cpu->name = tbl->str;
 139
 140         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 141         cpu->extn.timer0 = timer.t0;
 142         cpu->extn.timer1 = timer.t1;
 143         cpu->extn.rtc = timer.rtc;
 144
 145         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 146
 147         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 148
 149         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 150         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 151         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 152         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 153         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 154         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 155                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 156
 157         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 158
 159         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 160         read_decode_ccm_bcr(cpu);
 161
 162         read_decode_mmu_bcr();
 163         read_decode_cache_bcr();
 164
 165         if (is_isa_arcompact()) {
 166                 struct bcr_fp_arcompact sp, dp;
 167                 struct bcr_bpu_arcompact bpu;
 168
 169                 READ_BCR(ARC_REG_FP_BCR, sp);
 170                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 171                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 172                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 173
 174                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 175                 cpu->bpu.ver = bpu.ver;
 176                 cpu->bpu.full = bpu.fam ? 1 : 0;
 177                 if (bpu.ent) {
 178                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 179                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 180                 }
 181         } else {
 182                 struct bcr_fp_arcv2 spdp;
 183                 struct bcr_bpu_arcv2 bpu;
 184
 185                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 186                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 187                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 188
 189                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 190                 cpu->bpu.ver = bpu.ver;
 191                 cpu->bpu.full = bpu.ft;
 192                 cpu->bpu.num_cache = 256 << bpu.bce;
 193                 cpu->bpu.num_pred = 2048 << bpu.pte;
 194         }
 195
 196         READ_BCR(ARC_REG_AP_BCR, bcr);
 197         cpu->extn.ap = bcr.ver ? 1 : 0;
 198
 199         READ_BCR(ARC_REG_SMART_BCR, bcr);
 200         cpu->extn.smart = bcr.ver ? 1 : 0;
 201
 202         READ_BCR(ARC_REG_RTT_BCR, bcr);
 203         cpu->extn.rtt = bcr.ver ? 1 : 0;
 204
 205         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 206
 207         /* some hacks for lack of feature BCR info in old ARC700 cores */
 208         if (is_isa_arcompact()) {
 209                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 210                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 211                 else
 212                         cpu->isa.atomic = cpu->isa.atomic1;
 213
 214                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 215
 216                  /* there's no direct way to distinguish 750 vs. 770 */
 217                 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
 218                         cpu->name = "ARC750";
 219         }
 220 }
 221
 222 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 223 {
 224         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 225         struct bcr_identity *core = &cpu->core;
 226         int i, n = 0;
 227
 228         FIX_PTR(cpu);
 229
 230         n += scnprintf(buf + n, len - n,
 231                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 232                        core->family, core->cpu_id, core->chip_id);
 233
 234         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s\n",
 235                        cpu_id, cpu->name, cpu->details,
 236                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 237                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"));
 238
 239         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 240                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 241                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 242                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 243                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 244
 245         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 246                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 247                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 248                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 249
 250         if (i)
 251                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 252
 253         if (cpu->extn_mpy.ver) {
 254                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 255                         n += scnprintf(buf + n, len - n, "mpy ");
 256                 } else {
 257                         int opt = 2;    /* stock MPY/MPYH */
 258
 259                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 260                                 opt = cpu->extn_mpy.dsp + 6;
 261
 262                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 263                 }
 264         }
 265
 266         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 267                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 268                        IS_AVAIL1(cpu->extn.norm, "norm "),
 269                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 270                        IS_AVAIL1(cpu->extn.swap, "swap "),
 271                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 272                        IS_AVAIL1(cpu->extn.crc, "crc "),
 273                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 274
 275         if (cpu->bpu.ver)
 276                 n += scnprintf(buf + n, len - n,
 277                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 278                               IS_AVAIL1(cpu->bpu.full, "full"),
 279                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 280                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 281
 282         return buf;
 283 }
 284
 285 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 286 {
 287         int n = 0;
 288         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 289
 290         FIX_PTR(cpu);
 291
 292         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 293
 294         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 295                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 296                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 297                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 298
 299         if (cpu->extn.debug)
 300                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 301                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 302                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 303                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 304
 305         if (cpu->dccm.sz || cpu->iccm.sz)
 306                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 307                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 308                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 309
 310         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 311                         EF_ARC_OSABI_CURRENT >> 8,
 312                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 313                         "no-legacy-syscalls" : "64-bit data any register aligned");
 314
 315         return buf;
 316 }
 317
 318 static void arc_chk_core_config(void)
 319 {
 320         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 321         int fpu_enabled;
 322
 323         if (!cpu->extn.timer0)
 324                 panic("Timer0 is not present!\n");
 325
 326         if (!cpu->extn.timer1)
 327                 panic("Timer1 is not present!\n");
 328
 329 #ifdef CONFIG_ARC_HAS_DCCM
 330         /*
 331          * DCCM can be arbit placed in hardware.
 332          * Make sure it's placement/sz matches what Linux is built with
 333          */
 334         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 335                 panic("Linux built with incorrect DCCM Base address\n");
 336
 337         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 338                 panic("Linux built with incorrect DCCM Size\n");
 339 #endif
 340
 341 #ifdef CONFIG_ARC_HAS_ICCM
 342         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 343                 panic("Linux built with incorrect ICCM Size\n");
 344 #endif
 345
 346         /*
 347          * FP hardware/software config sanity
 348          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 349          * -If not, it will crash trying to save/restore the non-existant regs
 350          *
 351          * (only DPDP checked since SP has no arch visible regs)
 352          */
 353         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 354
 355         if (cpu->extn.fpu_dp && !fpu_enabled)
 356                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 357         else if (!cpu->extn.fpu_dp && fpu_enabled)
 358                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 359 }
 360
 361 /*
 362  * Initialize and setup the processor core
 363  * This is called by all the CPUs thus should not do special case stuff
 364  *    such as only for boot CPU etc
 365  */
 366
 367 void setup_processor(void)
 368 {
 369         char str[512];
 370         int cpu_id = smp_processor_id();
 371
 372         read_arc_build_cfg_regs();
 373         arc_init_IRQ();
 374
 375         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 376
 377         arc_mmu_init();
 378         arc_cache_init();
 379
 380         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 381         printk(arc_platform_smp_cpuinfo());
 382
 383         arc_chk_core_config();
 384 }
 385
 386 static inline int is_kernel(unsigned long addr)
 387 {
 388         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 389                 return 1;
 390         return 0;
 391 }
 392
 393 void __init setup_arch(char **cmdline_p)
 394 {
 395 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 396         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 397         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 398                 panic("Invalid uboot arg\n");
 399
 400         /* See if u-boot passed an external Device Tree blob */
 401         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 402         if (!machine_desc)
 403 #endif
 404         {
 405                 /* No, so try the embedded one */
 406                 machine_desc = setup_machine_fdt(__dtb_start);
 407                 if (!machine_desc)
 408                         panic("Embedded DT invalid\n");
 409
 410                 /*
 411                  * If we are here, it is established that @uboot_arg didn't
 412                  * point to DT blob. Instead if u-boot says it is cmdline,
 413                  * append to embedded DT cmdline.
 414                  * setup_machine_fdt() would have populated @boot_command_line
 415                  */
 416                 if (uboot_tag == 1) {
 417                         /* Ensure a whitespace between the 2 cmdlines */
 418                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 419                         strlcat(boot_command_line, uboot_arg,
 420                                 COMMAND_LINE_SIZE);
 421                 }
 422         }
 423
 424         /* Save unparsed command line copy for /proc/cmdline */
 425         *cmdline_p = boot_command_line;
 426
 427         /* To force early parsing of things like mem=xxx */
 428         parse_early_param();
 429
 430         /* Platform/board specific: e.g. early console registration */
 431         if (machine_desc->init_early)
 432                 machine_desc->init_early();
 433
 434         smp_init_cpus();
 435
 436         setup_processor();
 437         setup_arch_memory();
 438
 439         /* copy flat DT out of .init and then unflatten it */
 440         unflatten_and_copy_device_tree();
 441
 442         /* Can be issue if someone passes cmd line arg "ro"
 443          * But that is unlikely so keeping it as it is
 444          */
 445         root_mountflags &= ~MS_RDONLY;
 446
 447 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 448         conswitchp = &dummy_con;
 449 #endif
 450
 451         arc_unwind_init();
 452 }
 453
 454 /*
 455  * Called from start_kernel() - boot CPU only
 456  */
 457 void __init time_init(void)
 458 {
 459         of_clk_init(NULL);
 460         clocksource_probe();
 461 }
 462
 463 static int __init customize_machine(void)
 464 {
 465         if (machine_desc->init_machine)
 466                 machine_desc->init_machine();
 467
 468         return 0;
 469 }
 470 arch_initcall(customize_machine);
 471
 472 static int __init init_late_machine(void)
 473 {
 474         if (machine_desc->init_late)
 475                 machine_desc->init_late();
 476
 477         return 0;
 478 }
 479 late_initcall(init_late_machine);
 480 /*
 481  *  Get CPU information for use by the procfs.
 482  */
 483
 484 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 485 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 486
 487 static int show_cpuinfo(struct seq_file *m, void *v)
 488 {
 489         char *str;
 490         int cpu_id = ptr_to_cpu(v);
 491         struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk");
 492         u32 freq = 0;
 493
 494         if (!cpu_online(cpu_id)) {
 495                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 496                 goto done;
 497         }
 498
 499         str = (char *)__get_free_page(GFP_TEMPORARY);
 500         if (!str)
 501                 goto done;
 502
 503         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 504
 505         of_property_read_u32(core_clk, "clock-frequency", &freq);
 506         if (freq)
 507                 seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
 508                            freq / 1000000, (freq / 10000) % 100);
 509
 510         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 511                    loops_per_jiffy / (500000 / HZ),
 512                    (loops_per_jiffy / (5000 / HZ)) % 100);
 513
 514         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 515         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 516         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 517         seq_printf(m, arc_platform_smp_cpuinfo());
 518
 519         free_page((unsigned long)str);
 520 done:
 521         seq_printf(m, "\n");
 522
 523         return 0;
 524 }
 525
 526 static void *c_start(struct seq_file *m, loff_t *pos)
 527 {
 528         /*
 529          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 530          * However since NULL is also a valid cpu-id (0), we use a round-about
 531          * way to pass it w/o having to kmalloc/free a 2 byte string.
 532          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 533          */
 534         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 535 }
 536
 537 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 538 {
 539         ++*pos;
 540         return c_start(m, pos);
 541 }
 542
 543 static void c_stop(struct seq_file *m, void *v)
 544 {
 545 }
 546
 547 const struct seq_operations cpuinfo_op = {
 548         .start  = c_start,
 549         .next   = c_next,
 550         .stop   = c_stop,
 551         .show   = show_cpuinfo
 552 };
 553
 554 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 555
 556 static int __init topology_init(void)
 557 {
 558         int cpu;
 559
 560         for_each_present_cpu(cpu)
 561             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 562
 563         return 0;
 564 }
 565
 566 subsys_initcall(topology_init);